From patchwork Mon Jun 15 04:05:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Tomlinson X-Patchwork-Id: 11603773 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B0C713A0 for ; Mon, 15 Jun 2020 04:06:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 324782078A for ; Mon, 15 Jun 2020 04:06:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="o62exfEM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728143AbgFOEGJ (ORCPT ); Mon, 15 Jun 2020 00:06:09 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:50531 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728163AbgFOEGG (ORCPT ); Mon, 15 Jun 2020 00:06:06 -0400 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 8F437891B0; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1592193957; bh=BtcDdq8igGetN/jELHWNV2M1CB6861dCLDtHKsKlFzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=o62exfEMNl+ll+E9nfhS4jp9iwhjYH/X8Sl8S1PEIk67KvmzTx9EkewxFwWISGeBn boACE7L2ZU4qwIcEdCYtrUoGQYJ3mNCv672JB9pvju+3E2AwumJ2I2DMdBwhqnus67 Tp1PVw0XVC6rfS07QqwA7iFqGel+RaiUW6FTBPGEk4sdocy7TsUXhzeQn3DMd0fsjB sXPcw5fnoj29PVQJvv+ROgnLmIogm+fgPvoGoXmr3QE3qx+cWPfl9KRbLrJ4xFTQBE /Df9VC+ejPrNBacXmgc34pOJDOBVC6LPfSePauvMD/sEGcsPDNF4uNx13+yFhUGqyr cCcFXZHeArgHg== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Mon, 15 Jun 2020 16:05:57 +1200 Received: from markto-dl.ws.atlnz.lc (markto-dl.ws.atlnz.lc [10.33.23.25]) by smtp (Postfix) with ESMTP id 9AF4F13EEBA; Mon, 15 Jun 2020 16:05:56 +1200 (NZST) Received: by markto-dl.ws.atlnz.lc (Postfix, from userid 1155) id 4C90F341107; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) From: Mark Tomlinson To: broonie@kernel.org, kdasu.kdev@gmail.com Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Tomlinson Subject: [PATCH 1/5] spi: bcm-qspi: Add support for setting BSPI clock Date: Mon, 15 Jun 2020 16:05:53 +1200 Message-Id: <20200615040557.2011-2-mark.tomlinson@alliedtelesis.co.nz> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> References: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On iProc devices (unlike previous BCM SoCs) the clock rate of the SPI can be set. This patch adds the appropriate code for setting that. Reviewed-by: Callum Sinclair Reviewed-by: Chris Packham Signed-off-by: Mark Tomlinson --- drivers/spi/spi-bcm-qspi.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index 681d09085175..8fc5b9b3757b 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -117,6 +117,13 @@ #define MSPI_MSPI_STATUS_SPIF BIT(0) +#define CRU_CTRL_REG 0x0 +#define QSPI_CLK_SEL_25M 0x00 +#define QSPI_CLK_SEL_50M 0x02 +#define QSPI_CLK_SEL_31M25 0x04 +#define QSPI_CLK_SEL_62M5 0x06 +#define QSPI_CLK_SEL_MASK 0x06 + #define INTR_BASE_BIT_SHIFT 0x02 #define INTR_COUNT 0x07 @@ -170,6 +177,7 @@ enum base_type { MSPI, BSPI, CHIP_SELECT, + CRU_CTRL, BASEMAX, }; @@ -625,6 +633,7 @@ static void bcm_qspi_update_parms(struct bcm_qspi *qspi, static int bcm_qspi_setup(struct spi_device *spi) { struct bcm_qspi_parms *xp; + struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); if (spi->bits_per_word > 16) return -EINVAL; @@ -639,6 +648,21 @@ static int bcm_qspi_setup(struct spi_device *spi) xp->speed_hz = spi->max_speed_hz; xp->mode = spi->mode; + if (qspi->base[CRU_CTRL]) { + u32 tmp = bcm_qspi_read(qspi, CRU_CTRL, CRU_CTRL_REG); + + /* Set BSPI clock rate */ + tmp &= ~QSPI_CLK_SEL_MASK; + if (spi->max_speed_hz >= 62500000) + tmp |= QSPI_CLK_SEL_62M5; + else if (spi->max_speed_hz >= 50000000) + tmp |= QSPI_CLK_SEL_50M; + else if (spi->max_speed_hz >= 31250000) + tmp |= QSPI_CLK_SEL_31M25; + /* default is 25MHz */ + bcm_qspi_write(qspi, CRU_CTRL, CRU_CTRL_REG, tmp); + } + if (spi->bits_per_word) xp->bits_per_word = spi->bits_per_word; else @@ -1459,6 +1483,16 @@ int bcm_qspi_probe(struct platform_device *pdev, qspi->soc_intc = NULL; } + /* iProc BSPI clock is set through CRU control */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cru_ctrl"); + if (res) { + qspi->base[CRU_CTRL] = devm_ioremap_resource(dev, res); + if (IS_ERR(qspi->base[CRU_CTRL])) { + ret = PTR_ERR(qspi->base[CRU_CTRL]); + goto qspi_probe_err; + } + } + ret = clk_prepare_enable(qspi->clk); if (ret) { dev_err(dev, "failed to prepare clock\n"); From patchwork Mon Jun 15 04:05:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Tomlinson X-Patchwork-Id: 11603767 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC62A90 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A29DE20747 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="a/U3scyj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727987AbgFOEGI (ORCPT ); Mon, 15 Jun 2020 00:06:08 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:50529 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728143AbgFOEGG (ORCPT ); Mon, 15 Jun 2020 00:06:06 -0400 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 9FE06891B1; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1592193957; bh=3cfAFYHU5BJxG56tepVZpAZxLjvCy9XsBWxa/cSrxSo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=a/U3scyjDp9kk7+DzU/JZRxhiSq5YSOtj5A+EUZB0hDoQp0v9IT01nMfXtxS1a8ry 9q8NCDpRvkIQzZ71vOEFY9qrR97g5Iasx0geEk4V0c8xxgv/zX34sh3aTRLWe0mpzj X/AvcQ+y/nmKwc8fDAU5KsgYfMRKtE0gmZjxYQ1nUrBDO+lxXk4gZPTRoTAPRKjz9I 9C2AxZjE6GTFIS7Q4QOQRIqC7V8w6xgqn4pk3k/dGUHHpWdrG3G7QfAYMAWgonLYM+ QwQyQj0uSRmHXKLB9IIxIbm49khrAjB7GPnhM/G4Kv2cJTgkqGHPlQZ2oKksWsEBl5 bsWLPtasJNTHg== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Mon, 15 Jun 2020 16:05:57 +1200 Received: from markto-dl.ws.atlnz.lc (markto-dl.ws.atlnz.lc [10.33.23.25]) by smtp (Postfix) with ESMTP id 9EC4F13EDE4; Mon, 15 Jun 2020 16:05:56 +1200 (NZST) Received: by markto-dl.ws.atlnz.lc (Postfix, from userid 1155) id 50DA5341107; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) From: Mark Tomlinson To: broonie@kernel.org, kdasu.kdev@gmail.com Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Tomlinson Subject: [PATCH 2/5] spi: bcm-qspi: Improve debug reading SPI data Date: Mon, 15 Jun 2020 16:05:54 +1200 Message-Id: <20200615040557.2011-3-mark.tomlinson@alliedtelesis.co.nz> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> References: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This patch prevents device debug when data is not read from hardware (i.e. when there is no receive buffer). Reviewed-by: Callum Sinclair Reviewed-by: Chris Packham Signed-off-by: Mark Tomlinson --- drivers/spi/spi-bcm-qspi.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index 8fc5b9b3757b..92e04d24359f 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -749,21 +749,22 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots) tp = qspi->trans_pos; for (slot = 0; slot < slots; slot++) { - if (tp.trans->bits_per_word <= 8) { - u8 *buf = tp.trans->rx_buf; - - if (buf) - buf[tp.byte] = read_rxram_slot_u8(qspi, slot); - dev_dbg(&qspi->pdev->dev, "RD %02x\n", - buf ? buf[tp.byte] : 0x0); - } else { - u16 *buf = tp.trans->rx_buf; - - if (buf) - buf[tp.byte / 2] = read_rxram_slot_u16(qspi, - slot); - dev_dbg(&qspi->pdev->dev, "RD %04x\n", - buf ? buf[tp.byte / 2] : 0x0); + if (tp.trans->rx_buf) { + if (tp.trans->bits_per_word <= 8) { + u8 *buf = tp.trans->rx_buf; + + buf[tp.byte] = + read_rxram_slot_u8(qspi, slot); + dev_dbg(&qspi->pdev->dev, "RD %02x\n", + buf[tp.byte]); + } else { + u16 *buf = tp.trans->rx_buf; + + buf[tp.byte / 2] = + read_rxram_slot_u16(qspi, slot); + dev_dbg(&qspi->pdev->dev, "RD %04x\n", + buf[tp.byte / 2]); + } } update_qspi_trans_byte_count(qspi, &tp, From patchwork Mon Jun 15 04:05:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Tomlinson X-Patchwork-Id: 11603771 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7C9A6159A for ; Mon, 15 Jun 2020 04:06:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62DF82078A for ; Mon, 15 Jun 2020 04:06:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="w+RKgGlS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728233AbgFOEGJ (ORCPT ); Mon, 15 Jun 2020 00:06:09 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:50533 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728201AbgFOEGH (ORCPT ); Mon, 15 Jun 2020 00:06:07 -0400 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id EDF1D891B2; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1592193957; bh=aYu5nfgaWwoNizinGEq9qqfsv0a+/kTso+vvT11d+U8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=w+RKgGlSdShLQkZZbeKBgGpX4s4d7ddCTiZTugf+0vXSgzIknKngcZcY2lHlrX0t+ 6lGXdJN7xTavUK1H8py0tS3etkNRF2c0M5H3tIAjE9/rxk1CfOYcek2B3Fr4/LODTv edqfFJA+IcOebXZaRgUDKe/nG4WUdxZVpKxBV37DV46G50hXdUSb+fVsCSlz0fA+NG okDamSd2VdcugN0MX42gjqoHovX9reoYFoHVydhaHJNoOA68gmlCGh5V5fh2iL9OKb a2kHatZvW9YxWtEnfkdQdzlyyW5rFUZT44I4bLSHsVr3MD3HMb93YTIsiJzQ60/WiA 5m3kYcRl3RdYQ== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Mon, 15 Jun 2020 16:05:57 +1200 Received: from markto-dl.ws.atlnz.lc (markto-dl.ws.atlnz.lc [10.33.23.25]) by smtp (Postfix) with ESMTP id A189F13EEBA; Mon, 15 Jun 2020 16:05:56 +1200 (NZST) Received: by markto-dl.ws.atlnz.lc (Postfix, from userid 1155) id 54E84341107; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) From: Mark Tomlinson To: broonie@kernel.org, kdasu.kdev@gmail.com Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Tomlinson Subject: [PATCH 3/5] spi: bcm-qspi: Do not split transfers into small chunks Date: Mon, 15 Jun 2020 16:05:55 +1200 Message-Id: <20200615040557.2011-4-mark.tomlinson@alliedtelesis.co.nz> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> References: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Instead of splitting transfers into smaller parts, just perform the operation that the higher level asked for. Reviewed-by: Callum Sinclair Reviewed-by: Chris Packham Signed-off-by: Mark Tomlinson --- drivers/spi/spi-bcm-qspi.c | 69 +++++++++++++++----------------------- 1 file changed, 27 insertions(+), 42 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index 92e04d24359f..ce30ebf27f06 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -78,8 +78,6 @@ #define BSPI_BPP_MODE_SELECT_MASK BIT(8) #define BSPI_BPP_ADDR_SELECT_MASK BIT(16) -#define BSPI_READ_LENGTH 256 - /* MSPI register offsets */ #define MSPI_SPCR0_LSB 0x000 #define MSPI_SPCR0_MSB 0x004 @@ -888,9 +886,9 @@ static int bcm_qspi_bspi_exec_mem_op(struct spi_device *spi, const struct spi_mem_op *op) { struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); - u32 addr = 0, len, rdlen, len_words, from = 0; + u32 addr = 0, len, len_words, from = 0; int ret = 0; - unsigned long timeo = msecs_to_jiffies(100); + unsigned long timeo = msecs_to_jiffies(1500); struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc; if (bcm_qspi_bspi_ver_three(qspi)) @@ -925,47 +923,34 @@ static int bcm_qspi_bspi_exec_mem_op(struct spi_device *spi, * into RAF buffer read lengths */ len = op->data.nbytes; + reinit_completion(&qspi->bspi_done); + bcm_qspi_enable_bspi(qspi); + len_words = (len + 3) >> 2; + qspi->bspi_rf_op = op; + qspi->bspi_rf_op_status = 0; qspi->bspi_rf_op_idx = 0; + qspi->bspi_rf_op_len = len; + dev_dbg(&qspi->pdev->dev, "bspi xfr addr 0x%x len 0x%x", addr, len); - do { - if (len > BSPI_READ_LENGTH) - rdlen = BSPI_READ_LENGTH; - else - rdlen = len; - - reinit_completion(&qspi->bspi_done); - bcm_qspi_enable_bspi(qspi); - len_words = (rdlen + 3) >> 2; - qspi->bspi_rf_op = op; - qspi->bspi_rf_op_status = 0; - qspi->bspi_rf_op_len = rdlen; - dev_dbg(&qspi->pdev->dev, - "bspi xfr addr 0x%x len 0x%x", addr, rdlen); - bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr); - bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words); - bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0); - if (qspi->soc_intc) { - /* - * clear soc MSPI and BSPI interrupts and enable - * BSPI interrupts. - */ - soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_BSPI_DONE); - soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, true); - } - - /* Must flush previous writes before starting BSPI operation */ - mb(); - bcm_qspi_bspi_lr_start(qspi); - if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) { - dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n"); - ret = -ETIMEDOUT; - break; - } + bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr); + bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words); + bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0); + if (qspi->soc_intc) { + /* + * clear soc MSPI and BSPI interrupts and enable + * BSPI interrupts. + */ + soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_BSPI_DONE); + soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, true); + } - /* set msg return length */ - addr += rdlen; - len -= rdlen; - } while (len); + /* Must flush previous writes before starting BSPI operation */ + mb(); + bcm_qspi_bspi_lr_start(qspi); + if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) { + dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n"); + ret = -ETIMEDOUT; + } return ret; } From patchwork Mon Jun 15 04:05:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Tomlinson X-Patchwork-Id: 11603769 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA19017C7 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C111920747 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="03XGX8VJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728236AbgFOEGJ (ORCPT ); Mon, 15 Jun 2020 00:06:09 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:50532 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728157AbgFOEGG (ORCPT ); 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Mon, 15 Jun 2020 16:05:56 +1200 (NZST) Received: by markto-dl.ws.atlnz.lc (Postfix, from userid 1155) id 5845834125F; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) From: Mark Tomlinson To: broonie@kernel.org, kdasu.kdev@gmail.com Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Tomlinson Subject: [PATCH 4/5] spi: bcm-qspi: Make multiple data blocks interrupt-driven Date: Mon, 15 Jun 2020 16:05:56 +1200 Message-Id: <20200615040557.2011-5-mark.tomlinson@alliedtelesis.co.nz> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> References: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org When needing to send/receive data in small chunks, make this interrupt driven rather than waiting for a completion event for each small section of data. Reviewed-by: Callum Sinclair Reviewed-by: Chris Packham Signed-off-by: Mark Tomlinson --- drivers/spi/spi-bcm-qspi.c | 44 ++++++++++++++++++++++++-------------- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index ce30ebf27f06..0cc51bcda300 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -200,12 +200,14 @@ struct bcm_qspi_dev_id { struct qspi_trans { struct spi_transfer *trans; int byte; + int slots; bool mspi_last_trans; }; struct bcm_qspi { struct platform_device *pdev; struct spi_master *master; + struct spi_device *spi_dev; struct clk *clk; u32 base_clk; u32 max_speed_hz; @@ -731,12 +733,14 @@ static inline u16 read_rxram_slot_u16(struct bcm_qspi *qspi, int slot) ((bcm_qspi_read(qspi, MSPI, msb_offset) & 0xff) << 8); } -static void read_from_hw(struct bcm_qspi *qspi, int slots) +static void read_from_hw(struct bcm_qspi *qspi) { struct qspi_trans tp; - int slot; + int slot, slots; bcm_qspi_disable_bspi(qspi); + tp = qspi->trans_pos; + slots = tp.slots; if (slots > MSPI_NUM_CDRAM) { /* should never happen */ @@ -744,8 +748,6 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots) return; } - tp = qspi->trans_pos; - for (slot = 0; slot < slots; slot++) { if (tp.trans->rx_buf) { if (tp.trans->bits_per_word <= 8) { @@ -803,11 +805,12 @@ static inline void write_cdram_slot(struct bcm_qspi *qspi, int slot, u32 val) } /* Return number of slots written */ -static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi) +static int write_to_hw(struct bcm_qspi *qspi) { struct qspi_trans tp; int slot = 0, tstatus = 0; u32 mspi_cdram = 0; + struct spi_device *spi = qspi->spi_dev; bcm_qspi_disable_bspi(qspi); tp = qspi->trans_pos; @@ -846,6 +849,9 @@ static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi) slot++; } + /* save slot number for read_from_hw() */ + qspi->trans_pos.slots = slot; + if (!slot) { dev_err(&qspi->pdev->dev, "%s: no data to send?", __func__); goto done; @@ -960,24 +966,21 @@ static int bcm_qspi_transfer_one(struct spi_master *master, struct spi_transfer *trans) { struct bcm_qspi *qspi = spi_master_get_devdata(master); - int slots; - unsigned long timeo = msecs_to_jiffies(100); + unsigned long timeo = msecs_to_jiffies(1000); if (!spi->cs_gpiod) bcm_qspi_chip_select(qspi, spi->chip_select); qspi->trans_pos.trans = trans; qspi->trans_pos.byte = 0; + qspi->spi_dev = spi; - while (qspi->trans_pos.byte < trans->len) { - reinit_completion(&qspi->mspi_done); + reinit_completion(&qspi->mspi_done); - slots = write_to_hw(qspi, spi); - if (!wait_for_completion_timeout(&qspi->mspi_done, timeo)) { - dev_err(&qspi->pdev->dev, "timeout waiting for MSPI\n"); - return -ETIMEDOUT; - } + write_to_hw(qspi); - read_from_hw(qspi, slots); + if (!wait_for_completion_timeout(&qspi->mspi_done, timeo)) { + dev_err(&qspi->pdev->dev, "timeout waiting for MSPI\n"); + return -ETIMEDOUT; } bcm_qspi_enable_bspi(qspi); @@ -1092,7 +1095,16 @@ static irqreturn_t bcm_qspi_mspi_l2_isr(int irq, void *dev_id) bcm_qspi_write(qspi, MSPI, MSPI_MSPI_STATUS, status); if (qspi->soc_intc) soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_DONE); - complete(&qspi->mspi_done); + + read_from_hw(qspi); + + if (qspi->trans_pos.trans) { + write_to_hw(qspi); + } else { + complete(&qspi->mspi_done); + spi_finalize_current_transfer(qspi->master); + } + return IRQ_HANDLED; } From patchwork Mon Jun 15 04:05:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Tomlinson X-Patchwork-Id: 11603765 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9ABCE13A0 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8059820747 for ; Mon, 15 Jun 2020 04:06:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="l0Gx52Ee" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725648AbgFOEGI (ORCPT ); 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Mon, 15 Jun 2020 16:05:57 +1200 Received: from markto-dl.ws.atlnz.lc (markto-dl.ws.atlnz.lc [10.33.23.25]) by smtp (Postfix) with ESMTP id AAFB113EDE4; Mon, 15 Jun 2020 16:05:56 +1200 (NZST) Received: by markto-dl.ws.atlnz.lc (Postfix, from userid 1155) id 5B313341283; Mon, 15 Jun 2020 16:05:57 +1200 (NZST) From: Mark Tomlinson To: broonie@kernel.org, kdasu.kdev@gmail.com Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Mark Tomlinson Subject: [PATCH 5/5] spi: bcm-qspi: Improve interrupt handling Date: Mon, 15 Jun 2020 16:05:57 +1200 Message-Id: <20200615040557.2011-6-mark.tomlinson@alliedtelesis.co.nz> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> References: <20200615040557.2011-1-mark.tomlinson@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Acknowledge interrupts correctly and add support for fifo-full interrupt, distinguishing it from the done interrupt. Reviewed-by: Callum Sinclair Reviewed-by: Chris Packham Signed-off-by: Mark Tomlinson --- drivers/spi/spi-bcm-qspi.c | 11 ++++++----- drivers/spi/spi-bcm-qspi.h | 5 ++++- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index 0cc51bcda300..3753eff8a154 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -1123,6 +1123,8 @@ static irqreturn_t bcm_qspi_bspi_lr_l2_isr(int irq, void *dev_id) if (qspi->bspi_rf_op_len == 0) { qspi->bspi_rf_op = NULL; if (qspi->soc_intc) { + /* Ack BSPI done interrupt */ + soc_intc->bcm_qspi_int_ack(soc_intc, BSPI_DONE); /* disable soc BSPI interrupt */ soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, false); @@ -1134,11 +1136,10 @@ static irqreturn_t bcm_qspi_bspi_lr_l2_isr(int irq, void *dev_id) bcm_qspi_bspi_lr_clear(qspi); else bcm_qspi_bspi_flush_prefetch_buffers(qspi); - } - - if (qspi->soc_intc) - /* clear soc BSPI interrupt */ - soc_intc->bcm_qspi_int_ack(soc_intc, BSPI_DONE); + } else if (qspi->soc_intc) + /* Ack FIFO full interrupt */ + soc_intc->bcm_qspi_int_ack(soc_intc, + BSPI_FIFO_FULL); } status &= INTR_BSPI_LR_SESSION_DONE_MASK; diff --git a/drivers/spi/spi-bcm-qspi.h b/drivers/spi/spi-bcm-qspi.h index 01aec6460108..b68e275bc721 100644 --- a/drivers/spi/spi-bcm-qspi.h +++ b/drivers/spi/spi-bcm-qspi.h @@ -48,7 +48,8 @@ enum { MSPI_DONE = 0x1, BSPI_DONE = 0x2, BSPI_ERR = 0x4, - MSPI_BSPI_DONE = 0x7 + MSPI_BSPI_DONE = 0x7, + BSPI_FIFO_FULL = 0x8 }; struct bcm_qspi_soc_intc { @@ -84,6 +85,8 @@ static inline u32 get_qspi_mask(int type) return INTR_MSPI_DONE_MASK; case BSPI_DONE: return BSPI_LR_INTERRUPTS_ALL; + case BSPI_FIFO_FULL: + return INTR_BSPI_LR_FULLNESS_REACHED_MASK; case MSPI_BSPI_DONE: return QSPI_INTERRUPTS_ALL; case BSPI_ERR: