From patchwork Fri Oct 12 21:52:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 834581508 for ; Fri, 12 Oct 2018 21:52:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 81AF32BF80 for ; Fri, 12 Oct 2018 21:52:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 75C372BF86; Fri, 12 Oct 2018 21:52:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 313B02BF80 for ; Fri, 12 Oct 2018 21:52:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4EAFD6E4A3; Fri, 12 Oct 2018 21:52:31 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id DA3E16E4A3 for ; Fri, 12 Oct 2018 21:52:28 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806960" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:27 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:03 -0700 Message-Id: <20181012215218.5119-1-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/16] drm/i915: Properly set PCH as NOP when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP num_pipes is set to 0 if disable_display is set inside intel_device_info_runtime_init() but when that happen PCH will already be set in intel_detect_pch(). i915_driver_load() i915_driver_init_early() ... intel_detect_pch() ... ... i915_driver_init_hw() intel_device_info_runtime_init() So now setting num_pipes = 0 earlier to avoid this problem. Cc: Jani Nikula Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 5 +++++ drivers/gpu/drm/i915/intel_device_info.c | 8 ++------ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index baac35f698f9..e3efc3dd8a30 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1649,6 +1649,11 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) memcpy(device_info, match_info, sizeof(*device_info)); device_info->device_id = pdev->device; + if (i915_modparams.disable_display) { + DRM_INFO("Display disabled (module parameter)\n"); + device_info->num_pipes = 0; + } + BUILD_BUG_ON(INTEL_MAX_PLATFORMS > BITS_PER_TYPE(device_info->platform_mask)); BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask)); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 03df4e33763d..69be3f211737 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -775,12 +775,8 @@ void intel_device_info_runtime_init(struct intel_device_info *info) info->num_sprites[pipe] = 1; } - if (i915_modparams.disable_display) { - DRM_INFO("Display disabled (module parameter)\n"); - info->num_pipes = 0; - } else if (info->num_pipes > 0 && - (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) && - HAS_PCH_SPLIT(dev_priv)) { + if (info->num_pipes > 0 && (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) && + HAS_PCH_SPLIT(dev_priv)) { u32 fuse_strap = I915_READ(FUSE_STRAP); u32 sfuse_strap = I915_READ(SFUSE_STRAP); From patchwork Fri Oct 12 21:52:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639315 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4AD3C933 for ; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 494242BF84 for ; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3D8FF2BF8C; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 929C22BF84 for ; Fri, 12 Oct 2018 21:52:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F3B896E4F0; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE02E6E4E2 for ; Fri, 12 Oct 2018 21:52:28 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806963" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:04 -0700 Message-Id: <20181012215218.5119-2-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/16] drm/i915: Move out non-display related calls from display/modeset init/cleanup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP i915_load_modeset_init() and intel_modeset_cleanup() was initializing and cleaning up things that is not related to display or modeset. This changes will make easy initialize driver without display block. Also moving VLV/CHV/BYT czclk as it is a core clock used as base by several other GPU blocks including GT. Spec: 14370 Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 81 +++++++++++++++++----------- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 24 ++------- drivers/gpu/drm/i915/intel_pm.c | 10 ++++ 4 files changed, 67 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e3efc3dd8a30..55212d059cca 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -664,28 +664,15 @@ static int i915_load_modeset_init(struct drm_device *dev) if (ret) goto cleanup_vga_client; - /* must happen before intel_power_domains_init_hw() on VLV/CHV */ - intel_update_rawclk(dev_priv); - - intel_power_domains_init_hw(dev_priv, false); - intel_csr_ucode_init(dev_priv); - ret = intel_irq_install(dev_priv); - if (ret) - goto cleanup_csr; - intel_setup_gmbus(dev_priv); /* Important: The output setup functions called by modeset_init need * working irqs for e.g. gmbus and dp aux transfers. */ ret = intel_modeset_init(dev); if (ret) - goto cleanup_irq; - - ret = i915_gem_init(dev_priv); - if (ret) - goto cleanup_modeset; + goto cleanup_gmbus; intel_setup_overlay(dev_priv); @@ -694,25 +681,18 @@ static int i915_load_modeset_init(struct drm_device *dev) ret = intel_fbdev_init(dev); if (ret) - goto cleanup_gem; + goto cleanup_modeset; /* Only enable hotplug handling once the fbdev is fully set up. */ intel_hpd_init(dev_priv); return 0; -cleanup_gem: - if (i915_gem_suspend(dev_priv)) - DRM_ERROR("failed to idle hardware; continuing to unload!\n"); - i915_gem_fini(dev_priv); cleanup_modeset: intel_modeset_cleanup(dev); -cleanup_irq: - drm_irq_uninstall(dev); +cleanup_gmbus: intel_teardown_gmbus(dev_priv); -cleanup_csr: intel_csr_ucode_fini(dev_priv); - intel_power_domains_fini_hw(dev_priv); vga_switcheroo_unregister_client(pdev); cleanup_vga_client: vga_client_register(pdev, NULL, NULL, NULL); @@ -1728,9 +1708,25 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) goto out_cleanup_hw; } + /* must happen before intel_power_domains_init_hw() on VLV/CHV */ + intel_update_rawclk(dev_priv); + + /* i915_gem_init() call chain will call + * intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ); + */ + intel_power_domains_init_hw(dev_priv, false); + + ret = intel_irq_install(dev_priv); + if (ret) + goto out_cleanup_power; + + ret = i915_gem_init(dev_priv); + if (ret) + goto cleanup_irq; + ret = i915_load_modeset_init(&dev_priv->drm); if (ret < 0) - goto out_cleanup_hw; + goto cleanup_gem; i915_driver_register(dev_priv); @@ -1742,6 +1738,14 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) return 0; +cleanup_gem: + if (i915_gem_suspend(dev_priv)) + DRM_ERROR("failed to idle hardware; continuing to unload!\n"); + i915_gem_fini(dev_priv); +cleanup_irq: + drm_irq_uninstall(&dev_priv->drm); +out_cleanup_power: + intel_power_domains_fini_hw(dev_priv); out_cleanup_hw: i915_driver_cleanup_hw(dev_priv); out_cleanup_mmio: @@ -1757,11 +1761,24 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) return ret; } -void i915_driver_unload(struct drm_device *dev) +/* unload/cleanup the leftover of i915_load_modeset_init() */ +static void i915_modeset_unload(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); struct pci_dev *pdev = dev_priv->drm.pdev; + intel_bios_cleanup(dev_priv); + + vga_switcheroo_unregister_client(pdev); + vga_client_register(pdev, NULL, NULL, NULL); + + intel_csr_ucode_fini(dev_priv); +} + +void i915_driver_unload(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = to_i915(dev); + disable_rpm_wakeref_asserts(dev_priv); i915_driver_unregister(dev_priv); @@ -1773,14 +1790,18 @@ void i915_driver_unload(struct drm_device *dev) intel_gvt_cleanup(dev_priv); - intel_modeset_cleanup(dev); + intel_modeset_cleanup_prepare(dev); - intel_bios_cleanup(dev_priv); + /* + * Interrupts and polling as the first thing to avoid creating havoc. + * Too much stuff here (turning of connectors, ...) would + * experience fancy races otherwise. + */ + intel_irq_uninstall(dev_priv); - vga_switcheroo_unregister_client(pdev); - vga_client_register(pdev, NULL, NULL, NULL); + intel_modeset_cleanup(dev); - intel_csr_ucode_fini(dev_priv); + i915_modeset_unload(dev); /* Free error state after interrupts are fully disabled. */ cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3017ef037fed..a3d33245767c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3491,6 +3491,7 @@ mkwrite_device_info(struct drm_i915_private *dev_priv) /* modesetting */ extern void intel_modeset_init_hw(struct drm_device *dev); extern int intel_modeset_init(struct drm_device *dev); +void intel_modeset_cleanup_prepare(struct drm_device *dev); extern void intel_modeset_cleanup(struct drm_device *dev); extern int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 980f4ea68e48..36f887a2bdf2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -170,17 +170,6 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, dev_priv->hpll_freq); } -static void intel_update_czclk(struct drm_i915_private *dev_priv) -{ - if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) - return; - - dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", - CCK_CZ_CLOCK_CONTROL); - - DRM_DEBUG_DRIVER("CZ clock rate: %d kHz\n", dev_priv->czclk_freq); -} - static inline u32 /* units of 100MHz */ intel_fdi_link_freq(struct drm_i915_private *dev_priv, const struct intel_crtc_state *pipe_config) @@ -15099,7 +15088,6 @@ int intel_modeset_init(struct drm_device *dev) intel_shared_dpll_init(dev); intel_update_fdi_pll_freq(dev_priv); - intel_update_czclk(dev_priv); intel_modeset_init_hw(dev); if (dev_priv->max_cdclk_freq == 0) @@ -15804,7 +15792,7 @@ static void intel_hpd_poll_fini(struct drm_device *dev) drm_connector_list_iter_end(&conn_iter); } -void intel_modeset_cleanup(struct drm_device *dev) +void intel_modeset_cleanup_prepare(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); @@ -15812,13 +15800,11 @@ void intel_modeset_cleanup(struct drm_device *dev) flush_work(&dev_priv->atomic_helper.free_work); WARN_ON(!llist_empty(&dev_priv->atomic_helper.free_list)); +} - /* - * Interrupts and polling as the first thing to avoid creating havoc. - * Too much stuff here (turning of connectors, ...) would - * experience fancy races otherwise. - */ - intel_irq_uninstall(dev_priv); +void intel_modeset_cleanup(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = to_i915(dev); /* * Due to the hpd irq storm handling the hotplug work can re-arm the diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index fa5c48778a80..f83372c6cafe 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7450,6 +7450,14 @@ static void vlv_init_gpll_ref_freq(struct drm_i915_private *dev_priv) dev_priv->gt_pm.rps.gpll_ref_freq); } +static void valleyview_update_czclk(struct drm_i915_private *dev_priv) +{ + dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", + CCK_CZ_CLOCK_CONTROL); + + DRM_DEBUG_DRIVER("CZ clock rate: %d kHz\n", dev_priv->czclk_freq); +} + static void valleyview_init_gt_powersave(struct drm_i915_private *dev_priv) { struct intel_rps *rps = &dev_priv->gt_pm.rps; @@ -7457,6 +7465,7 @@ static void valleyview_init_gt_powersave(struct drm_i915_private *dev_priv) valleyview_setup_pctx(dev_priv); + valleyview_update_czclk(dev_priv); vlv_init_gpll_ref_freq(dev_priv); val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS); @@ -7503,6 +7512,7 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv) cherryview_setup_pctx(dev_priv); + valleyview_update_czclk(dev_priv); vlv_init_gpll_ref_freq(dev_priv); mutex_lock(&dev_priv->sb_lock); From patchwork Fri Oct 12 21:52:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639337 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 38CF11508 for ; Fri, 12 Oct 2018 21:52:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3943E2BF80 for ; Fri, 12 Oct 2018 21:52:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E0A22BF86; Fri, 12 Oct 2018 21:52:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D5F832BF80 for ; Fri, 12 Oct 2018 21:52:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B44EF6E511; Fri, 12 Oct 2018 21:52:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E0AE6E4E4 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806965" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:05 -0700 Message-Id: <20181012215218.5119-3-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/16] drm/i915: Move drm_vblank_init() to i915_load_modeset_init() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP i915_load_modeset_init() is a more suitable place than i915_driver_load() as vblank is part of modeset. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 55212d059cca..e93b214a3dfa 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -645,6 +645,13 @@ static int i915_load_modeset_init(struct drm_device *dev) if (i915_inject_load_failure()) return -ENODEV; + if (INTEL_INFO(dev_priv)->num_pipes) { + ret = drm_vblank_init(&dev_priv->drm, + INTEL_INFO(dev_priv)->num_pipes); + if (ret) + goto out; + } + intel_bios_init(dev_priv); /* If we have > 1 VGA cards, then we need to arbitrate access @@ -1696,18 +1703,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret < 0) goto out_cleanup_mmio; - /* - * TODO: move the vblank init and parts of modeset init steps into one - * of the i915_driver_init_/i915_driver_register functions according - * to the role/effect of the given init step. - */ - if (INTEL_INFO(dev_priv)->num_pipes) { - ret = drm_vblank_init(&dev_priv->drm, - INTEL_INFO(dev_priv)->num_pipes); - if (ret) - goto out_cleanup_hw; - } - /* must happen before intel_power_domains_init_hw() on VLV/CHV */ intel_update_rawclk(dev_priv); @@ -1746,7 +1741,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) drm_irq_uninstall(&dev_priv->drm); out_cleanup_power: intel_power_domains_fini_hw(dev_priv); -out_cleanup_hw: i915_driver_cleanup_hw(dev_priv); out_cleanup_mmio: i915_driver_cleanup_mmio(dev_priv); From patchwork Fri Oct 12 21:52:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54579933 for ; Fri, 12 Oct 2018 21:52:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 52CBE2BF80 for ; Fri, 12 Oct 2018 21:52:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4719E2BF86; Fri, 12 Oct 2018 21:52:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EEDCF2BF80 for ; Fri, 12 Oct 2018 21:52:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7267A6E4FE; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2C2F66E4A3 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806969" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:06 -0700 Message-Id: <20181012215218.5119-4-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/16] drm/i915: Move FBC init and cleanup calls to modeset functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Although FBC helps save power it do not belongs to power management also the cleanup was placed in i915_driver_unload() also not a good place. intel_modeset_init()/intel_modeset_cleanup() are better places also this will help make easy disable features that depends in display being enabled in driver. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 1 - drivers/gpu/drm/i915/intel_display.c | 4 ++++ drivers/gpu/drm/i915/intel_pm.c | 2 -- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e93b214a3dfa..8e9ecabde710 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1802,7 +1802,6 @@ void i915_driver_unload(struct drm_device *dev) i915_reset_error_state(dev_priv); i915_gem_fini(dev_priv); - intel_fbc_cleanup_cfb(dev_priv); intel_power_domains_fini_hw(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 36f887a2bdf2..1d07fc41d492 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15028,6 +15028,8 @@ int intel_modeset_init(struct drm_device *dev) intel_init_quirks(dev); + intel_fbc_init(dev_priv); + intel_init_pm(dev_priv); /* @@ -15829,6 +15831,8 @@ void intel_modeset_cleanup(struct drm_device *dev) intel_teardown_gmbus(dev_priv); destroy_workqueue(dev_priv->modeset_wq); + + intel_fbc_cleanup_cfb(dev_priv); } /* diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f83372c6cafe..838aaf2c719c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9340,8 +9340,6 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) /* Set up chip specific power management-related functions */ void intel_init_pm(struct drm_i915_private *dev_priv) { - intel_fbc_init(dev_priv); - /* For cxsr */ if (IS_PINEVIEW(dev_priv)) i915_pineview_get_mem_freq(dev_priv); From patchwork Fri Oct 12 21:52:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3E1F933 for ; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B283D2BF80 for ; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A71F72BF86; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 711972BF80 for ; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3BFE56E507; Fri, 12 Oct 2018 21:52:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3FBF36E4E2 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806971" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:07 -0700 Message-Id: <20181012215218.5119-5-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/16] drm/i915: Move intel_init_ipc() call to i915_load_modeset_init() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP IPC is a display feature, so i915_load_modeset_init() is the right place to initialize it. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 8e9ecabde710..3f7514e981d5 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -693,6 +693,8 @@ static int i915_load_modeset_init(struct drm_device *dev) /* Only enable hotplug handling once the fbdev is fully set up. */ intel_hpd_init(dev_priv); + intel_init_ipc(dev_priv); + return 0; cleanup_modeset: @@ -1725,8 +1727,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) i915_driver_register(dev_priv); - intel_init_ipc(dev_priv); - enable_rpm_wakeref_asserts(dev_priv); i915_welcome_messages(dev_priv); From patchwork Fri Oct 12 21:52:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639323 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF5F61508 for ; Fri, 12 Oct 2018 21:52:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD32E2BF84 for ; Fri, 12 Oct 2018 21:52:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D12712BF80; Fri, 12 Oct 2018 21:52:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0C6F02BF80 for ; Fri, 12 Oct 2018 21:52:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12E386E4F5; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 536E26E4E4 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806976" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:08 -0700 Message-Id: <20181012215218.5119-6-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/16] drm/i915: Don't call modeset related functions when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Display features should not be initialized or deinitialized when display is disabled. With this changes no plane, CRTC, encoder or connector is being registered in drm when display is disabled so it was also necessary unset DRIVER_MODESET and DRIVER_ATOMIC features from driver otherwise it will crash when registering driver in drm. There is still more modeset/display calls that will be removed in futher patches. Signed-off-by: José Roberto de Souza squash do not call modeset --- drivers/gpu/drm/i915/i915_drv.c | 155 +++++++++++++++--------- drivers/gpu/drm/i915/i915_suspend.c | 24 ++-- drivers/gpu/drm/i915/intel_runtime_pm.c | 21 ++-- 3 files changed, 124 insertions(+), 76 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 3f7514e981d5..8334d1797df7 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -899,7 +899,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv) intel_wopcm_init_early(&dev_priv->wopcm); intel_uc_init_early(dev_priv); intel_pm_setup(dev_priv); - intel_init_dpio(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_init_dpio(dev_priv); ret = intel_power_domains_init(dev_priv); if (ret < 0) goto err_uc; @@ -907,8 +908,10 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv) intel_hangcheck_init(dev_priv); intel_init_display_hooks(dev_priv); intel_init_clock_gating_hooks(dev_priv); - intel_init_audio_hooks(dev_priv); - intel_display_crc_init(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_init_audio_hooks(dev_priv); + intel_display_crc_init(dev_priv); + } intel_detect_preproduction_hw(dev_priv); @@ -1539,23 +1542,26 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) if (IS_GEN5(dev_priv)) intel_gpu_ips_init(dev_priv); - intel_audio_init(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_audio_init(dev_priv); - /* - * Some ports require correctly set-up hpd registers for detection to - * work properly (leading to ghost connected connector status), e.g. VGA - * on gm45. Hence we can only set up the initial fbdev config after hpd - * irqs are fully enabled. We do it last so that the async config - * cannot run before the connectors are registered. - */ - intel_fbdev_initial_config_async(dev); + /* + * Some ports require correctly set-up hpd registers for + * detection to work properly (leading to ghost connected + * connector status), e.g. VGA on gm45. Hence we can only set + * up the initial fbdev config after hpd irqs are fully enabled. + * We do it last so that the async config cannot run before the + * connectors are registered. + */ + intel_fbdev_initial_config_async(dev); - /* - * We need to coordinate the hotplugs with the asynchronous fbdev - * configuration, for which we use the fbdev->async_cookie. - */ - if (INTEL_INFO(dev_priv)->num_pipes) + /* + * We need to coordinate the hotplugs with the asynchronous + * fbdev configuration, for which we use the + * fbdev->async_cookie. + */ drm_kms_helper_poll_init(dev); + } intel_power_domains_enable(dev_priv); intel_runtime_pm_enable(dev_priv); @@ -1570,15 +1576,17 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv) intel_runtime_pm_disable(dev_priv); intel_power_domains_disable(dev_priv); - intel_fbdev_unregister(dev_priv); - intel_audio_deinit(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_fbdev_unregister(dev_priv); + intel_audio_deinit(dev_priv); - /* - * After flushing the fbdev (incl. a late async config which will - * have delayed queuing of a hotplug event), then flush the hotplug - * events. - */ - drm_kms_helper_poll_fini(&dev_priv->drm); + /* + * After flushing the fbdev (incl. a late async config which + * will have delayed queuing of a hotplug event), then flush the + * hotplug events. + */ + drm_kms_helper_poll_fini(&dev_priv->drm); + } intel_gpu_ips_teardown(); acpi_video_unregister(); @@ -1641,6 +1649,7 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) if (i915_modparams.disable_display) { DRM_INFO("Display disabled (module parameter)\n"); device_info->num_pipes = 0; + i915->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); } BUILD_BUG_ON(INTEL_MAX_PLATFORMS > @@ -1721,9 +1730,11 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto cleanup_irq; - ret = i915_load_modeset_init(&dev_priv->drm); - if (ret < 0) - goto cleanup_gem; + if (INTEL_INFO(dev_priv)->num_pipes) { + ret = i915_load_modeset_init(&dev_priv->drm); + if (ret < 0) + goto cleanup_gem; + } i915_driver_register(dev_priv); @@ -1780,11 +1791,13 @@ void i915_driver_unload(struct drm_device *dev) if (i915_gem_suspend(dev_priv)) DRM_ERROR("failed to idle hardware; continuing to unload!\n"); - drm_atomic_helper_shutdown(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + drm_atomic_helper_shutdown(dev); intel_gvt_cleanup(dev_priv); - intel_modeset_cleanup_prepare(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_modeset_cleanup_prepare(dev); /* * Interrupts and polling as the first thing to avoid creating havoc. @@ -1793,9 +1806,11 @@ void i915_driver_unload(struct drm_device *dev) */ intel_irq_uninstall(dev_priv); - intel_modeset_cleanup(dev); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_modeset_cleanup(dev); - i915_modeset_unload(dev); + i915_modeset_unload(dev); + } /* Free error state after interrupts are fully disabled. */ cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); @@ -1847,8 +1862,12 @@ static int i915_driver_open(struct drm_device *dev, struct drm_file *file) */ static void i915_driver_lastclose(struct drm_device *dev) { - intel_fbdev_restore_mode(dev); - vga_switcheroo_process_delayed_switch(); + struct drm_i915_private *dev_priv = to_i915(dev); + + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_fbdev_restore_mode(dev); + vga_switcheroo_process_delayed_switch(); + } } static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) @@ -1918,19 +1937,24 @@ static int i915_drm_suspend(struct drm_device *dev) /* We do a lot of poking in a lot of registers, make sure they work * properly. */ intel_power_domains_disable(dev_priv); - - drm_kms_helper_poll_disable(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + drm_kms_helper_poll_disable(dev); pci_save_state(pdev); - intel_display_suspend(dev); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_display_suspend(dev); - intel_dp_mst_suspend(dev_priv); + intel_dp_mst_suspend(dev_priv); + } intel_runtime_pm_disable_interrupts(dev_priv); - intel_hpd_cancel_work(dev_priv); - intel_suspend_encoders(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_hpd_cancel_work(dev_priv); + + intel_suspend_encoders(dev_priv); + } intel_suspend_hw(dev_priv); @@ -1943,11 +1967,13 @@ static int i915_drm_suspend(struct drm_device *dev) intel_opregion_unregister(dev_priv); - intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true); dev_priv->suspend_count++; - intel_csr_ucode_suspend(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_csr_ucode_suspend(dev_priv); enable_rpm_wakeref_asserts(dev_priv); @@ -2056,10 +2082,12 @@ static int i915_drm_resume(struct drm_device *dev) if (ret) DRM_ERROR("failed to re-enable GGTT\n"); - intel_csr_ucode_resume(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_csr_ucode_resume(dev_priv); i915_restore_state(dev_priv); - intel_pps_unlock_regs_wa(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_pps_unlock_regs_wa(dev_priv); intel_opregion_setup(dev_priv); intel_init_pch_refclk(dev_priv); @@ -2076,7 +2104,8 @@ static int i915_drm_resume(struct drm_device *dev) */ intel_runtime_pm_enable_interrupts(dev_priv); - drm_mode_config_reset(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + drm_mode_config_reset(dev); i915_gem_resume(dev_priv); @@ -2084,27 +2113,30 @@ static int i915_drm_resume(struct drm_device *dev) intel_init_clock_gating(dev_priv); spin_lock_irq(&dev_priv->irq_lock); - if (dev_priv->display.hpd_irq_setup) + if (dev_priv->display.hpd_irq_setup && INTEL_INFO(dev_priv)->num_pipes) dev_priv->display.hpd_irq_setup(dev_priv); spin_unlock_irq(&dev_priv->irq_lock); - intel_dp_mst_resume(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + intel_dp_mst_resume(dev_priv); - intel_display_resume(dev); + intel_display_resume(dev); - drm_kms_helper_poll_enable(dev); + drm_kms_helper_poll_enable(dev); - /* - * ... but also need to make sure that hotplug processing - * doesn't cause havoc. Like in the driver load code we don't - * bother with the tiny race here where we might lose hotplug - * notifications. - * */ - intel_hpd_init(dev_priv); + /* + * ... but also need to make sure that hotplug processing + * doesn't cause havoc. Like in the driver load code we don't + * bother with the tiny race here where we might lose hotplug + * notifications. + */ + intel_hpd_init(dev_priv); + } intel_opregion_register(dev_priv); - intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false); intel_opregion_notify_adapter(dev_priv, PCI_D0); @@ -3000,7 +3032,8 @@ static int intel_runtime_suspend(struct device *kdev) assert_forcewakes_inactive(dev_priv); - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) + if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) && + !IS_CHERRYVIEW(dev_priv))) intel_hpd_poll_init(dev_priv); DRM_DEBUG_KMS("Device suspended\n"); @@ -3057,10 +3090,12 @@ static int intel_runtime_resume(struct device *kdev) * power well, so hpd is reinitialized from there. For * everyone else do it here. */ - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) + if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) && + !IS_CHERRYVIEW(dev_priv))) intel_hpd_init(dev_priv); - intel_enable_ipc(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_enable_ipc(dev_priv); enable_rpm_wakeref_asserts(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 8f3aa4dc0c98..f697865236a6 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -63,11 +63,13 @@ int i915_save_state(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); - i915_save_display(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + i915_save_display(dev_priv); - if (IS_GEN4(dev_priv)) - pci_read_config_word(pdev, GCDGMBUS, - &dev_priv->regfile.saveGCDGMBUS); + if (IS_GEN4(dev_priv)) + pci_read_config_word(pdev, GCDGMBUS, + &dev_priv->regfile.saveGCDGMBUS); + } /* Cache mode state */ if (INTEL_GEN(dev_priv) < 7) @@ -108,10 +110,13 @@ int i915_restore_state(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); - if (IS_GEN4(dev_priv)) - pci_write_config_word(pdev, GCDGMBUS, - dev_priv->regfile.saveGCDGMBUS); - i915_restore_display(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) { + if (IS_GEN4(dev_priv)) + pci_write_config_word(pdev, GCDGMBUS, + dev_priv->regfile.saveGCDGMBUS); + + i915_restore_display(dev_priv); + } /* Cache mode state */ if (INTEL_GEN(dev_priv) < 7) @@ -143,7 +148,8 @@ int i915_restore_state(struct drm_i915_private *dev_priv) mutex_unlock(&dev_priv->drm.struct_mutex); - intel_i2c_reset(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_i2c_reset(dev_priv); return 0; } diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 3cf8533e0834..15fd88bb35f7 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -625,7 +625,8 @@ void bxt_enable_dc9(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Enabling DC9\n"); - intel_power_sequencer_reset(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_power_sequencer_reset(dev_priv); gen9_set_dc_state(dev_priv, DC_STATE_EN_DC9); } @@ -1039,10 +1040,12 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv) /* make sure we're done processing display irqs */ synchronize_irq(dev_priv->drm.irq); - intel_power_sequencer_reset(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_power_sequencer_reset(dev_priv); /* Prevent us from re-enabling polling on accident in late suspend */ - if (!dev_priv->drm.dev->power.is_suspended) + if (INTEL_INFO(dev_priv)->num_pipes && + !dev_priv->drm.dev->power.is_suspended) intel_hpd_poll_init(dev_priv); } @@ -1284,11 +1287,14 @@ static void chv_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv, if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) { phy = DPIO_PHY0; - assert_pll_disabled(dev_priv, PIPE_A); - assert_pll_disabled(dev_priv, PIPE_B); + if (INTEL_INFO(dev_priv)->num_pipes) { + assert_pll_disabled(dev_priv, PIPE_A); + assert_pll_disabled(dev_priv, PIPE_B); + } } else { phy = DPIO_PHY1; - assert_pll_disabled(dev_priv, PIPE_C); + if (INTEL_INFO(dev_priv)->num_pipes) + assert_pll_disabled(dev_priv, PIPE_C); } dev_priv->chv_phy_control &= ~PHY_COM_LANE_RESET_DEASSERT(phy); @@ -1302,7 +1308,8 @@ static void chv_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv, /* PHY is fully reset now, so we can enable the PHY state asserts */ dev_priv->chv_phy_assert[phy] = true; - assert_chv_phy_status(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + assert_chv_phy_status(dev_priv); } static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum dpio_phy phy, From patchwork Fri Oct 12 21:52:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639319 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EA4B1508 for ; Fri, 12 Oct 2018 21:52:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C5912BF80 for ; Fri, 12 Oct 2018 21:52:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 10B392BF86; Fri, 12 Oct 2018 21:52:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B0E032BF80 for ; Fri, 12 Oct 2018 21:52:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B46BD6E4E2; Fri, 12 Oct 2018 21:52:31 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 71E326E4A3 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806978" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:09 -0700 Message-Id: <20181012215218.5119-7-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/16] drm/i915: Remove redundant checks for num_pipes == 0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This 'if's will always be false because of previous changes so let's drop then. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 12 +++--------- drivers/gpu/drm/i915/intel_bios.c | 5 ----- drivers/gpu/drm/i915/intel_display.c | 3 --- drivers/gpu/drm/i915/intel_fbdev.c | 3 --- drivers/gpu/drm/i915/intel_i2c.c | 3 --- 5 files changed, 3 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 8334d1797df7..d69faf70dcfd 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -645,12 +645,9 @@ static int i915_load_modeset_init(struct drm_device *dev) if (i915_inject_load_failure()) return -ENODEV; - if (INTEL_INFO(dev_priv)->num_pipes) { - ret = drm_vblank_init(&dev_priv->drm, - INTEL_INFO(dev_priv)->num_pipes); - if (ret) - goto out; - } + ret = drm_vblank_init(&dev_priv->drm, INTEL_INFO(dev_priv)->num_pipes); + if (ret) + goto out; intel_bios_init(dev_priv); @@ -683,9 +680,6 @@ static int i915_load_modeset_init(struct drm_device *dev) intel_setup_overlay(dev_priv); - if (INTEL_INFO(dev_priv)->num_pipes == 0) - return 0; - ret = intel_fbdev_init(dev); if (ret) goto cleanup_modeset; diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 1faa494e2bc9..1e0205572ff9 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -1721,11 +1721,6 @@ void intel_bios_init(struct drm_i915_private *dev_priv) const struct bdb_header *bdb; u8 __iomem *bios = NULL; - if (INTEL_INFO(dev_priv)->num_pipes == 0) { - DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); - return; - } - init_vbt_defaults(dev_priv); /* If the OpRegion does not have VBT, look in PCI ROM. */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1d07fc41d492..d369c7336286 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13957,9 +13957,6 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) intel_pps_init(dev_priv); - if (INTEL_INFO(dev_priv)->num_pipes == 0) - return; - /* * intel_edp_init_connector() depends on this completing first, to * prevent the registeration of both eDP and LVDS and the incorrect diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 2480c7d6edee..5eaf1c35332b 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -672,9 +672,6 @@ int intel_fbdev_init(struct drm_device *dev) struct intel_fbdev *ifbdev; int ret; - if (WARN_ON(INTEL_INFO(dev_priv)->num_pipes == 0)) - return -ENODEV; - ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); if (ifbdev == NULL) return -ENOMEM; diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 33d87ab93fdd..9c05f7af68a6 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -817,9 +817,6 @@ int intel_setup_gmbus(struct drm_i915_private *dev_priv) unsigned int pin; int ret; - if (INTEL_INFO(dev_priv)->num_pipes == 0) - return 0; - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE; else if (!HAS_GMCH_DISPLAY(dev_priv)) From patchwork Fri Oct 12 21:52:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639343 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 09E631508 for ; Fri, 12 Oct 2018 21:52:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 086222BF80 for ; Fri, 12 Oct 2018 21:52:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED34A2BF86; Fri, 12 Oct 2018 21:52:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9DA002BF80 for ; Fri, 12 Oct 2018 21:52:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 56BE86E51A; Fri, 12 Oct 2018 21:52:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 87DE66E4E2 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806982" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:10 -0700 Message-Id: <20181012215218.5119-8-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/16] drm/i915: Keep overlay functions naming consistent X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP All other overlay functions(almost all other functions in i915) follow intel_overlay_verb, so renaming overlay ones that do not match that. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 4 ++-- drivers/gpu/drm/i915/intel_overlay.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index d69faf70dcfd..22cebe4871c9 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -678,7 +678,7 @@ static int i915_load_modeset_init(struct drm_device *dev) if (ret) goto cleanup_gmbus; - intel_setup_overlay(dev_priv); + intel_overlay_setup(dev_priv); ret = intel_fbdev_init(dev); if (ret) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d369c7336286..6db3ef975ea8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15823,7 +15823,7 @@ void intel_modeset_cleanup(struct drm_device *dev) drm_mode_config_cleanup(dev); - intel_cleanup_overlay(dev_priv); + intel_overlay_cleanup(dev_priv); intel_teardown_gmbus(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 3dea7a1bda7f..5c33d68a48a4 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1875,8 +1875,8 @@ struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev); bool intel_is_dual_link_lvds(struct drm_device *dev); /* intel_overlay.c */ -void intel_setup_overlay(struct drm_i915_private *dev_priv); -void intel_cleanup_overlay(struct drm_i915_private *dev_priv); +void intel_overlay_setup(struct drm_i915_private *dev_priv); +void intel_overlay_cleanup(struct drm_i915_private *dev_priv); int intel_overlay_switch_off(struct intel_overlay *overlay); int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 72eb7e48e8bc..20ea7c99d13a 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -1338,7 +1338,7 @@ static int get_registers(struct intel_overlay *overlay, bool use_phys) return err; } -void intel_setup_overlay(struct drm_i915_private *dev_priv) +void intel_overlay_setup(struct drm_i915_private *dev_priv) { struct intel_overlay *overlay; int ret; @@ -1387,7 +1387,7 @@ void intel_setup_overlay(struct drm_i915_private *dev_priv) kfree(overlay); } -void intel_cleanup_overlay(struct drm_i915_private *dev_priv) +void intel_overlay_cleanup(struct drm_i915_private *dev_priv) { struct intel_overlay *overlay; From patchwork Fri Oct 12 21:52:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E420933 for ; Fri, 12 Oct 2018 21:52:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1AE312BF80 for ; Fri, 12 Oct 2018 21:52:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0C6792BF86; Fri, 12 Oct 2018 21:52:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C26DB2BF80 for ; Fri, 12 Oct 2018 21:52:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4A6A6E51B; Fri, 12 Oct 2018 21:52:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id C265D6E4E2 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806985" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:11 -0700 Message-Id: <20181012215218.5119-9-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/16] drm/i915: Do not reset display when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Display is always disabled and enabled when reseting any engine, but if display is disabled it should not do anything with display and only reset the needed engines. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_irq.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2e242270e270..e7f551909bfe 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3173,7 +3173,8 @@ static void i915_reset_device(struct drm_i915_private *dev_priv, /* Use a watchdog to ensure that our reset completes */ i915_wedge_on_timeout(&w, dev_priv, 5*HZ) { - intel_prepare_reset(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_prepare_reset(dev_priv); error->reason = reason; error->stalled_mask = engine_mask; @@ -3199,7 +3200,8 @@ static void i915_reset_device(struct drm_i915_private *dev_priv, error->stalled_mask = 0; error->reason = NULL; - intel_finish_reset(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_finish_reset(dev_priv); } if (!test_bit(I915_WEDGED, &error->flags)) From patchwork Fri Oct 12 21:52:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639339 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1560A933 for ; Fri, 12 Oct 2018 21:52:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1310C2BF80 for ; Fri, 12 Oct 2018 21:52:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 07CB32BF86; Fri, 12 Oct 2018 21:52:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9D3FE2BF80 for ; Fri, 12 Oct 2018 21:52:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F8C56E518; Fri, 12 Oct 2018 21:52:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9BBBE6E4E4 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806989" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:12 -0700 Message-Id: <20181012215218.5119-10-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/16] drm/i915: Do not initialize display clocks when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP cdclk and rawclk are the 2 display clocks that can now be completed not initialized when display is disabled. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 9 ++++++--- drivers/gpu/drm/i915/intel_runtime_pm.c | 27 +++++++++++++++++-------- 2 files changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 22cebe4871c9..4ec598b0a737 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -900,7 +900,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv) goto err_uc; intel_irq_init(dev_priv); intel_hangcheck_init(dev_priv); - intel_init_display_hooks(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_init_display_hooks(dev_priv); intel_init_clock_gating_hooks(dev_priv); if (INTEL_INFO(dev_priv)->num_pipes) { intel_init_audio_hooks(dev_priv); @@ -1709,7 +1710,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) goto out_cleanup_mmio; /* must happen before intel_power_domains_init_hw() on VLV/CHV */ - intel_update_rawclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_update_rawclk(dev_priv); /* i915_gem_init() call chain will call * intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ); @@ -2103,7 +2105,8 @@ static int i915_drm_resume(struct drm_device *dev) i915_gem_resume(dev_priv); - intel_modeset_init_hw(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_modeset_init_hw(dev); intel_init_clock_gating(dev_priv); spin_lock_irq(&dev_priv->irq_lock); diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 15fd88bb35f7..3b2588a377a9 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -801,6 +801,9 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + dev_priv->display.get_cdclk(dev_priv, &cdclk_state); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state)); @@ -3293,7 +3296,8 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); - skl_init_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + skl_init_cdclk(dev_priv); gen9_dbuf_enable(dev_priv); @@ -3310,7 +3314,8 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) gen9_dbuf_disable(dev_priv); - skl_uninit_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + skl_uninit_cdclk(dev_priv); /* The spec doesn't call for removing the reset handshake flag */ /* disable PG1 and Misc I/O */ @@ -3355,7 +3360,8 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); - bxt_init_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + bxt_init_cdclk(dev_priv); gen9_dbuf_enable(dev_priv); @@ -3372,7 +3378,8 @@ void bxt_display_core_uninit(struct drm_i915_private *dev_priv) gen9_dbuf_disable(dev_priv); - bxt_uninit_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + bxt_uninit_cdclk(dev_priv); /* The spec doesn't call for removing the reset handshake flag */ @@ -3495,7 +3502,8 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume mutex_unlock(&power_domains->lock); /* 5. Enable CD clock */ - cnl_init_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + cnl_init_cdclk(dev_priv); /* 6. Enable DBUF */ gen9_dbuf_enable(dev_priv); @@ -3518,7 +3526,8 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) gen9_dbuf_disable(dev_priv); /* 3. Disable CD clock */ - cnl_uninit_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + cnl_uninit_cdclk(dev_priv); /* * 4. Disable Power Well 1 (PG1). @@ -3579,7 +3588,8 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); /* 5. Enable CDCLK. */ - icl_init_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + icl_init_cdclk(dev_priv); /* 6. Enable DBUF. */ icl_dbuf_enable(dev_priv); @@ -3606,7 +3616,8 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv) icl_dbuf_disable(dev_priv); /* 3. Disable CD clock */ - icl_uninit_cdclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + icl_uninit_cdclk(dev_priv); /* * 4. Disable Power Well 1 (PG1). From patchwork Fri Oct 12 21:52:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639331 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 41FCD1508 for ; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 407802BF80 for ; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 34BE52BF86; Fri, 12 Oct 2018 21:52:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9979F2BF80 for ; Fri, 12 Oct 2018 21:52:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EFD426E506; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id D8E3B6E4E4 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806991" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:13 -0700 Message-Id: <20181012215218.5119-11-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/16] drm/i915: Do not initialize display core when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With display disabled, driver don't need to enable any power well or load the DMC firmware. The only thing that *_display_core_init will do when display is disabled is call intel_pch_reset_handshake(), so PCH handshake will be unset and in counterpart *_display_core_uninit() will only disable DC. The power wells enabled by BIOS during boot will be disabled in futher patch. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_runtime_pm.c | 56 ++++++++++++++++--------- 1 file changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 3b2588a377a9..8b1c4d0db0af 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3285,6 +3285,9 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, /* enable PCH reset handshake */ intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv)); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + /* enable PG1 and Misc I/O */ mutex_lock(&power_domains->lock); @@ -3296,8 +3299,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); - if (INTEL_INFO(dev_priv)->num_pipes) - skl_init_cdclk(dev_priv); + skl_init_cdclk(dev_priv); gen9_dbuf_enable(dev_priv); @@ -3312,10 +3314,12 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + gen9_dbuf_disable(dev_priv); - if (INTEL_INFO(dev_priv)->num_pipes) - skl_uninit_cdclk(dev_priv); + skl_uninit_cdclk(dev_priv); /* The spec doesn't call for removing the reset handshake flag */ /* disable PG1 and Misc I/O */ @@ -3352,6 +3356,9 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv, */ intel_pch_reset_handshake(dev_priv, false); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + /* Enable PG1 */ mutex_lock(&power_domains->lock); @@ -3360,8 +3367,7 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); - if (INTEL_INFO(dev_priv)->num_pipes) - bxt_init_cdclk(dev_priv); + bxt_init_cdclk(dev_priv); gen9_dbuf_enable(dev_priv); @@ -3376,10 +3382,12 @@ void bxt_display_core_uninit(struct drm_i915_private *dev_priv) gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + gen9_dbuf_disable(dev_priv); - if (INTEL_INFO(dev_priv)->num_pipes) - bxt_uninit_cdclk(dev_priv); + bxt_uninit_cdclk(dev_priv); /* The spec doesn't call for removing the reset handshake flag */ @@ -3475,6 +3483,9 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume /* 1. Enable PCH Reset Handshake */ intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv)); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + /* 2. Enable Comp */ val = I915_READ(CHICKEN_MISC_2); val &= ~CNL_COMP_PWR_DOWN; @@ -3502,8 +3513,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume mutex_unlock(&power_domains->lock); /* 5. Enable CD clock */ - if (INTEL_INFO(dev_priv)->num_pipes) - cnl_init_cdclk(dev_priv); + cnl_init_cdclk(dev_priv); /* 6. Enable DBUF */ gen9_dbuf_enable(dev_priv); @@ -3520,14 +3530,16 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); - /* 1. Disable all display engine functions -> aready done */ + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + + /* 1. Disable all display engine functions -> already done */ /* 2. Disable DBUF */ gen9_dbuf_disable(dev_priv); /* 3. Disable CD clock */ - if (INTEL_INFO(dev_priv)->num_pipes) - cnl_uninit_cdclk(dev_priv); + cnl_uninit_cdclk(dev_priv); /* * 4. Disable Power Well 1 (PG1). @@ -3560,6 +3572,9 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, /* 1. Enable PCH reset handshake. */ intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv)); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + for (port = PORT_A; port <= PORT_B; port++) { /* 2. Enable DDI combo PHY comp. */ val = I915_READ(ICL_PHY_MISC(port)); @@ -3588,8 +3603,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); /* 5. Enable CDCLK. */ - if (INTEL_INFO(dev_priv)->num_pipes) - icl_init_cdclk(dev_priv); + icl_init_cdclk(dev_priv); /* 6. Enable DBUF. */ icl_dbuf_enable(dev_priv); @@ -3610,14 +3624,16 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv) gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); - /* 1. Disable all display engine functions -> aready done */ + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + + /* 1. Disable all display engine functions -> already done */ /* 2. Disable DBUF */ icl_dbuf_disable(dev_priv); /* 3. Disable CD clock */ - if (INTEL_INFO(dev_priv)->num_pipes) - icl_uninit_cdclk(dev_priv); + icl_uninit_cdclk(dev_priv); /* * 4. Disable Power Well 1 (PG1). @@ -3784,11 +3800,11 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume) skl_display_core_init(dev_priv, resume); } else if (IS_GEN9_LP(dev_priv)) { bxt_display_core_init(dev_priv, resume); - } else if (IS_CHERRYVIEW(dev_priv)) { + } else if (IS_CHERRYVIEW(dev_priv) && INTEL_INFO(dev_priv)->num_pipes) { mutex_lock(&power_domains->lock); chv_phy_control_init(dev_priv); mutex_unlock(&power_domains->lock); - } else if (IS_VALLEYVIEW(dev_priv)) { + } else if (IS_VALLEYVIEW(dev_priv) && INTEL_INFO(dev_priv)->num_pipes) { mutex_lock(&power_domains->lock); vlv_cmnlane_wa(dev_priv); mutex_unlock(&power_domains->lock); From patchwork Fri Oct 12 21:52:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 447C01508 for ; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 435D22BF80 for ; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37D882BF86; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D691B2BF80 for ; Fri, 12 Oct 2018 21:52:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA6486E515; Fri, 12 Oct 2018 21:52:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA6626E4A3 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806994" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:14 -0700 Message-Id: <20181012215218.5119-12-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/16] drm/i915: Warn when display irq functions is executed when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With previous changes none of those warnings will be printed but lets add then so CI can caught regressions. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_irq.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_hotplug.c | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e7f551909bfe..92e2c7e081e5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2029,6 +2029,8 @@ static u32 i9xx_hpd_irq_ack(struct drm_i915_private *dev_priv) u32 hotplug_status = 0, hotplug_status_mask; int i; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) hotplug_status_mask = HOTPLUG_INT_STATUS_G4X | @@ -2067,6 +2069,8 @@ static void i9xx_hpd_irq_handler(struct drm_i915_private *dev_priv, { u32 pin_mask = 0, long_mask = 0; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X; @@ -2511,6 +2515,8 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv, enum pipe pipe; u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (hotplug_trigger) ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ilk); @@ -2557,6 +2563,8 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv, enum pipe pipe; u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (hotplug_trigger) ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ivb); @@ -2725,6 +2733,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) u32 iir; enum pipe pipe; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (master_ctl & GEN8_DE_MISC_IRQ) { iir = I915_READ(GEN8_DE_MISC_IIR); if (iir) { @@ -3875,6 +3885,8 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + hotplug_irqs = SDE_HOTPLUG_MASK_SPT; enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_spt); @@ -3903,6 +3915,8 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (INTEL_GEN(dev_priv) >= 8) { hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG; enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bdw); @@ -3965,6 +3979,8 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bxt); hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK; @@ -4682,6 +4698,8 @@ static void i915_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_en; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + lockdep_assert_held(&dev_priv->irq_lock); /* Note HDMI and DP share hotplug bits */ diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index 648a13c6043c..908d8e589f9a 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c @@ -399,6 +399,8 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv, if (!pin_mask) return; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + spin_lock(&dev_priv->irq_lock); for_each_intel_encoder(&dev_priv->drm, encoder) { enum hpd_pin pin = encoder->hpd_pin; From patchwork Fri Oct 12 21:52:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C08B933 for ; Fri, 12 Oct 2018 21:52:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3C82C2BF80 for ; Fri, 12 Oct 2018 21:52:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 313142BF86; Fri, 12 Oct 2018 21:52:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E34692BF80 for ; Fri, 12 Oct 2018 21:52:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 869506E501; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id ECD526E4A3 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806998" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:15 -0700 Message-Id: <20181012215218.5119-13-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 13/16] drm/i915: Do not print DC off mismatch state when DMC firmware in not loaded X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP When DMC firmware is not loaded, it return earlier in gen9_dc_off_power_well_disable() as it will have no effect without DMC firmware loaded. But it will cause a mismatch state error when running intel_power_domains_verify_state(), so skipping this error in this case. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_runtime_pm.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 8b1c4d0db0af..629091ad8337 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -4014,11 +4014,22 @@ static void intel_power_domains_verify_state(struct drm_i915_private *dev_priv) enabled = power_well->desc->ops->is_enabled(dev_priv, power_well); if ((power_well->count || power_well->desc->always_on) != - enabled) + enabled) { + /* If DMC firmware is not loaded it could cause a + * mismatch state as we can't disable DC off, so let's + * do not print any errors in this scenario. + */ + + if (!strcmp("DC off", power_well->desc->name) && + !dev_priv->csr.dmc_payload) + goto skip_state_mismatch_error; + DRM_ERROR("power well %s state mismatch (refcount %d/enabled %d)", power_well->desc->name, power_well->count, enabled); + } +skip_state_mismatch_error: domains_count = 0; for_each_power_domain(domain, power_well->desc->domains) domains_count += power_domains->domain_use_count[domain]; From patchwork Fri Oct 12 21:52:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7303C1508 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71CD32BF80 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 662182BF86; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1CB942BF80 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4D8A6E4EB; Fri, 12 Oct 2018 21:52:31 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id CDD126E4EB for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80807001" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:16 -0700 Message-Id: <20181012215218.5119-14-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 14/16] drm/i915: Do not turn power wells on or off when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP There is just two power wells calls left after the previous changes: - POWER_DOMAIN_INIT: used in load, unload, resume and suspend driver paths - POWER_DOMAIN_GT_IRQ: used by GEM to reduce interrupt latencies when DMC is loaded Instead of adding several more 'if (INTEL_INFO(dev_priv)->num_pipes)' it will be handled in intel_display_power_get/put() and if any erroneous call is added later a error message will be printed making easy get regressions. Other important point is that it will not turn power wells on or off but it will still grab and release runtime power management references this way kernel can power down the whole GPU when it is not in use. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 629091ad8337..56c65d921acd 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1524,6 +1524,9 @@ __intel_display_power_get_domain(struct drm_i915_private *dev_priv, struct i915_power_domains *power_domains = &dev_priv->power_domains; struct i915_power_well *power_well; + if (!INTEL_INFO(dev_priv)->num_pipes) + DRM_ERROR("Enabling a power well with display disabled"); + for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain)) intel_power_well_get(dev_priv, power_well); @@ -1549,6 +1552,13 @@ void intel_display_power_get(struct drm_i915_private *dev_priv, intel_runtime_pm_get(dev_priv); + /* With display disabled this should be the only 2 power domains + * requested + */ + if ((domain == POWER_DOMAIN_INIT || domain == POWER_DOMAIN_GT_IRQ) && + !INTEL_INFO(dev_priv)->num_pipes) + return; + mutex_lock(&power_domains->lock); __intel_display_power_get_domain(dev_priv, domain); @@ -1609,6 +1619,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, struct i915_power_domains *power_domains; struct i915_power_well *power_well; + if ((domain == POWER_DOMAIN_INIT || domain == POWER_DOMAIN_GT_IRQ) && + !INTEL_INFO(dev_priv)->num_pipes) + goto end; + power_domains = &dev_priv->power_domains; mutex_lock(&power_domains->lock); @@ -1623,6 +1637,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); +end: intel_runtime_pm_put(dev_priv); } From patchwork Fri Oct 12 21:52:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639335 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE1A31508 for ; Fri, 12 Oct 2018 21:52:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC80C2BF80 for ; Fri, 12 Oct 2018 21:52:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D110B2BF86; Fri, 12 Oct 2018 21:52:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7E5E22BF80 for ; Fri, 12 Oct 2018 21:52:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 758E26E50C; Fri, 12 Oct 2018 21:52:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C00A6E4E4 for ; Fri, 12 Oct 2018 21:52:30 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80807004" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:17 -0700 Message-Id: <20181012215218.5119-15-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 15/16] drm/i915: Power down any power well left on by BIOS X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Just not enable power wells is not enough as BIOS/firmware can turn on some power wells during boot, so is needed disable those to save power and to avoid mismatch state errors in intel_power_domains_verify_state(). So here disabling every non-real power well first as it could have some dependency in a real power well and then disabling all power wells in reverse(power well 2 depends on power well 1 and so on) other as required by spec. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_runtime_pm.c | 59 +++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 56c65d921acd..0f5016b74228 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3785,6 +3785,61 @@ static void vlv_cmnlane_wa(struct drm_i915_private *dev_priv) static void intel_power_domains_verify_state(struct drm_i915_private *dev_priv); +static void +intel_power_domains_disable_leftovers(struct drm_i915_private *dev_priv) +{ + struct i915_power_domains *power_domains = &dev_priv->power_domains; + struct i915_power_well *power_well; + int i; + + mutex_lock(&power_domains->lock); + + /* Disable everything that is enabled and is not a HW power_well */ + for_each_power_well(dev_priv, power_well) { + WARN_ON(power_well->count); + + /* + * Power wells not belonging to any domain (like the MISC_IO + * and PW1 power wells) are under FW control, so ignore them, + * since their state can change asynchronously. + */ + if (!power_well->desc->domains || power_well->desc->always_on) + continue; + + if (power_well->desc->id != DISP_PW_ID_NONE) + continue; + + if (!power_well->hw_enabled) + continue; + + intel_power_well_disable(dev_priv, power_well); + } + + /* Disabled HW power wells in reverse order, so power well 2 is + * disabled before power well 1 and so on as required by spec. + */ + for (i = power_domains->power_well_count - 1; i >= 0; i--) { + power_well = &power_domains->power_wells[i]; + + WARN_ON(power_well->count); + + if (!power_well->desc->domains || power_well->desc->always_on) + continue; + + if (power_well->desc->id == DISP_PW_ID_NONE) + continue; + + if (!power_well->hw_enabled) + continue; + + intel_power_well_disable(dev_priv, power_well); + } + + mutex_unlock(&power_domains->lock); + + intel_power_domains_verify_state(dev_priv); +} + /** * intel_power_domains_init_hw - initialize hardware power domain state * @dev_priv: i915 device instance @@ -3838,6 +3893,10 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume) intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); intel_power_domains_sync_hw(dev_priv); + /* Disable everything left enabled by BIOS/firmware */ + if (!INTEL_INFO(dev_priv)->num_pipes) + intel_power_domains_disable_leftovers(dev_priv); + power_domains->initializing = false; } From patchwork Fri Oct 12 21:52:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D9231508 for ; Fri, 12 Oct 2018 21:52:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B3462BF80 for ; Fri, 12 Oct 2018 21:52:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F8892BF86; Fri, 12 Oct 2018 21:52:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BF7BE2BF80 for ; Fri, 12 Oct 2018 21:52:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6076D6E4E4; Fri, 12 Oct 2018 21:52:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE1406E4E2 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80807008" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:18 -0700 Message-Id: <20181012215218.5119-16-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 16/16] drm/i915: Guard debugfs against invalid access when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Without this checks in this debugfs, it would try access memory and resorces from display causing the driver to crash. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_debugfs.c | 64 +++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 00c551d3e409..7864bf233d99 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1636,6 +1636,9 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) { struct drm_i915_private *dev_priv = node_to_i915(m->private); + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + seq_printf(m, "FB tracking busy bits: 0x%08x\n", dev_priv->fb_tracking.busy_bits); @@ -1653,6 +1656,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused) if (!HAS_FBC(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + intel_runtime_pm_get(dev_priv); mutex_lock(&fbc->lock); @@ -1729,6 +1735,9 @@ static int i915_ips_status(struct seq_file *m, void *unused) if (!HAS_IPS(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + intel_runtime_pm_get(dev_priv); seq_printf(m, "Enabled by kernel parameter: %s\n", @@ -1753,6 +1762,9 @@ static int i915_sr_status(struct seq_file *m, void *unused) struct drm_i915_private *dev_priv = node_to_i915(m->private); bool sr_enabled = false; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + intel_runtime_pm_get(dev_priv); intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); @@ -1891,6 +1903,9 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data) struct drm_framebuffer *drm_fb; int ret; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + ret = mutex_lock_interruptible(&dev->struct_mutex); if (ret) return ret; @@ -2777,6 +2792,9 @@ i915_edp_psr_debug_set(void *data, u64 val) if (!CAN_PSR(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val); intel_runtime_pm_get(dev_priv); @@ -3222,6 +3240,9 @@ static int i915_display_info(struct seq_file *m, void *unused) struct drm_connector *connector; struct drm_connector_list_iter conn_iter; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + intel_runtime_pm_get(dev_priv); seq_printf(m, "CRTC info\n"); seq_printf(m, "---------\n"); @@ -3326,6 +3347,9 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) struct drm_device *dev = &dev_priv->drm; int i; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_modeset_lock_all(dev); for (i = 0; i < dev_priv->num_shared_dpll; i++) { struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i]; @@ -3398,6 +3422,9 @@ static int i915_ipc_status_open(struct inode *inode, struct file *file) if (!HAS_IPC(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, i915_ipc_status_show, dev_priv); } @@ -3445,6 +3472,9 @@ static int i915_ddb_info(struct seq_file *m, void *unused) if (INTEL_GEN(dev_priv) < 9) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_modeset_lock_all(dev); ddb = &dev_priv->wm.skl_hw.ddb; @@ -3553,6 +3583,9 @@ static int i915_drrs_status(struct seq_file *m, void *unused) struct intel_crtc *intel_crtc; int active_crtc_cnt = 0; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_modeset_lock_all(dev); for_each_intel_crtc(dev, intel_crtc) { if (intel_crtc->base.state->active) { @@ -3579,6 +3612,9 @@ static int i915_dp_mst_info(struct seq_file *m, void *unused) struct drm_connector *connector; struct drm_connector_list_iter conn_iter; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_connector_list_iter_begin(dev, &conn_iter); drm_for_each_connector_iter(connector, &conn_iter) { if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) @@ -3697,6 +3733,11 @@ static int i915_displayport_test_active_show(struct seq_file *m, void *data) static int i915_displayport_test_active_open(struct inode *inode, struct file *file) { + struct drm_i915_private *dev_priv = inode->i_private; + + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, i915_displayport_test_active_show, inode->i_private); } @@ -3718,6 +3759,9 @@ static int i915_displayport_test_data_show(struct seq_file *m, void *data) struct drm_connector_list_iter conn_iter; struct intel_dp *intel_dp; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_connector_list_iter_begin(dev, &conn_iter); drm_for_each_connector_iter(connector, &conn_iter) { struct intel_encoder *encoder; @@ -3762,6 +3806,9 @@ static int i915_displayport_test_type_show(struct seq_file *m, void *data) struct drm_connector_list_iter conn_iter; struct intel_dp *intel_dp; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_connector_list_iter_begin(dev, &conn_iter); drm_for_each_connector_iter(connector, &conn_iter) { struct intel_encoder *encoder; @@ -3878,6 +3925,9 @@ static int pri_wm_latency_open(struct inode *inode, struct file *file) if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, pri_wm_latency_show, dev_priv); } @@ -3888,6 +3938,9 @@ static int spr_wm_latency_open(struct inode *inode, struct file *file) if (HAS_GMCH_DISPLAY(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, spr_wm_latency_show, dev_priv); } @@ -3898,6 +3951,9 @@ static int cur_wm_latency_open(struct inode *inode, struct file *file) if (HAS_GMCH_DISPLAY(dev_priv)) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, cur_wm_latency_show, dev_priv); } @@ -4645,6 +4701,11 @@ static ssize_t i915_hpd_storm_ctl_write(struct file *file, static int i915_hpd_storm_ctl_open(struct inode *inode, struct file *file) { + struct drm_i915_private *dev_priv = inode->i_private; + + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + return single_open(file, i915_hpd_storm_ctl_show, inode->i_private); } @@ -4668,6 +4729,9 @@ static int i915_drrs_ctl_set(void *data, u64 val) if (INTEL_GEN(dev_priv) < 7) return -ENODEV; + if (!INTEL_INFO(dev_priv)->num_pipes) + return -ENODEV; + drm_modeset_lock_all(dev); for_each_intel_crtc(dev, intel_crtc) { if (!intel_crtc->base.state->active ||