From patchwork Tue Jun 23 12:31:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Li X-Patchwork-Id: 11620633 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B62D0138C for ; Tue, 23 Jun 2020 12:34:22 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8EEC320716 for ; Tue, 23 Jun 2020 12:34:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="x5YB0U8I" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8EEC320716 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Q1VCOLXnQ5/8/mV/P63Bm890mLawBTq+VgJvcTzslMU=; b=x5YB0U8I8NRjC+0tKwFCCClVm fPPhx2Eu7lCLajCS2eCm36/yjvR97JZKQzyOv80aOhwix6F4T+RxvMkpMsCLYx9aMFhsF3rnvQxAH TB3loBhMfa0p3Tvnq0YX+gbXA0mmaiUCYG22r0STXlQeWzqH6nB8XO8DL3yz1L6wcmHq6m6sins8j eH9LqO2ZuBJjRx0cZo+5HD0N4v8ioZ30/Xi3AbpriBMgQQfsyZ8+n7V7Lz1aLQJjJPyuYfVxguVxq P5Ix4HERnPEGKHVkFimQ00CekdbbahXNKWFQLXeKHfHhM3edwVJT2gmCb7g0eBBYEplZWQwnOawnd BmGUCR2Rw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jni62-0007aM-Q1; Tue, 23 Jun 2020 12:32:14 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jni5y-0007WW-D2 for linux-arm-kernel@lists.infradead.org; Tue, 23 Jun 2020 12:32:11 +0000 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 4991BC24F155409DC33C; Tue, 23 Jun 2020 20:32:02 +0800 (CST) Received: from euler.huawei.com (10.175.124.27) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Tue, 23 Jun 2020 20:31:58 +0800 From: Wei Li To: Mathieu Poirier , Suzuki K Poulose , Mike Leach , "Arnaldo Carvalho de Melo" , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Kim Phillips Subject: [PATCH 1/2] perf tools: ARM SPE code cleanup Date: Tue, 23 Jun 2020 20:31:40 +0800 Message-ID: <20200623123141.27747-2-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200623123141.27747-1-liwei391@huawei.com> References: <20200623123141.27747-1-liwei391@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.190 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.190 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Remove the useless check code to make it clear. Signed-off-by: Wei Li Reviewed-by: Mathieu Poirier Reviewed-by: Leo Yan --- tools/perf/arch/arm/util/auxtrace.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c index 0a6e75b8777a..62b7b03d691a 100644 --- a/tools/perf/arch/arm/util/auxtrace.c +++ b/tools/perf/arch/arm/util/auxtrace.c @@ -57,7 +57,7 @@ struct auxtrace_record struct evsel *evsel; bool found_etm = false; bool found_spe = false; - static struct perf_pmu **arm_spe_pmus = NULL; + static struct perf_pmu **arm_spe_pmus; static int nr_spes = 0; int i = 0; @@ -65,9 +65,7 @@ struct auxtrace_record return NULL; cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); - - if (!arm_spe_pmus) - arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); + arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); evlist__for_each_entry(evlist, evsel) { if (cs_etm_pmu && From patchwork Tue Jun 23 12:31:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Li X-Patchwork-Id: 11620631 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 87C6690 for ; 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Tue, 23 Jun 2020 20:32:01 +0800 From: Wei Li To: Mathieu Poirier , Suzuki K Poulose , Mike Leach , "Arnaldo Carvalho de Melo" , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Kim Phillips Subject: [PATCH 2/2] perf tools: Fix record failure when mixed with ARM SPE event Date: Tue, 23 Jun 2020 20:31:41 +0800 Message-ID: <20200623123141.27747-3-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200623123141.27747-1-liwei391@huawei.com> References: <20200623123141.27747-1-liwei391@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.190 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.190 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org When recording with cache-misses and arm_spe_x event, i found that it will just fail without showing any error info if i put cache-misses after arm_spe_x event. [root@localhost 0620]# perf record -e cache-misses -e \ arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\ jitter=1,store_filter=1,min_latency=0/ sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.067 MB perf.data ] [root@localhost 0620]# perf record -e \ arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\ store_filter=1,min_latency=0/ -e cache-misses sleep 1 [root@localhost 0620]# Finally, i found the reason is that the parameter 'arm_spe_pmu' passed to arm_spe_recording_init() in auxtrace_record__init() is wrong. When the arm_spe_x event is not the last event, 'arm_spe_pmus[i]' will be out of bounds. It seems that the code can't support concurrent multiple different arm_spe_x events currently. So add the code to check and record the found 'arm_spe_pmu' to fix this issue. In fact, we don't support concurrent multiple same arm_spe_x events either, that is checked in arm_spe_recording_options(), and it will show the relevant info. Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support") Signed-off-by: Wei Li --- tools/perf/arch/arm/util/auxtrace.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c index 62b7b03d691a..7bb6f29e766c 100644 --- a/tools/perf/arch/arm/util/auxtrace.c +++ b/tools/perf/arch/arm/util/auxtrace.c @@ -58,6 +58,7 @@ struct auxtrace_record bool found_etm = false; bool found_spe = false; static struct perf_pmu **arm_spe_pmus; + static struct perf_pmu *arm_spe_pmu; static int nr_spes = 0; int i = 0; @@ -77,6 +78,13 @@ struct auxtrace_record for (i = 0; i < nr_spes; i++) { if (evsel->core.attr.type == arm_spe_pmus[i]->type) { + if (found_spe && (arm_spe_pmu != arm_spe_pmus[i])) { + pr_err("Concurrent multiple SPE operation not currently supported\n"); + *err = -EOPNOTSUPP; + return NULL; + } + + arm_spe_pmu = arm_spe_pmus[i]; found_spe = true; break; } @@ -94,7 +102,7 @@ struct auxtrace_record #if defined(__aarch64__) if (found_spe) - return arm_spe_recording_init(err, arm_spe_pmus[i]); + return arm_spe_recording_init(err, arm_spe_pmu); #endif /*