From patchwork Fri Jun 26 21:44:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 11628823 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 17D951392 for ; Fri, 26 Jun 2020 21:44:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E99812088E for ; Fri, 26 Jun 2020 21:44:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qSFKhELU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E99812088E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C39496E4DD; Fri, 26 Jun 2020 21:44:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qk1-x732.google.com (mail-qk1-x732.google.com [IPv6:2607:f8b0:4864:20::732]) by gabe.freedesktop.org (Postfix) with ESMTPS id 631286E33D; Fri, 26 Jun 2020 21:44:26 +0000 (UTC) Received: by mail-qk1-x732.google.com with SMTP id c139so10141789qkg.12; Fri, 26 Jun 2020 14:44:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/TOmcIBTbOebmE0syY91rhQ2R03YawkWSkLS2JGCebw=; b=qSFKhELU5dLCKiFbKZO3XtokdtKQHA2eFEYaB+mp2FSFQKHX+/MFFjifi+jsaRsv5y dnv2VhHdT8CiDrpW90SZaH43mX8VtVCmiDAQVGabPi5+vbPJuD/nj4eJDcTAKaVgpczR oLmJrD1AIIX36I0+mxy/YvIQ/+sfKQZqH0nGFdoUCjfQo10+VDGGdvyT0rvUMhFYHmcz CTnol0MfP4dQ8kyreTWUytfD2En6Hv+kCuvk2pHdwGGz0mn9waOURP4JaryvZN+tpCgO kZ8IKQCLPGD172dHmfCsCo8l6ejp/nhudz0UdpXB/NHwqveP3tHgwQfrkYp2g6WON42C qGVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/TOmcIBTbOebmE0syY91rhQ2R03YawkWSkLS2JGCebw=; b=WyMnXByBi68YGAn+6Tn4ezAlUfkoOp2LWkRBPeOLNuL70OqUOTno4rH+e53aO9X/DO CiLjkMBSGfYsouTTdQxo8Q1o3jGFHFodM4wQP1c7fk0DAo1z6UIsW1+Xceq6sCgbDNFC DsDlBib5MAvFcoQNJAbJ4aPlZEGMb0/GEUZkMYMH39yxZcNGdmAYVuKOwu2Da6y3boR0 hJRFcRFllLiiVEQ4l05Xo8E3I8E6Y2nQyzjWkH1/HnfGkWVRiLqkXTJmC8zy28TTErio t00ik962RkE+2C/vd5Q5E8sDdrCemlQqYgpM/Lnk3reI+jiidQkM/wMtl1w4NcBOEByJ pFKA== X-Gm-Message-State: AOAM530DT0IJcCUlm9cIs8J3CHwc9/1KfIC9UqBu61k76/pKtoO3iCoU mVzZrfKp+rrUXBikbh1OXy1Mcj0A X-Google-Smtp-Source: ABdhPJxOFPZa5K1uDNFFNE4yKVGJ8TTk0FOrb2uFFtu9uxN3X6zM4Nea2isD6LPWOXTPyv+VNlgcLg== X-Received: by 2002:a37:4d97:: with SMTP id a145mr4733182qkb.380.1593207863844; Fri, 26 Jun 2020 14:44:23 -0700 (PDT) Received: from localhost.localdomain ([71.219.51.205]) by smtp.gmail.com with ESMTPSA id r49sm10967599qtr.11.2020.06.26.14.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jun 2020 14:44:23 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, airlied@gmail.com, daniel.vetter@ffwll.ch Subject: [pull] amdgpu, amdkfd, radeon drm-next-5.9 Date: Fri, 26 Jun 2020 17:44:15 -0400 Message-Id: <20200626214415.4397-1-alexander.deucher@amd.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Dave, Daniel, First pull for 5.9. Big feature here is initial support for a new GPU, sienna cichlid. The following changes since commit 9ca1f474cea0edc14a1d7ec933e5472c0ff115d3: Merge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux into drm-next (2020-05-28 16:10:17 +1000) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux tags/amd-drm-next-5.9-2020-06-26 for you to fetch changes up to 0749c81d923d3d5dcd0de13e32061449d393f1eb: drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS (2020-06-25 13:33:16 -0400) ---------------------------------------------------------------- amd-drm-next-5.9-2020-06-26: amdgpu: - DC DMUB updates - HDCP fixes - Thermal interrupt fixes - Add initial support for Sienna Cichlid GPU - Add support for unique id on Arcturus - Major swSMU code cleanup - Skip BAR resizing if the bios already did id - Fixes for DCN bandwidth calculations - Runtime PM reference count fixes - Add initial UVD support for SI - Add support for ASSR on eDP links - Lots of misc fixes and cleanups - Enable runtime PM on vega10 boards that support BACO - RAS fixes - SR-IOV fixes - Use IP discovery table on renoir - DC stream synchronization fixes amdkfd: - Track SDMA usage per process - Fix GCC10 compiler warnings - Locking fix radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes UAPI: - Update comments to clarify MTYPE ---------------------------------------------------------------- Aditya Pakki (2): drm/radeon: fix multiple reference count leak drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync Alex Deucher (36): drm/amdgpu: simplify ATIF backlight handling drm/amdgpu/sdma4: add renoir to powergating setup drm/amdgpu/gfx10: add navi12 to gfxoff case drm/amdgpu: simplify raven and renoir checks drm/amdgpu: simplify CZ/ST and KV/KB/ML checks drm/amdgpu: simplify mec2 fw check drm/amdgpu/sdma4: simplify the logic around powering up sdma drm/amdgpu: put some case statments in family order drm/amdgpu/gmc10: program the smallK fragment size drm/amdgpu/pm: return an error during GPU reset or suspend (v2) drm/amdgpu: skip gpu_info firmware if discovery info is available drm/amdgpu: clean up discovery testing drm/amdgpu: use IP discovery table for renoir drm/amdgpu/nv: allow access to SDMA status registers drm/amdgpu/nv: remove some dead code drm/amdgpu/nv: enable init reset check drm/amdgpu/fru: fix header guard and include header drm/amdgpu/mes10.1: add no scheduler flag for mes drm/amdgpu/vcn3.0: schedule instance 0 for decode and 1 for encode drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0 Revert "drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper" drm/amdgpu/fence: use the no_scheduler flag drm/amdgpu/display: use blanked rather than plane state for sync groups drm/amdgpu: skip BAR resizing if the bios already did it drm/amdgpu/pm: update comment to clarify Overdrive interfaces drm/amdgpu: fix documentation around busy_percentage drm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync fails drm/amdkfd: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/display bail early in dm_pp_get_static_clocks drm/amdgpu/display: properly guard the calls to swSMU functions drm/amdgpu/uvd3.x: fix register definition warnings drm/amdgpu: make sure to reserve tmr region on all asics which support it drm/amdgpu: rework runtime pm enablement for BACO drm/amdgpu: enable runtime pm on vega10 when noretry=0 Alvin Lee (5): drm/amd/display: Disable PG on NV12 drm/amd/display: Don't compare same stream for synchronized vblank drm/amd/display: Get num_chans from VBIOS table drm/amd/display: Update DCN3 bounding box drm/amd/display: Update bounding box states (v2) Anthony Koo (11): drm/amd/display: FW release 1.0.10 drm/amd/display: FW Release 1.0.11 drm/amd/display: combine public interfaces into single header drm/amd/display: [FW Promotion] Release 1.0.12 drm/amd/display: [FW Promotion] Release 1.0.13 drm/amd/display: [FW Promotion] Release 1.0.14 drm/amd/display: [FW Promotion] Release 1.0.15 drm/amd/display: [FW Promotion] Release 1.0.16 drm/amd/display: [FW Promotion] Release 1.0.17 drm/amd/display: [FW Promotion] Release 1.0.18 drm/amd/display: [FW Promotion] Release 1.0.19 Aric Cyr (10): drm/amd/display: 3.2.85 drm/amd/display: 3.2.86 drm/amd/display: Handle link loss interrupt better drm/amd/display: Guard against invalid array access drm/amd/display: 3.2.87 drm/amd/display: 3.2.88 drm/amd/display: Improve DisplayPort monitor interop drm/amd/display: 3.2.89 drm/amd/display: 3.2.90 drm/amd/display: 3.2.91 Aurabindo Pillai (2): drm/amd/display: Enable use of dmub iff dmcu is disabled drm/amd/display: clip plane rects in DM before passing into DC Bernard Zhao (2): drm/amd: add missing fill of the array`s first element drm/amd: fix potential memleak in err branch Bhawanpreet Lakha (30): drm/amd/display: Fix incorrect HDCP caps for dongle drm/amd/display: Add DCN3 chip ids drm/amd/display: Add DCN3 DIO drm/amd/display: Add DCN3 CLK_MGR drm/amd/display: Add DCN3 DCCG drm/amd/display: Add DCN3 OPTC drm/amd/display: Add DCN3 OPP header drm/amd/display: Add DCN3 MPC drm/amd/display: Add DCN3 DPP drm/amd/display: Add DCN3 HUBHUB drm/amd/display: Add DCN3 HUBP drm/amd/display: Add DCN3 MMHUBHUB drm/amd/display: Add DCN3 DWB drm/amd/display: Add DCN3 DML drm/amd/display: Add DCN3 IRQ drm/amd/display: Add DCN3 GPIO drm/amd/display: Add DCN3 DMUB drm/amd/display: Add DCN3 HWSEQ drm/amd/display: Add DCN3 Support in DM (v2) drm/amd/display: Add DCN3 Resource drm/amd/display: Add DCN3 Command Table Helpers drm/amd/display: Add DCN3 AFMT drm/amd/display: Add DCN3 VPG drm/amd/display: Init function tables for DCN3 drm/amd/display: Handle RGBE_ALPHA Pixel Format drm/amd/display: Remove Unused Registers drm/amdgpu: Enable DM block for DCN3 drm/amd/display: Add DCN3 blocks to Makefile drm/amd/display: Add DCN3 to Kconfig drm/amd/display: enable assr Boyuan Zhang (11): drm/amdgpu: add clock gating DPG mode for VCN3.0 drm/amdgpu: add mc resume DPG mode for VCN3.0 drm/amdgpu: add start DPG mode for VCN3.0 drm/amdgpu: add stop DPG mode for VCN3.0 drm/amdgpu: add pause DPG mode for VCN3.0 drm/amdgpu: set indirect sram mode for VCN3.0 drm/amdgpu: add internal reg offset translation for VCN inst 1 drm/amdgpu: rename macro for VCN1.0 drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0 drm/amdgpu: add workaround for issue in DPG for VCN3.0 drm/amdgpu: enable DPG mode for VCN3.0 Brandon Syu (1): drm/amd/display: use dispclk AVFS for dppclk Camille Cho (1): drm/amd/display: Correctly respond in psr enablement interface Charlene Liu (2): drm/amd/display: correct alpha_en programming for new pixel format drm/amd/display: update audio wall clock programming Chen Tao (2): drm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failed drm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failed Chris Park (2): drm/amd/display: Force ODM combine on 5K+ 420 modes drm/amd/display: Allow 4 split on 10K 420 modes Christian König (2): drm/radeon: disable AGP by default drm/amdgpu: remove distinction between explicit and implicit sync (v2) Colin Ian King (5): drm/amdkfd: fix a dereference of pdd before it is null checked drm/amd/display: fix spelling mistake: "propogation" -> "propagation" drm/amdgpu: remove redundant initialization of variable ret drm/amdgpu: ensure 0 is returned for success in jpeg_v2_5_wait_for_idle drm/radeon: fix array out-of-bounds read and write issues Colton Lewis (1): drm/amd: correct trivial kernel-doc inconsistencies Dale Zhao (2): drm/amd/display: Disable pipe split for modes with borders drm/amd/display: fine tune logic of edid max TMDS clock check Dan Carpenter (2): drm/amd/display: Fix indenting in dcn30_set_output_transfer_func() drm/amdgpu: Fix a buffer overflow handling the serial number David Galiffi (2): drm/amd/display: Increase Default Sizes of FW State and Trace Buffer drm/amd/display: Compare v_front_porch when checking if streams are synchronizable Denis Efremov (3): drm/amd/display: Use kvfree() to free coeff in build_regamma() drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp() drm/radeon: fix fb_div check in ni_init_smc_spll_table() Derek Lai (1): drm/amd/display: VSC SDP supported for SST Dmytro Laktyushkin (8): drm/amd/display: update dml interfaces and variables drm/amd/display: fix dml log2 function drm/amd/display: fix dml immediate flip input drm/amd/display: simplify dml log2 function drm/amd/display: fix and simplify pipe split logic for DCN3 drm/amd/display: remove unnecessary mpcc updates drm/amd/display: make calculate watermarks a function pointer drm/amd/display: fix 4to1 odm MPC_OUT_FLOW_CONTROL_COUNT Emily Deng (3): drm/amdgpu/sriov: Add clear vf fw support drm/amdgpu/sriov: Disable pm for multiple vf sriov drm/amdgpu/sriov: Need to clear kiq position Eric Bernstein (1): drm/amd/display: Allow Diagnostics test with eDP not connected Eric Yang (1): drm/amd/display: add mechanism to skip DCN init Evan Quan (50): drm/amd/powerplay: check whether SMU IP is enabled before access drm/amd/powerplay: ack the SMUToHost interrupt on receive V2 drm/amd/powerplay: update Arcturus smu-driver headers drm/amd/powerplay: implement ASIC specific thermal throttling logging drm/amd/powerplay: enable thermal throttling logging support V2 drm/amdgpu: added a sysfs interface for thermal throttling related V4 drm/amd/powerplay: stop thermal IRQs on suspend drm/amd/powerplay: use the common APIs for IRQ disablement/enablement drm/amd/powerplay: give better names for the thermal IRQ related APIs drm/amd/powerplay: let PMFW to handle the features disablement on BACO in V2 drm/amd/powerplay: eliminate asic type check drm/amd/powerplay: drop unused APIs and unnecessary checks drm/amd/powerplay: implement a common API for dpms disablement drm/amd/powerplay: centralize all buffer allocation in sw_init phase drm/amd/powerplay: clean up the APIs for bootup clocks drm/amd/powerplay: clean up the APIs for pptable setup drm/amd/powerplay: clean up the overdrive settings drm/amd/powerplay: postpone operations not required for hw setup to late_init drm/amd/powerplay: move those operations not needed for resume out drm/amd/powerplay: maximize code sharing between .hw_init and .resume drm/amd/powerplay: sort those operations performed in hw setup drm/amd/powerplay: better namings drm/amd/powerplay: maximize code sharing between .hw_fini and .suspend drm/amd/powerplay: move amdgpu_irq_src to the smu structure allocation drm/amd/powerplay: add firmware cleanup on sw_fini drm/amd/powerplay: skip BACO feature on DPMs disablement drm/amd/powerplay: use work queue to perform throttling logging drm/amd/powerplay: update how to use metrics table on Arcturus drm/amd/powerplay: update how to use metrics table on Navi10 drm/amd/powerplay: update how to use metrics table on Sienna Cichlid drm/amd/powerplay: use the same interval as PMFW on retrieving metrics table drm/amd/powerplay: use MGPU friendly err/warn/info/dbg messages drm/amd/powerplay: forbid to use pr_err/warn/info/debug drm/amd/powerplay: add error messages on some critical paths drm/amd/powerplay: drop dead vce powergate code drm/amd/powerplay: drop unnecessary wrappers drm/amd/powerplay: correct the APIs' naming drm/amd/powerplay: drop unnecessary get_pptable_power_limit wrappers drm/amd/powerplay: maximize code sharing around power limit drm/amd/powerplay: simplify the code around retrieving power limit drm/amd/powerplay: simplify the code around setting power limit drm/amd/powerplay: drop unused code around power limit drm/amd/powerplay: correct power limit retrieving based on current power source drm/amd/powerplay: add check for power limit OD support drm/amd/powerplay: move maximum sustainable clock retrieving to .hw_init drm/amd/powerplay: drop redundant .set_min_dcefclk_deep_sleep API (v2) drm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables drm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check drm/amd/powerplay: revise the calling chain on sensor reading drm/amd/powerplay: maximum code sharing on sensor reading Felix Kuehling (2): drm/amdkfd: Fix GCC 10 compiler warning drm/amdkfd: Add eviction debug messages Flora Cui (2): drm/amd/display: drop duplicated structure drm/amd/display: drop duplicated .dsc_pg_control for dcn30 Gavin Wan (1): drm/amd/amdgpu: Fix the CGCG setting is overwritten for SRIOV. Guchun Chen (3): drm/amdgpu: print warning when input address is invalid drm/amdgpu: fix RAS memory leak in error case drm/amdgpu: remove useless code in RAS Gustavo A. R. Silva (2): drm/radeon/dpm: Replace one-element array and use struct_size() helper drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper Harry Wentland (1): Revert "drm/amd/display: disable dcn20 abm feature for bring up" Hawking Zhang (7): drm/amdgpu: force pa_sc_tile_steering_override to 0 for gfx10.3 drm/amdgpu: add vram_info v2_5 in atomfirmware header drm/amdgpu: support query vram info for sienna_cichlid drm/amdgpu: drop gfx_v10_0_tiling_mode_table_init drm/amdgpu: add firmware_info v3_4 structure for Sienna_Cichlid drm/amdgpu: add atomfirmware helper funciton to query reserved fb size drm/amdgpu: switch to query reserved fb size from vbios (v3) Hua Zhang (1): drm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov mode Huang Rui (1): drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions Hugo Hu (2): drm/amd/display: enable plane if container of plane_status changed drm/amd/display: Revert "enable plane if plane_status changed" Ivan Mironov (1): drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS Jack Xiao (25): drm/amdgpu: assign the doorbell index to mes ring drm/amdgpu: add the ring type definition of MES drm/amdgpu: avoid dereferencing a NULL pointer drm/amdgpu/mes: update some mes definitions drm/amdgpu/mes10.1: allocate the eop buffer drm/amdgpu/mes10.1: initialize the software part of mes ring drm/amdgpu/mes10.1: implement the ring functions of mes specific drm/amdgpu/mes10.1: allocate mqd buffer drm/amdgpu/mes10.1: initialize the mqd drm/amdgpu/mes10.1: install mes queue by register programming drm/amdgpu/mes10.1: install mes queue via kiq drm/amdgpu/mes10.1: enable the mes ring during initialization drm/amdgpu/mes10.1: add the mes fw api drm/amdgpu/mes10.1: add the helper function for mes command submission drm/amdgpu/mes10.1: implement adding hardware queue drm/amdgpu/mes10.1: implement removing hardware queue drm/amdgpu/mes10.1: implement querying the scheduler status drm/amdgpu/mes10.1: implement setting hardware resources drm/amdgpu/mes10.1: add sienna_cichlid mes firmware support drm/amdgpu/mes10.1: copy mes fw info into global fw array drm/amdgpu: upload mes firmware to gpu buffer drm/amdgpu/psp: convert amdgpu mes ucode type drm/amdgpu: no need to set up GPU scheduler for mes ring drm/amdgpu/mes10.1: update mes initialization drm/amdgpu: add mes block to sienna_cichlid Jaehyun Chung (1): drm/amd/display: Handle persistence in DM Jake Wang (2): drm/amd/display: vbios data table packing drm/amd/display: Added local_sink null check before access James Zhu (7): drm/amdgpu: fix typo for vcn3/jpeg3 idle check drm/amdgpu/jpeg: fix race condition issue for jpeg start drm/amdgpu/jpeg1.0: fix no previous prototype for functions drm/amdgpu/jpeg2.0: fix no previous prototype for functions drm/amdgpu/vcn1.0: fix no previous prototype for functions drm/amdgpu/vcn2.0: fix no previous prototype for functions drm/amdgpu: fix unused variable Jay Cornwall (3): drm/amdkfd: Add Sienna_Cichlid trap handler support drm/amdkfd: Support newer assemblers in gfx10 trap handler drm/amdkfd: Support debugger in Navi1x trap handler Jerry (Fangzhi) Zuo (2): drm/amd/display: Add dcn30 Headers (v2) drm/amdgpu/dc: Add missing Sienna_Cichlid chip id John Clements (1): drm/amdgpu: add XGMI support for sienna cichlid John van der Kamp (1): drm/amdgpu/display: Unlock mutex on error Joseph Greathouse (1): drm/amdgpu: Reconfigure ULV for gfx9 server SKUs Jun Lei (1): drm/amd/display: add support for per-state dummy-pstate latency Kenneth Feng (10): drm/amd/amdgpu: fix the HDP LS/DS/SD programming drm/amd/amdgpu: add HDP mgcg and ls support drm/amd/amdgpu: add IH cg support drm/amd/amdgpu: add athub ls support drm/amd/powerplay: enable athub pg drm/amd/powerplay: enable mmhub pg drm/amd/powerplay: enable GPO drm/amd/powerplay: bundle GPO with gfx DPM drm/amd/powerplay: enable fw ctf drm/amd/powerplay: show gfxclk=0 in gfxoff state Kent Russell (2): drm/amdgpu: Add ReadSerial defines for Arcturus drm/amdgpu: Add unique_id and serial_number for Arcturus v3 Kevin Wang (5): drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu drm/amd/powerplay: remove the support of vega20 from swsmu drm/amd/smu: unify pptable_func{} callback interface drm/amd/smu: unify smu ppt callback macros drm/amdgpu: restrict the hw sched jobs number to power of two Le Ma (4): drm/amdgpu/mes: update mes fw api drm/amdgpu/mes: add status fence memory definitions drm/amdgpu/mes: allocate memory slots for hw resource setting drm/amdgpu: skip VM inv eng assignment for mes ring Lei Guo (1): drm/amdgpu/gfx9: Fix incorrect firmware size calculation Leo Liu (14): drm/amdgpu: add VCN3.0 register headers (v2) drm/amdgpu: add 2rd VCN instance doorbell support drm/amdgpu: add VCN3.0 support for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid VCN PG and CG support (v2) drm/amdgpu: enable VCN3.0 PG and CG for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid VCN to the VCN family drm/amdgpu: enable VCN3.0 for Sienna_Cichlid drm/amdgpu: add JPEG3.0 support for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid JPEG PG and CG support drm/amdgpu: enable JPEG3.0 PG and CG for Sienna_Cichlid drm/amdgpu: enable JPEG3.0 for Sienna_Cichlid drm/amdgpu: change the offset for VCN FW cache window drm/amdgpu: fix the PSP front door loading VCN firmware drm/amdgpu: set the LMI ctrl and reset earlier Lewis Huang (1): drm/amd/display: change global buffer to local buffer Likun Gao (95): drm/amdgpu: change memory training to common function drm/amdgpu: add GC 10.3 header files (v2) drm/amdgpu: add sienna_cichlid asic type drm/amdgpu: add sienna_cichlid gpu info firmware v2 drm/amdgpu: set fw load type for sienna_cichlid drm/amdgpu: set asic family and ip blocks for sienna_cichlid drm/amdgpu/gfx10: add support for sienna_cichlid firmware drm/amdgpu/gmc10: add sienna_cichlid support drm/amdgpu/gfx10: add clockgating support for sienna_cichlid drm/amdgpu/soc15: add support for sienna_cichlid drm/amdgpu: initialize IP offset for sienna_cichlid (v2) drm/amdgpu/soc15: add common ip block for sienna_cichlid drm/amdgpu: add support on mmhub for sienna_cichlid drm/amdgpu: add support gfxhub for sienna_cichlid (v3) drm/amdgpu: add gmc ip block for sienna_cichlid drm/amdgpu: add ih ip block for sienna_cichlid drm/amdgpu: add gfx ip block for sienna_cichlid (v3) drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2) drm/amdgpu: add sdma ip block for sienna_cichlid (v5) drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid drm/amdgpu/gfx10: change register configure for sienna_cichlid drm/amdgpu: add virtual display support for sienna_cichlid drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2) drm/amd/powerplay: add support to set performance level for sienna_cichlid drm/amd/powerplay: set SOCCLK DPM for sienna_cichlid drm/amd/powerplay: set FCLK DPM for sienna_cichlid drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlid drm/amd/powerplay: enable Graphics Clock Deep Sleep for sienna_cichlid drm/amd/powerplay: enable SOC Clock Deep Sleep for sienna_cichlid drm/amdgpu/powerplay: set Thermal control for sienna_cichlid drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlid drm/amd/powerplay: make gfx ds can be configure for sienna_cichlid drm/amd/powerplay: Enable SOCCLK ULV for sienna_cichlid drm/amd/powerplay: enable DCEFCLK DPM and DS for sienna_cichlid drm/amd/powerplay: support pcie value set and update for sienna_cichlid drm/amd/powerplay: support to print pcie levels for sienna_cichlid drm/amd/powerplay: enable LCLK DPM for sienna_cichlid drm/amd/powerplay: enable GFX SS for sienna_cichlid drm/amd/powerplay: enable Fan control for sienna_cichlid drm/amd/powerplay: support to get power index for sienna_cichlid drm/amd/powerplay: enable PPT and TDC for sienna_cichlid drm/amdgpu/powerplay: add smu block for sienna_cichlid drm/amdgpu: skip ASD fw load for sienna_cichlid drm/amdgpu/psp: add psp support for sienna_cichlid drm/amdgpu: skip for reroute ih for sienna_cichlid psp ring init currently drm/amdgpu: enable psp ip block for sienna_cichlid drm/amdgpu: update SDMA 5.2 microcode init drm/amdgpu: add support for athub v2.1 drm/amdgpu: add gmc cg support for sienna_cichlid drm/amdgpu: add psp block load condition for sienna_cichlid drm/amdgpu: update the num of queue per pipe for mec on sienna_cichlid drm/amdgpu/mes: correct register offset for sienna_cichlid drm/amdgpu/gfx10: add gc golden setting for sienna_cichlid drm/amdgpu: add cp firmware backdoor loading triger drm/amdgpu: disable gfxoff for sienna_cichlid drm/amdgpu: only send one sdma firmware for sienna_cichlid drm/amdgpu: open GFX clock gating for sienna_cichlid drm/amdgpu: update golden setting for gfx10.3 drm/amdgpu: Enable Multi Media Hub (MMHUB) Clock Gating for sienna_cichlid. drm/amdgpu: fix SDMA hdp flush engine conflict drm/amdgpu: enable 3D pipe 1 on Sienna_Cichlid drm/amd/powerplay: enable VR0HOT for sienna_cichlid drm/amd/powerplay: enable FCLK DS for sienna_cichlid drm/amd/powerplay: enable MM DPM PG for sienna_cichlid (v2) drm/amd/powerplay: enable BACO for sienna_cichlid drm/amd/powerplay: enable APCC DFLL for sienna_cichlid drm/amd/powerplay: add function to get power limit for sienna_cichlid drm/amdgpu: update golden setting for sienna_cichlid drm/amd/powerplay: enable RSMU SMN PG for sienna_cichlid drm/am/powerplay: enable OUT OF BAND MONITER for sienna_cichlid drm/amd/powerplay: enable ULCK DS for sienna_cichlid drm/amd/powerplay: and smc dpm info struct for sienna_cichlid drm/amd/powerplay: append pptable for sienna_cichlid (v2) drm/amd/powerplay: enable VDDCI and MVDD for sienna_cichlid drm/amdgpu: skip GPU scheduler setup for KIQ and MES ring drm/amdgpu: disable runtime pm for sienna_cichlid temporarily drm/amd/powerplay: drop jpeg instance1 dpm setup drm/amdgpu: only use one gfx pipe for Sienna_Cichlid drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid. drm/amd/amdgpu: disable gfxoff to retrieve gfxclk drm/amdgpu: enable gfxoff for sienna_cichlid drm/amdgpu/psp: add structure to support PSP SPL drm/amdgpu/psp: initialization PSP SPL fw drm/amdgpu/psp: support for loading PSP SPL fw drm/amdgpu: update golden setting for sienna_cichlid drm/amd/powerplay: update smu function for sienna_cichlid drm/amd/powerplay: drop sienna_cichlid hardcode of using pptable drm/amdgpu: reserve fb according to return value from vbios drm/amdgpu: support memory training for sienna_cichlid drm/amdgpu: remove unnecessary check for mem train drm/amdgpu: bypass tmr when reserve c2p memory drm/amd/powerplay: move powerplay table operation out of smu_v11_0.c drm/amd/powerplay: add smu v11_0_7 pptable drm/amd/powerplay: update powerplay table for sienna_cichlid drm/amd/powerplay: update driver if file for sienna_cichlid Liu ChengZhe (1): drm/amd/amdgpu: handle return value of amdgpu_driver_load_kms Lorenz Brun (1): drm/amdkfd: Use correct major in devcgroup check Martin Leung (1): drm/amd/display: enable seamless boot for dcn30 Martin Tsai (1): drm/amd/display: Force delay after DP receive power up Michael Strauss (2): drm/amd/display: Fix incorrect dcn1 bandwidth calculations drm/amd/display: implement edid max TMDS clock check in DC Mikita Lipski (1): drm/amd/display: Fix calculation of virtual channel payload Mukul Joshi (2): drm/amdkfd: Track SDMA utilization per process drm/amdkfd: Fix circular locking dependency warning Navid Emamdoost (4): drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms drm/amd/display: fix ref count leak in amdgpu_drm_ioctl drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config drm/amdgpu/display: fix ref count leak when pm_runtime_get_sync fails Nicholas Kazlauskas (11): drm/amd/display: Check bss_data_size before going down legacy DMUB load path drm/amd/display: Don't pass invalid fw_bss_data pointer into DMUB srv drm/amd/display: Add DMUB firmware version helpers in DMUB service drm/amd/display: Support CW4 for DMUB ringbuffer inbox drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print drm/amd/display: Only actually breakpoint if DEBUG_KERNEL_DC is enabled drm/amd/display: Revalidate bandwidth before commiting DC updates drm/amd/display: Use u16 for drm_bpp in DSC calculations drm/amd/display: Fix VBA chroma calculation for pipe splitting drm/amd/display: Fix DML failures caused by doubled stereo viewport drm/amd/display: Fill in dmub_srv fw_version from firmware metadata Nirmoy Das (9): drm/amdgpu: fix compiler warning drm/amdgpu: label internally used symbols as static drm/amdkfd: label internally used symbols as static drm/powerplay: label internally used symbols as static drm/amd/display: label internally used symbols as static drm/amdgpu: remove unused functions drm/powerplay: fix compilation warning drm/amd/powerplay: return current DCEFCLK on sysfs read (v2) drm/amdgpu: call release_firmware() without a NULL check Paul Hsieh (2): drm/amd/display: link_status not align when power off encoder drm/amd/display: unit show garbage when do OPTC blank Peikang Zhang (1): drm/amd/display: Red screen observed on startup Prike.Liang (2): drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing drm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table Qingqing Zhuo (1): drm/amd/display: fix compilation error on allmodconfig Qiushi Wu (1): drm/amdkfd: Fix reference count leaks. Rajneesh Bhardwaj (1): drm/amdgpu: restrict bo mapping within gpu address limits Rodrigo Siqueira (3): drm/amd/display: Add bit swap helper based on endianness drm/amd/display: Rework dsc to isolate FPU operations drm/amd/display: Add helper to convert DC status Roman Li (1): drm/amd/display: Remove unused macro from dcn21 Sandeep Raghuraman (1): drm/amdgpu: Replace invalid device ID with a valid device ID Sonny Jiang (8): drm amdgpu: SI UVD add firmwares drm amdgpu: SI UVD PACKET_TYPE0 drm amdgpu: SI UVD registers drm amdgpu: SI UVD v3_1 (v2) drm amdgpu: SI UVD context rreg/wreg drm amdgpu: SI UVD add uvd_v3_1 to makefile drm amdgpu: SI UVD enable for Oland drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn Stanley.Yang (1): drm/amdgpu: support reserve bad page for virt (v3) Stylon Wang (2): drm/amd/display: Enable output_bpc property on all outputs drm/amd/display: Fix ineffective setting of max bpc property Sung Lee (1): drm/amd/display: Do not fail if build scaling params fails Tianci.Yin (1): drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12 Tom St Denis (4): drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2) drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2) Wenhui Sheng (7): drm/amd/powerplay: add SMC message filter for SMU11 drm/amd/powerplay: enable SMC message filter drm/amd/powerplay: remove SRIOV check in SMU11 (v2) drm/amd/powerplay: add check before i2c_add_adapter drm/amdgpu: remove perf level dpm in one-VF drm/amdgpu: sdma v5_2 ring bo mem leak drm/amdgpu: add fw release for sdma v5_0 Wenjing Liu (4): drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update" drm/amd/display: allow query ddc data over aux to be read only operation drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update Wesley Chalmers (1): drm/amd/display: Move call to disable DPG Wyatt Wood (2): drm/amd/display: Fix ABM memory alignment issue drm/amd/display: Use dmub fw to lock pipe, cursor, dig Yi-Ling Chen (1): drm/amd/display: Fixed using wrong eDP power sequence function pointer Yong Zhao (4): drm/amdgpu: Improve the MTYPE comments drm/amdgpu: Add ATHUB 2.1 header files (v2) drm/amdgpu: Use variable instead of constant for sdma doorbell range drm/amdkfd: Support Sienna_Cichlid KFD v4 Yongqiang Sun (5): drm/amd/display: Implement some asic specific abm call backs. drm/amd/display: Remove nv12 work around drm/amd/display: runtime select dmub emulatior. drm/amd/display: not reset dmub in driver. drm/amd/display: Not doing bios data pack. kernel test robot (1): drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static po-tchen (1): drm/amd/display: Passing initial SDP deadline to dmub shaoyunl (4): drm/amdkfd: sienna_cichlid virtual function support drm/amdgpu: Sienna_Cichlid don't enable SMU for SRIOV drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriov drm/amdgpu/sriov : Add sriov detection for sienna_cichlid Documentation/gpu/amdgpu.rst | 9 +- drivers/gpu/drm/amd/amdgpu/Makefile | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 73 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c | 834 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 79 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 16 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 106 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 134 +- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 18 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 33 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 16 +- drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 43 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 45 +- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 475 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 126 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 33 +- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 115 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 39 + drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 9 + drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 26 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 25 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 178 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 5 - drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 100 + drivers/gpu/drm/amd/amdgpu/athub_v2_1.h | 30 + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 527 +- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 4 + drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 411 + .../inc/dmub_fw_meta.h => amdgpu/gfxhub_v2_1.h} | 50 +- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 94 +- drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 1 + drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 15 +- drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 8 +- drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 613 + drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.h | 29 + drivers/gpu/drm/amd/amdgpu/mes_api_def.h | 443 + drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 664 +- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 76 +- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 21 +- drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 14 +- drivers/gpu/drm/amd/amdgpu/nv.c | 103 +- drivers/gpu/drm/amd/amdgpu/nv.h | 1 + drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 8 + drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 92 +- .../inc/dmub_cmd_dal.h => amdgpu/sdma_common.h} | 42 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 47 +- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 7 +- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.h | 15 - drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 1757 + drivers/gpu/drm/amd/amdgpu/sdma_v5_2.h | 30 + drivers/gpu/drm/amd/amdgpu/si.c | 33 +- drivers/gpu/drm/amd/amdgpu/si_dpm.h | 2 +- drivers/gpu/drm/amd/amdgpu/si_ih.c | 2 + drivers/gpu/drm/amd/amdgpu/sid.h | 26 +- .../gpu/drm/amd/amdgpu/sienna_cichlid_reg_init.c | 54 + drivers/gpu/drm/amd/amdgpu/soc15.c | 16 +- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 15 +- drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 793 + drivers/gpu/drm/amd/amdgpu/uvd_v3_1.h | 29 + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 148 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 127 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 122 +- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 1684 + drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h | 29 + drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 877 +- .../gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 301 +- drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_device.c | 28 + .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 63 +- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 1 + drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 24 +- drivers/gpu/drm/amd/amdkfd/kfd_process.c | 246 +- drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 295 +- drivers/gpu/drm/amd/display/Kconfig | 8 + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 111 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 10 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 8 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 43 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20 + .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 19 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 30 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 25 - drivers/gpu/drm/amd/display/dc/Makefile | 4 + drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 204 + .../amd/display/dc/bios/command_table_helper2.c | 5 + .../dc/bios/dce112/command_table_helper2_dce112.c | 40 + .../dc/bios/dce112/command_table_helper2_dce112.h | 3 + .../gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c | 6 +- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 18 +- drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile | 10 + drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 22 + .../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 18 +- .../drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 3 +- .../gpu/drm/amd/display/dc/clk_mgr/dcn30/dalsmc.h | 60 + .../amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 543 + .../amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.h | 38 + .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c | 255 + .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h | 108 + drivers/gpu/drm/amd/display/dc/core/dc.c | 167 +- drivers/gpu/drm/amd/display/dc/core/dc_debug.c | 59 + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 43 +- drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 42 +- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 163 +- drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 8 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 40 +- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 37 + drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c | 3 - drivers/gpu/drm/amd/display/dc/dc.h | 65 +- drivers/gpu/drm/amd/display/dc/dc_bios_types.h | 5 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 28 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 2 + drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 75 + drivers/gpu/drm/amd/display/dc/dc_link.h | 6 +- drivers/gpu/drm/amd/display/dc/dc_stream.h | 15 + drivers/gpu/drm/amd/display/dc/dc_types.h | 36 + drivers/gpu/drm/amd/display/dc/dce/Makefile | 3 +- drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 20 + drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 4 +- .../gpu/drm/amd/display/dc/dce/dce_clock_source.c | 153 +- .../gpu/drm/amd/display/dc/dce/dce_clock_source.h | 42 + drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 46 + .../gpu/drm/amd/display/dc/dce/dce_panel_cntl.c | 10 +- drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 92 - .../inc/dmub_types.h => dc/dce/dmub_hw_lock_mgr.c} | 78 +- .../gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h | 39 + drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 3 +- .../amd/display/dc/dce110/dce110_hw_sequencer.c | 28 +- .../amd/display/dc/dce110/dce110_hw_sequencer.h | 1 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 12 + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 37 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 + .../drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 7 + .../drm/amd/display/dc/dcn10/dcn10_link_encoder.h | 6 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 13 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 62 + .../amd/display/dc/dcn10/dcn10_stream_encoder.h | 42 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h | 22 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 4 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 17 - drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h | 12 - .../gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c | 9 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 20 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 41 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 134 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 1 + .../drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 7 +- .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 93 +- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 121 +- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.c | 89 + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.h | 6 + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c | 5 +- .../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +- drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 54 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c | 206 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h | 230 + .../gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c | 640 + .../gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.h | 78 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.c | 100 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h | 66 + .../amd/display/dc/dcn30/dcn30_dio_link_encoder.c | 205 + .../amd/display/dc/dcn30/dcn30_dio_link_encoder.h | 76 + .../display/dc/dcn30/dcn30_dio_stream_encoder.c | 851 + .../display/dc/dcn30/dcn30_dio_stream_encoder.h | 269 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 1414 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h | 608 + .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 410 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 264 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h | 923 + .../gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c | 354 + .../gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c | 417 + .../gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h | 119 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c | 532 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h | 292 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 719 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 70 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 141 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.h | 33 + .../gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c | 239 + .../gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.h | 463 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 1409 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 665 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_opp.h | 36 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 365 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h | 333 + .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 2691 + .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.h | 82 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 194 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h | 133 + drivers/gpu/drm/amd/display/dc/dm_cp_psp.h | 1 + drivers/gpu/drm/amd/display/dc/dm_helpers.h | 23 + drivers/gpu/drm/amd/display/dc/dm_services.h | 69 - drivers/gpu/drm/amd/display/dc/dml/Makefile | 7 + .../display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 33 +- .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 33 +- .../display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 36 +- .../amd/display/dc/dml/dcn30/display_mode_vba_30.c | 6865 ++ .../amd/display/dc/dml/dcn30/display_mode_vba_30.h | 43 + .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 1868 + .../display/dc/dml/dcn30/display_rq_dlg_calc_30.h | 69 + .../drm/amd/display/dc/dml/display_mode_enums.h | 6 + .../gpu/drm/amd/display/dc/dml/display_mode_lib.c | 181 + .../gpu/drm/amd/display/dc/dml/display_mode_lib.h | 11 + .../drm/amd/display/dc/dml/display_mode_structs.h | 14 + .../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 67 +- .../gpu/drm/amd/display/dc/dml/display_mode_vba.h | 230 +- .../gpu/drm/amd/display/dc/dml/dml_inline_defs.h | 18 +- drivers/gpu/drm/amd/display/dc/dsc/Makefile | 2 - drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 18 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | 151 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc.h | 5 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c | 27 +- drivers/gpu/drm/amd/display/dc/gpio/Makefile | 10 + .../amd/display/dc/gpio/dcn30/hw_factory_dcn30.c | 257 + .../amd/display/dc/gpio/dcn30/hw_factory_dcn30.h | 33 + .../amd/display/dc/gpio/dcn30/hw_translate_dcn30.c | 387 + .../amd/display/dc/gpio/dcn30/hw_translate_dcn30.h | 35 + drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | 9 +- drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | 8 + drivers/gpu/drm/amd/display/dc/inc/core_status.h | 2 + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 31 +- drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 2 +- drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +- drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 75 + .../drm/amd/display/dc/inc/hw/clk_mgr_internal.h | 14 + drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 6 + drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 7 + drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | 83 + drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 7 +- drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 9 + drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h | 8 + drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 108 + .../gpu/drm/amd/display/dc/inc/hw/stream_encoder.h | 4 + .../drm/amd/display/dc/inc/hw/timing_generator.h | 19 + drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 6 + drivers/gpu/drm/amd/display/dc/inc/resource.h | 3 + drivers/gpu/drm/amd/display/dc/irq/Makefile | 10 + .../amd/display/dc/irq/dcn30/irq_service_dcn30.c | 384 + .../amd/display/dc/irq/dcn30/irq_service_dcn30.h | 37 + drivers/gpu/drm/amd/display/dc/os_types.h | 10 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 27 +- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 500 +- .../gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h | 75 - drivers/gpu/drm/amd/display/dmub/inc/dmub_rb.h | 152 - drivers/gpu/drm/amd/display/dmub/src/Makefile | 3 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 49 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 6 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c | 10 - drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.h | 6 - drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 184 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.h | 50 + drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h | 2 +- drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 91 +- drivers/gpu/drm/amd/display/include/dal_asic_id.h | 4 + drivers/gpu/drm/amd/display/include/dal_types.h | 1 + .../amd/display/include/grph_object_ctrl_defs.h | 5 + drivers/gpu/drm/amd/display/modules/color/Makefile | 2 +- .../drm/amd/display/modules/color/color_gamma.c | 119 +- .../drm/amd/display/modules/color/color_gamma.h | 18 +- .../drm/amd/display/modules/color/color_table.c | 48 + .../drm/amd/display/modules/color/color_table.h | 47 + .../gpu/drm/amd/display/modules/inc/mod_stats.h | 8 +- .../drm/amd/display/modules/power/power_helpers.c | 96 +- .../include/asic_reg/athub/athub_2_1_0_offset.h | 523 + .../include/asic_reg/athub/athub_2_1_0_sh_mask.h | 2378 + .../amd/include/asic_reg/dcn/dcn_3_0_0_offset.h | 17880 +++++ .../amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h | 70929 +++++++++++++++++++ .../amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h | 573 + .../amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h | 3565 + .../drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h | 6 +- .../amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h | 36 + .../amd/include/asic_reg/gc/gc_10_3_0_default.h | 7272 ++ .../drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h | 13473 ++++ .../amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h | 47727 +++++++++++++ .../drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 27 + .../drm/amd/include/asic_reg/gc/gc_9_1_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h | 26 + .../drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h | 26 + .../gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h | 98 + .../drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h | 804 + .../amd/include/asic_reg/vcn/vcn_3_0_0_offset.h | 1542 + .../amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h | 5496 ++ drivers/gpu/drm/amd/include/atomfirmware.h | 283 + .../amd/include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h | 45 + .../amd/include/ivsrcid/sdma3/irqsrcs_sdma3_5_0.h | 45 + .../gpu/drm/amd/include/sienna_cichlid_ip_offset.h | 1168 + drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 1 + drivers/gpu/drm/amd/powerplay/Makefile | 2 +- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 1520 +- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1152 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 10 +- .../gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 4 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 4 +- .../amd/powerplay/hwmgr/vega12_processpptables.c | 2 +- .../gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c | 4 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 6 +- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 84 +- drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h | 3 + .../amd/powerplay/inc/smu11_driver_if_arcturus.h | 12 +- .../powerplay/inc/smu11_driver_if_sienna_cichlid.h | 1220 + drivers/gpu/drm/amd/powerplay/inc/smu_types.h | 4 + drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 35 +- .../gpu/drm/amd/powerplay/inc/smu_v11_0_7_ppsmc.h | 139 + .../drm/amd/powerplay/inc/smu_v11_0_7_pptable.h | 196 + drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h | 2 +- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 747 +- drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 31 +- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2640 + .../sienna_cichlid_ppt.h} | 26 +- drivers/gpu/drm/amd/powerplay/smu_internal.h | 274 +- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 639 +- drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 54 +- drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 4 +- .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 +- .../gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c | 11 +- drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 3288 - drivers/gpu/drm/amd/powerplay/vega20_ppt.h | 179 - drivers/gpu/drm/radeon/ci_dpm.c | 2 +- drivers/gpu/drm/radeon/ni_dpm.c | 9 +- drivers/gpu/drm/radeon/radeon_connectors.c | 20 +- drivers/gpu/drm/radeon/radeon_display.c | 4 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 +- drivers/gpu/drm/radeon/radeon_kms.c | 4 +- include/drm/amd_asic_type.h | 1 + include/uapi/drm/amdgpu_drm.h | 10 +- 363 files changed, 222693 insertions(+), 8642 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c create mode 100644 drivers/gpu/drm/amd/amdgpu/athub_v2_1.c create mode 100644 drivers/gpu/drm/amd/amdgpu/athub_v2_1.h create mode 100644 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_fw_meta.h => amdgpu/gfxhub_v2_1.h} (53%) create mode 100644 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.h create mode 100644 drivers/gpu/drm/amd/amdgpu/mes_api_def.h rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_cmd_dal.h => amdgpu/sdma_common.h} (62%) create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.h create mode 100644 drivers/gpu/drm/amd/amdgpu/sienna_cichlid_reg_init.c create mode 100644 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c create mode 100644 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.h create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dalsmc.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h rename drivers/gpu/drm/amd/display/{dmub/inc/dmub_types.h => dc/dce/dmub_hw_lock_mgr.c} (55%) create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/Makefile create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_opp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.h delete mode 100644 drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h delete mode 100644 drivers/gpu/drm/amd/display/dmub/inc/dmub_rb.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/modules/color/color_table.c create mode 100644 drivers/gpu/drm/amd/display/modules/color/color_table.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_1_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_1_0_sh_mask.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_default.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/sdma3/irqsrcs_sdma3_5_0.h create mode 100644 drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_7_ppsmc.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_7_pptable.h create mode 100644 drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_cmd_vbios.h => powerplay/sienna_cichlid_ppt.h} (74%) delete mode 100644 drivers/gpu/drm/amd/powerplay/vega20_ppt.c delete mode 100644 drivers/gpu/drm/amd/powerplay/vega20_ppt.h