From patchwork Tue Jun 30 09:45:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 11633587 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5E679618 for ; Tue, 30 Jun 2020 09:48:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4E9B32077D for ; Tue, 30 Jun 2020 09:48:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732126AbgF3Js1 (ORCPT ); Tue, 30 Jun 2020 05:48:27 -0400 Received: from ex13-edg-ou-002.vmware.com ([208.91.0.190]:21770 "EHLO EX13-EDG-OU-002.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732110AbgF3JsV (ORCPT ); Tue, 30 Jun 2020 05:48:21 -0400 Received: from sc9-mailhost2.vmware.com (10.113.161.72) by EX13-EDG-OU-002.vmware.com (10.113.208.156) with Microsoft SMTP Server id 15.0.1156.6; Tue, 30 Jun 2020 02:48:19 -0700 Received: from sc2-haas01-esx0118.eng.vmware.com (sc2-haas01-esx0118.eng.vmware.com [10.172.44.118]) by sc9-mailhost2.vmware.com (Postfix) with ESMTP id 0A3C1B27D6; Tue, 30 Jun 2020 05:48:20 -0400 (EDT) From: Nadav Amit To: Paolo Bonzini CC: , Nadav Amit Subject: [kvm-unit-tests PATCH 1/5] x86: Remove boot_idt assembly assignment Date: Tue, 30 Jun 2020 02:45:12 -0700 Message-ID: <20200630094516.22983-2-namit@vmware.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630094516.22983-1-namit@vmware.com> References: <20200630094516.22983-1-namit@vmware.com> MIME-Version: 1.0 Received-SPF: None (EX13-EDG-OU-002.vmware.com: namit@vmware.com does not designate permitted sender hosts) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org boot_idt is now a symbol. Signed-off-by: Nadav Amit --- x86/cstart64.S | 3 --- 1 file changed, 3 deletions(-) diff --git a/x86/cstart64.S b/x86/cstart64.S index b44d0ae..fabcdbf 100644 --- a/x86/cstart64.S +++ b/x86/cstart64.S @@ -2,15 +2,12 @@ #include "apic-defs.h" .globl boot_idt -boot_idt = 0 .globl idt_descr .globl tss_descr .globl gdt64_desc .globl online_cpus -boot_idt = 0 - ipi_vector = 0x20 max_cpus = MAX_TEST_CPUS From patchwork Tue Jun 30 09:45:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 11633581 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7233213B6 for ; Tue, 30 Jun 2020 09:48:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5855B20774 for ; Tue, 30 Jun 2020 09:48:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732133AbgF3JsX (ORCPT ); Tue, 30 Jun 2020 05:48:23 -0400 Received: from ex13-edg-ou-002.vmware.com ([208.91.0.190]:21770 "EHLO EX13-EDG-OU-002.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732126AbgF3JsX (ORCPT ); Tue, 30 Jun 2020 05:48:23 -0400 Received: from sc9-mailhost2.vmware.com (10.113.161.72) by EX13-EDG-OU-002.vmware.com (10.113.208.156) with Microsoft SMTP Server id 15.0.1156.6; Tue, 30 Jun 2020 02:48:19 -0700 Received: from sc2-haas01-esx0118.eng.vmware.com (sc2-haas01-esx0118.eng.vmware.com [10.172.44.118]) by sc9-mailhost2.vmware.com (Postfix) with ESMTP id 180E6B27E6; Tue, 30 Jun 2020 05:48:20 -0400 (EDT) From: Nadav Amit To: Paolo Bonzini CC: , Nadav Amit Subject: [kvm-unit-tests PATCH 2/5] x86: svm: check TSC adjust support Date: Tue, 30 Jun 2020 02:45:13 -0700 Message-ID: <20200630094516.22983-3-namit@vmware.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630094516.22983-1-namit@vmware.com> References: <20200630094516.22983-1-namit@vmware.com> MIME-Version: 1.0 Received-SPF: None (EX13-EDG-OU-002.vmware.com: namit@vmware.com does not designate permitted sender hosts) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org MSR_IA32_TSC_ADJUST may be supported by KVM on AMD machines, but it does not show on AMD manual. Check CPUID to see if it supported before running the relevant tests. Signed-off-by: Nadav Amit --- x86/svm_tests.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/x86/svm_tests.c b/x86/svm_tests.c index a2c993d..92cefaf 100644 --- a/x86/svm_tests.c +++ b/x86/svm_tests.c @@ -893,6 +893,11 @@ static bool npt_rw_l1mmio_check(struct svm_test *test) #define TSC_OFFSET_VALUE (~0ull << 48) static bool ok; +static bool tsc_adjust_supported(void) +{ + return this_cpu_has(X86_FEATURE_TSC_ADJUST); +} + static void tsc_adjust_prepare(struct svm_test *test) { default_prepare(test); @@ -2010,7 +2015,7 @@ struct svm_test svm_tests[] = { { "npt_rw_l1mmio", npt_supported, npt_rw_l1mmio_prepare, default_prepare_gif_clear, npt_rw_l1mmio_test, default_finished, npt_rw_l1mmio_check }, - { "tsc_adjust", default_supported, tsc_adjust_prepare, + { "tsc_adjust", tsc_adjust_supported, tsc_adjust_prepare, default_prepare_gif_clear, tsc_adjust_test, default_finished, tsc_adjust_check }, { "latency_run_exit", default_supported, latency_prepare, From patchwork Tue Jun 30 09:45:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 11633583 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA9FB739 for ; Tue, 30 Jun 2020 09:48:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A8AA02077D for ; Tue, 30 Jun 2020 09:48:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732137AbgF3Js0 (ORCPT ); Tue, 30 Jun 2020 05:48:26 -0400 Received: from ex13-edg-ou-002.vmware.com ([208.91.0.190]:21770 "EHLO EX13-EDG-OU-002.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732078AbgF3JsW (ORCPT ); Tue, 30 Jun 2020 05:48:22 -0400 Received: from sc9-mailhost2.vmware.com (10.113.161.72) by EX13-EDG-OU-002.vmware.com (10.113.208.156) with Microsoft SMTP Server id 15.0.1156.6; Tue, 30 Jun 2020 02:48:19 -0700 Received: from sc2-haas01-esx0118.eng.vmware.com (sc2-haas01-esx0118.eng.vmware.com [10.172.44.118]) by sc9-mailhost2.vmware.com (Postfix) with ESMTP id 2517FB211F; Tue, 30 Jun 2020 05:48:20 -0400 (EDT) From: Nadav Amit To: Paolo Bonzini CC: , Nadav Amit Subject: [kvm-unit-tests PATCH 3/5] x86: svm: flush TLB on each test Date: Tue, 30 Jun 2020 02:45:14 -0700 Message-ID: <20200630094516.22983-4-namit@vmware.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630094516.22983-1-namit@vmware.com> References: <20200630094516.22983-1-namit@vmware.com> MIME-Version: 1.0 Received-SPF: None (EX13-EDG-OU-002.vmware.com: namit@vmware.com does not designate permitted sender hosts) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Several svm tests change PTEs but do not flush the TLB. To avoid messing around or encountering new bugs in the future, flush the TLB on every test. Signed-off-by: Nadav Amit --- x86/svm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/x86/svm.c b/x86/svm.c index f35c063..0fcad8d 100644 --- a/x86/svm.c +++ b/x86/svm.c @@ -170,6 +170,7 @@ void vmcb_ident(struct vmcb *vmcb) if (npt_supported()) { ctrl->nested_ctl = 1; ctrl->nested_cr3 = (u64)pml4e; + ctrl->tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID; } } From patchwork Tue Jun 30 09:45:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 11633589 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF797739 for ; Tue, 30 Jun 2020 09:48:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B12D720774 for ; Tue, 30 Jun 2020 09:48:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732140AbgF3Js3 (ORCPT ); Tue, 30 Jun 2020 05:48:29 -0400 Received: from ex13-edg-ou-001.vmware.com ([208.91.0.189]:49348 "EHLO EX13-EDG-OU-001.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730785AbgF3JsV (ORCPT ); Tue, 30 Jun 2020 05:48:21 -0400 Received: from sc9-mailhost2.vmware.com (10.113.161.72) by EX13-EDG-OU-001.vmware.com (10.113.208.155) with Microsoft SMTP Server id 15.0.1156.6; Tue, 30 Jun 2020 02:48:19 -0700 Received: from sc2-haas01-esx0118.eng.vmware.com (sc2-haas01-esx0118.eng.vmware.com [10.172.44.118]) by sc9-mailhost2.vmware.com (Postfix) with ESMTP id 326FFB27D1; Tue, 30 Jun 2020 05:48:20 -0400 (EDT) From: Nadav Amit To: Paolo Bonzini CC: , Nadav Amit Subject: [kvm-unit-tests PATCH 4/5] x86: svm: wrong reserved bit in npt_rsvd_pfwalk_prepare Date: Tue, 30 Jun 2020 02:45:15 -0700 Message-ID: <20200630094516.22983-5-namit@vmware.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630094516.22983-1-namit@vmware.com> References: <20200630094516.22983-1-namit@vmware.com> MIME-Version: 1.0 Received-SPF: None (EX13-EDG-OU-001.vmware.com: namit@vmware.com does not designate permitted sender hosts) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org According to AMD manual bit 8 in PDPE is not reserved, but bit 7. Signed-off-by: Nadav Amit --- x86/svm_tests.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/svm_tests.c b/x86/svm_tests.c index 92cefaf..323031f 100644 --- a/x86/svm_tests.c +++ b/x86/svm_tests.c @@ -825,13 +825,13 @@ static void npt_rsvd_pfwalk_prepare(struct svm_test *test) vmcb_ident(vmcb); pdpe = npt_get_pdpe(); - pdpe[0] |= (1ULL << 8); + pdpe[0] |= (1ULL << 7); } static bool npt_rsvd_pfwalk_check(struct svm_test *test) { u64 *pdpe = npt_get_pdpe(); - pdpe[0] &= ~(1ULL << 8); + pdpe[0] &= ~(1ULL << 7); return (vmcb->control.exit_code == SVM_EXIT_NPF) && (vmcb->control.exit_info_1 == 0x20000000eULL); From patchwork Tue Jun 30 09:45:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 11633579 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C1BB2618 for ; Tue, 30 Jun 2020 09:48:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B275320774 for ; Tue, 30 Jun 2020 09:48:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732131AbgF3JsW (ORCPT ); Tue, 30 Jun 2020 05:48:22 -0400 Received: from ex13-edg-ou-001.vmware.com ([208.91.0.189]:49348 "EHLO EX13-EDG-OU-001.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732117AbgF3JsV (ORCPT ); Tue, 30 Jun 2020 05:48:21 -0400 Received: from sc9-mailhost2.vmware.com (10.113.161.72) by EX13-EDG-OU-001.vmware.com (10.113.208.155) with Microsoft SMTP Server id 15.0.1156.6; Tue, 30 Jun 2020 02:48:19 -0700 Received: from sc2-haas01-esx0118.eng.vmware.com (sc2-haas01-esx0118.eng.vmware.com [10.172.44.118]) by sc9-mailhost2.vmware.com (Postfix) with ESMTP id 3F86BB27D6; Tue, 30 Jun 2020 05:48:20 -0400 (EDT) From: Nadav Amit To: Paolo Bonzini CC: , Nadav Amit Subject: [kvm-unit-tests PATCH 5/5] x86: svm: avoid advancing rip incorrectly on exc_inject Date: Tue, 30 Jun 2020 02:45:16 -0700 Message-ID: <20200630094516.22983-6-namit@vmware.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630094516.22983-1-namit@vmware.com> References: <20200630094516.22983-1-namit@vmware.com> MIME-Version: 1.0 Received-SPF: None (EX13-EDG-OU-001.vmware.com: namit@vmware.com does not designate permitted sender hosts) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org exc_inject advances the ripon every stage, so it can do so 3 times, but there are only 2 vmmcall instructions that the guest runs. So, if a failure happens on the last test, there is no vmmcall instruction to trigger an exit. Advance the rip only in the two stages in which vmmcall is expected to run. Signed-off-by: Nadav Amit --- x86/svm_tests.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/svm_tests.c b/x86/svm_tests.c index 323031f..a20aa37 100644 --- a/x86/svm_tests.c +++ b/x86/svm_tests.c @@ -1593,8 +1593,6 @@ static void exc_inject_test(struct svm_test *test) static bool exc_inject_finished(struct svm_test *test) { - vmcb->save.rip += 3; - switch (get_test_stage(test)) { case 0: if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { @@ -1602,6 +1600,7 @@ static bool exc_inject_finished(struct svm_test *test) vmcb->control.exit_code); return true; } + vmcb->save.rip += 3; vmcb->control.event_inj = NMI_VECTOR | SVM_EVTINJ_TYPE_EXEPT | SVM_EVTINJ_VALID; break; @@ -1621,6 +1620,7 @@ static bool exc_inject_finished(struct svm_test *test) vmcb->control.exit_code); return true; } + vmcb->save.rip += 3; report(count_exc == 1, "divide overflow exception injected"); report(!(vmcb->control.event_inj & SVM_EVTINJ_VALID), "eventinj.VALID cleared"); break;