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Wed, 01 Jul 2020 15:25:29 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0F0F5100034; Wed, 1 Jul 2020 15:25:29 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id F10072B6DD9; Wed, 1 Jul 2020 15:25:28 +0200 (CEST) Received: from localhost (10.75.127.49) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Jul 2020 15:25:28 +0200 From: Benjamin Gaignard To: , , , , Subject: [PATCH v4 1/5] dt-bindings: bus: Add firewall bindings Date: Wed, 1 Jul 2020 15:25:19 +0200 Message-ID: <20200701132523.32533-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200701132523.32533-1-benjamin.gaignard@st.com> References: <20200701132523.32533-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-01_08:2020-07-01, 2020-07-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_092538_597666_C1153732 X-CRM114-Status: GOOD ( 17.28 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , tomase@xilinx.com, linux-kernel@vger.kernel.org, stefano.stabellini@xilinx.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add schemas for firewall consumer and provider. Signed-off-by: Benjamin Gaignard Reviewed-by: Linus Walleij --- .../bindings/bus/stm32/firewall-consumer.yaml | 36 ++++++++++++++++++++++ .../bindings/bus/stm32/firewall-provider.yaml | 18 +++++++++++ 2 files changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/stm32/firewall-consumer.yaml create mode 100644 Documentation/devicetree/bindings/bus/stm32/firewall-provider.yaml diff --git a/Documentation/devicetree/bindings/bus/stm32/firewall-consumer.yaml b/Documentation/devicetree/bindings/bus/stm32/firewall-consumer.yaml new file mode 100644 index 000000000000..d3d76f99b38d --- /dev/null +++ b/Documentation/devicetree/bindings/bus/stm32/firewall-consumer.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/stm32/firewall-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Bus Firewall consumer binding + +description: | + Firewall properties provide the possible firewall bus controller + configurations for a device. + Bus firewall controllers are typically used to control if a hardware + block can perform read or write operations on bus. + The contents of the firewall bus configuration properties are defined by + the binding for the individual firewall controller device. + + The first configuration 'firewall-0' or the one named 'default' is + applied before probing the device itself. + +maintainers: + - Benjamin Gaignard + +# always select the core schema +select: true + +properties: + firewall-0: true + + firewall-names: true + +patternProperties: + "firewall-[0-9]": + $ref: "/schemas/types.yaml#/definitions/phandle-array" + +dependencies: + firewall-names: [ firewall-0 ] diff --git a/Documentation/devicetree/bindings/bus/stm32/firewall-provider.yaml b/Documentation/devicetree/bindings/bus/stm32/firewall-provider.yaml new file mode 100644 index 000000000000..299824c620ea --- /dev/null +++ b/Documentation/devicetree/bindings/bus/stm32/firewall-provider.yaml @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/stm32/firewall-provider.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Bus Firewall provider binding + +maintainers: + - Benjamin Gaignard + +properties: + '#firewall-cells': + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of cells in a bus firewall specifier + +required: + - '#firewall-cells' From patchwork Wed Jul 1 13:25:20 2020 Content-Type: text/plain; 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Wed, 01 Jul 2020 15:25:30 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 77F8110002A; Wed, 1 Jul 2020 15:25:30 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 648DD2B6DD8; Wed, 1 Jul 2020 15:25:30 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Jul 2020 15:25:29 +0200 From: Benjamin Gaignard To: , , , , Subject: [PATCH v4 2/5] bus: stm32: Introduce firewall controller helpers Date: Wed, 1 Jul 2020 15:25:20 +0200 Message-ID: <20200701132523.32533-3-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200701132523.32533-1-benjamin.gaignard@st.com> References: <20200701132523.32533-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-01_08:2020-07-01, 2020-07-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_092541_146096_A3AC8970 X-CRM114-Status: GOOD ( 32.94 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [62.209.51.94 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , tomase@xilinx.com, linux-kernel@vger.kernel.org, stefano.stabellini@xilinx.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The goal of these helpers are to offer an interface for the hardware blocks controlling bus accesses rights. Bus firewall controllers are typically used to control if a hardware block can perform read or write operations on bus. Smarter firewall controllers could be able to define accesses rights per hardware blocks to control where they can read or write. Firewall controller configurations are provided in device node, parsed by the helpers and send to the driver to apply them. Each controller may need different number and type of inputs to configure the firewall so device-tree properties size have to be define by using "#firewall-cells". Firewall configurations properties have to be named "firewall-X" on device node. "firewall-names" keyword can also be used to give a name to a specific configuration. Example of device-tree: ctrl0: firewall@0 { #firewall-cells = <2>; }; foo: foo@0 { firewall-names = "default", "setting1"; firewall-0 = <&ctrl0 1 2>; firewall-1 = <&ctrl0 3 4>; }; Configurations could be applied with functions like firewall_set_config_by_index() or firewall_set_config_by_name(). firewall_set_default_config() function will apply the configuration named "default" (if existing) or the configuration with index 0 (i.e. firewall-0). Drivers could register/unregister themselves be calling firewall_register/firewall_unregister functions. Signed-off-by: Benjamin Gaignard --- version 4: - use bus API drivers/bus/Kconfig | 2 + drivers/bus/Makefile | 2 + drivers/bus/stm32/Kconfig | 3 + drivers/bus/stm32/Makefile | 1 + drivers/bus/stm32/firewall.c | 251 +++++++++++++++++++++++++++++++++++++++++++ drivers/bus/stm32/firewall.h | 66 ++++++++++++ 6 files changed, 325 insertions(+) create mode 100644 drivers/bus/stm32/Kconfig create mode 100644 drivers/bus/stm32/Makefile create mode 100644 drivers/bus/stm32/firewall.c create mode 100644 drivers/bus/stm32/firewall.h diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 6d4e4497b59b..843b356322d9 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -203,4 +203,6 @@ config DA8XX_MSTPRI source "drivers/bus/fsl-mc/Kconfig" source "drivers/bus/mhi/Kconfig" +source "drivers/bus/stm32/Kconfig" + endmenu diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile index 05f32cd694a4..5e0e34b10235 100644 --- a/drivers/bus/Makefile +++ b/drivers/bus/Makefile @@ -37,3 +37,5 @@ obj-$(CONFIG_DA8XX_MSTPRI) += da8xx-mstpri.o # MHI obj-$(CONFIG_MHI_BUS) += mhi/ + +obj-$(CONFIG_MACH_STM32MP157) += stm32/ \ No newline at end of file diff --git a/drivers/bus/stm32/Kconfig b/drivers/bus/stm32/Kconfig new file mode 100644 index 000000000000..57221e833e2d --- /dev/null +++ b/drivers/bus/stm32/Kconfig @@ -0,0 +1,3 @@ +config FIREWALL_CONTROLLERS + bool "Support of bus firewall controllers" + depends on OF diff --git a/drivers/bus/stm32/Makefile b/drivers/bus/stm32/Makefile new file mode 100644 index 000000000000..eb6b978d6450 --- /dev/null +++ b/drivers/bus/stm32/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_FIREWALL_CONTROLLERS) += firewall.o diff --git a/drivers/bus/stm32/firewall.c b/drivers/bus/stm32/firewall.c new file mode 100644 index 000000000000..234571b8ad11 --- /dev/null +++ b/drivers/bus/stm32/firewall.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) STMicroelectronics 2020 - All Rights Reserved + * Author: Benjamin Gaignard for STMicroelectronics. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "firewall.h" + +struct firewall_device { + struct device dev; + struct firewall_ops *ops; +}; + +struct device firewall_bus = { + .init_name = "firewall", +}; + +static inline struct firewall_device *to_firewall_device(struct device *d) +{ + return container_of(d, struct firewall_device, dev); +} + +static struct bus_type firewall_bus_type = { + .name = "firewall", +}; + +static struct firewall_device *firewall_from_node(struct device_node *np) +{ + struct device *dev; + + dev = bus_find_device_by_of_node(&firewall_bus_type, np); + + return dev ? to_firewall_device(dev) : NULL; +} + +/** + * firewall_dt_has_default + * + * Check if the device node provide firewall configuration + * + * @np: device node with possible firewall configuration + * + * Return: true is firewall-0 property exist in the device node + */ +static bool firewall_dt_has_default(struct device_node *np) +{ + struct property *prop; + int size; + + if (!np) + return false; + + prop = of_find_property(np, "firewall-0", &size); + + return prop ? true : false; +} + +/** + * firewall_set_config_by_index + * + * Set a firewall controller configuration based on given index. + * + * @np: device node with firewall configuration to apply. + * @index: the index of the configuration in device node. + * + * Return: 0 if OK, -EPROBE_DEFER if waiting for firewall controller to be + * registered or negative value on other errors. + */ +int firewall_set_config_by_index(struct device_node *np, int index) +{ + char *propname; + int configs, i, err = 0; + + if (!np) + return 0; + + propname = kasprintf(GFP_KERNEL, "firewall-%d", index); + configs = of_count_phandle_with_args(np, propname, "#firewall-cells"); + if (configs < 0) { + err = -EINVAL; + goto error; + } + + for (i = 0; i < configs; i++) { + struct firewall_device *firewall; + struct of_phandle_args args; + + err = of_parse_phandle_with_args(np, propname, + "#firewall-cells", + i, &args); + if (err) + goto error; + + /* Test if the controller is (or will be) available */ + if (!of_device_is_available(args.np)) { + of_node_put(args.np); + continue; + } + + firewall = firewall_from_node(args.np); + of_node_put(args.np); + + /* Firewall is not yet registered */ + if (!firewall) { + err = -EPROBE_DEFER; + goto error; + } + + err = firewall->ops->set_config(&firewall->dev, &args); + if (err) + goto error; + } + +error: + kfree(propname); + return err; +} +EXPORT_SYMBOL_GPL(firewall_set_config_by_index); + +/** + * firewall_set_config_by_name + * + * Set a firwall controller configuration based on given name. + * + * @np: device node with firewall configuration to apply. + * @name: the name of the configuration in device node. + * + * Return: 0 if OK, -EPROBE_DEFER if waiting for firewall controller to be + * registered or negative value on other errors. + */ +int firewall_set_config_by_name(struct device_node *np, char *name) +{ + const char *configname; + int count, i; + + count = of_property_count_strings(np, "firewall-names"); + for (i = 0; i < count; i++) { + int err; + + err = of_property_read_string_index(np, + "firewall-names", + i, &configname); + if (err) + return err; + + if (strcmp(name, configname)) + continue; + + return firewall_set_config_by_index(np, i); + } + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(firewall_set_config_by_name); + +/** + * firewall_set_default_config + * + * Set the default configuration for device. + * First try to apply configuration named "default", if it fails + * or doesn't exist, try to apply firewall-0 configuration. + * + * @np: device node with firewall configuration to apply. + * + * Return: 0 if OK, -EPROBE_DEFER if waiting for firewall controller to be + * registered or negative value on other errors. + */ +int firewall_set_default_config(struct device_node *np) +{ + int ret; + + /* Nothing to do if device node doesn't contain at least + * one configuration + */ + if (!firewall_dt_has_default(np)) + return 0; + + ret = firewall_set_config_by_name(np, "default"); + if (!ret || (ret == -EPROBE_DEFER)) + return ret; + + return firewall_set_config_by_index(np, 0); +} +EXPORT_SYMBOL_GPL(firewall_set_default_config); + +/** + * firewall_register + * + * Register a firewall controller. + * + * @np: node implementing firewall controller. + * @ops: firewall controller operations. + * + * Return: a pointer on the device if OK or NULL on error. + */ +struct device *firewall_register(struct device_node *np, + struct firewall_ops *ops) +{ + struct firewall_device *firewall; + + if (!np || !ops || !ops->set_config) + return NULL; + + firewall = kzalloc(sizeof(*firewall), GFP_KERNEL); + if (!firewall) + return NULL; + + device_initialize(&firewall->dev); + firewall->dev.init_name = devm_kstrdup(&firewall->dev, + np->name, GFP_KERNEL); + firewall->dev.bus = &firewall_bus_type; + firewall->dev.parent = &firewall_bus; + firewall->dev.of_node = np; + firewall->ops = ops; + + if (device_add(&firewall->dev)) { + kfree(firewall); + return NULL; + } + + return &firewall->dev; +} +EXPORT_SYMBOL_GPL(firewall_register); + +static int __init firewall_init(void) +{ + int ret; + + ret = device_register(&firewall_bus); + if (ret) { + put_device(&firewall_bus); + return ret; + } + + ret = bus_register(&firewall_bus_type); + if (ret) + device_unregister(&firewall_bus); + + return ret; +} + +/* Init early since drivers really need to configure firewall early */ +core_initcall(firewall_init); diff --git a/drivers/bus/stm32/firewall.h b/drivers/bus/stm32/firewall.h new file mode 100644 index 000000000000..ea38f9f7e4ee --- /dev/null +++ b/drivers/bus/stm32/firewall.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) STMicroelectronics 2020 - All Rights Reserved + * Author: Benjamin Gaignard for STMicroelectronics. + */ + +#ifndef _FIREWALL_H_ +#define _FIREWALL_H_ + +#include +#include + +/** + * struct firewall_ops + * + * Firewall controller operations structure to be filled by drivers. + */ +struct firewall_ops { + /** + * @set_config: + * + * Driver callback to set a firewall configuration on a controller. + * Configuration arguments are provided in out_args parameter. + * + * Return: 0 on success, a negative error code on failure. + */ + int (*set_config)(struct device *dev, struct of_phandle_args *out_args); +}; + +#ifdef CONFIG_FIREWALL_CONTROLLERS + +int firewall_set_config_by_index(struct device_node *np, int index); +int firewall_set_config_by_name(struct device_node *np, char *name); +int firewall_set_default_config(struct device_node *np); + +struct device *firewall_register(struct device_node *np, + struct firewall_ops *ops); + +#else + +static inline int firewall_set_config_by_index(struct device_node *np, + int index) +{ + return 0; +} + +static inline int firewall_set_config_by_name(struct device_node *np, + char *name) +{ + return 0; +} + +static inline int firewall_set_default_config(struct device_node *np) +{ + return 0; +} + +static inline struct device *firewall_register(struct device_node *np, + struct firewall_ops *ops) +{ + return NULL; +} + +#endif + +#endif /* _FIREWALL_H_ */ From patchwork Wed Jul 1 13:25:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin GAIGNARD X-Patchwork-Id: 11636361 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 92BE013B4 for ; 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+ reg = <0x5c007000 0x400>; + #firewall-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + +... 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Wed, 01 Jul 2020 15:25:33 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DA2C410002A; Wed, 1 Jul 2020 15:25:32 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id CD2B82B6DD8; Wed, 1 Jul 2020 15:25:32 +0200 (CEST) Received: from localhost (10.75.127.48) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Jul 2020 15:25:31 +0200 From: Benjamin Gaignard To: , , , , Subject: [PATCH v4 4/5] bus: stm32: Add stm32 ETZPC firewall bus controller Date: Wed, 1 Jul 2020 15:25:22 +0200 Message-ID: <20200701132523.32533-5-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200701132523.32533-1-benjamin.gaignard@st.com> References: <20200701132523.32533-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG5NODE2.st.com (10.75.127.14) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-01_08:2020-07-01, 2020-07-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_092540_980902_107C0A23 X-CRM114-Status: GOOD ( 29.03 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , tomase@xilinx.com, linux-kernel@vger.kernel.org, stefano.stabellini@xilinx.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add STM32 Extended TrustZone Protection bus controller. For each of device-tree nodes it will check and apply firewall configuration. If it doesn't match the device will not be probed by platform bus. A device could be configured to be accessible by trusted world, co-processor or non-secure world. Signed-off-by: Benjamin Gaignard --- drivers/bus/stm32/Kconfig | 8 ++ drivers/bus/stm32/Makefile | 1 + drivers/bus/stm32/stm32-etzpc.c | 163 ++++++++++++++++++++++++++++ include/dt-bindings/bus/stm32/stm32-etzpc.h | 90 +++++++++++++++ 4 files changed, 262 insertions(+) create mode 100644 drivers/bus/stm32/stm32-etzpc.c create mode 100644 include/dt-bindings/bus/stm32/stm32-etzpc.h diff --git a/drivers/bus/stm32/Kconfig b/drivers/bus/stm32/Kconfig index 57221e833e2d..5dc6e2504de5 100644 --- a/drivers/bus/stm32/Kconfig +++ b/drivers/bus/stm32/Kconfig @@ -1,3 +1,11 @@ config FIREWALL_CONTROLLERS bool "Support of bus firewall controllers" depends on OF + +config STM32_ETZPC + bool "STM32 ETZPC bus controller" + depends on MACH_STM32MP157 + select FIREWALL_CONTROLLERS + help + Select y to enable STM32 Extended TrustZone Protection + Controller (ETZPC) diff --git a/drivers/bus/stm32/Makefile b/drivers/bus/stm32/Makefile index eb6b978d6450..d42e99b5865e 100644 --- a/drivers/bus/stm32/Makefile +++ b/drivers/bus/stm32/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_FIREWALL_CONTROLLERS) += firewall.o +obj-$(CONFIG_STM32_ETZPC) += stm32-etzpc.o diff --git a/drivers/bus/stm32/stm32-etzpc.c b/drivers/bus/stm32/stm32-etzpc.c new file mode 100644 index 000000000000..ad0e16eea66b --- /dev/null +++ b/drivers/bus/stm32/stm32-etzpc.c @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) STMicroelectronics 2020 - All Rights Reserved + * Author: Benjamin Gaignard for STMicroelectronics. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "firewall.h" + +#define ETZPC_DECPROT 0x010 +#define ETZPC_NUM_LOCKS 94 + +struct stm32_etzpc { + struct regmap_field *fields[ETZPC_NUM_LOCKS]; +}; + +static int stm32_etzpc_set_config(struct device *dev, + struct of_phandle_args *out_args) +{ + struct stm32_etzpc *etzpc = dev_get_drvdata(dev); + int index = out_args->args[0]; + unsigned int value = out_args->args[1]; + u32 status; + + if (out_args->args_count != 2) + return -EINVAL; + + if (index >= ETZPC_NUM_LOCKS) + return -EINVAL; + + if (value > STM32_ETZPC_NON_SECURE) + return -EINVAL; + + regmap_field_force_write(etzpc->fields[index], value); + + /* Hardware could denied the new value, read it back to check it */ + regmap_field_read(etzpc->fields[index], &status); + + if (value != status) { + pr_info("failed to set configuration: index %d, value %d\n", + index, value); + return -EINVAL; + } + + return 0; +} + +static struct firewall_ops stm32_etzpc_ops = { + .set_config = stm32_etzpc_set_config, +}; + +static const struct regmap_config stm32_etzpc_regmap_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = sizeof(u32), + .max_register = 0x3FF, +}; + +static void stm32_etzpc_populate(struct device *parent) +{ + struct device_node *child; + + if (!parent) + return; + + for_each_available_child_of_node(dev_of_node(parent), child) { + if (firewall_set_default_config(child)) { + /* + * Failed to set firewall configuration mark the node + * as populated so platform bus won't probe it + */ + of_node_set_flag(child, OF_POPULATED); + dev_info(parent, "%s: Bad firewall configuration\n", + child->name); + } + } +} + +static int stm32_etzpc_probe(struct platform_device *pdev) +{ + struct stm32_etzpc *etzpc; + struct device *firewall; + struct regmap *regmap; + struct resource *res; + void __iomem *mmio; + int i; + + etzpc = devm_kzalloc(&pdev->dev, sizeof(*etzpc), GFP_KERNEL); + if (!etzpc) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mmio = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(mmio)) + return PTR_ERR(mmio); + + regmap = devm_regmap_init_mmio(&pdev->dev, mmio, + &stm32_etzpc_regmap_cfg); + + for (i = 0; i < ETZPC_NUM_LOCKS; i++) { + struct reg_field field; + + /* + * Each hardware block status is defined by + * a 2 bits field and all of them are packed into + * 32 bits registers. Do some computation to get + * register offset and the shift. + */ + field.reg = ETZPC_DECPROT + (i >> 4) * sizeof(u32); + field.lsb = (i % 0x10) << 1; + field.msb = field.lsb + 1; + + etzpc->fields[i] = devm_regmap_field_alloc(&pdev->dev, + regmap, field); + } + + platform_set_drvdata(pdev, etzpc); + + firewall = firewall_register(dev_of_node(&pdev->dev), + &stm32_etzpc_ops); + if (!firewall) + return -EINVAL; + + dev_set_drvdata(firewall, etzpc); + + stm32_etzpc_populate(&pdev->dev); + + return 0; +} + +static const struct of_device_id stm32_etzpc_of_match[] = { + { .compatible = "st,stm32-etzpc-bus" }, + { /* end node */ } +}; +MODULE_DEVICE_TABLE(of, stm32_etzpc_of_match); + +static struct platform_driver stm32_etzpc_driver = { + .probe = stm32_etzpc_probe, + .driver = { + .name = "stm32-etzpc", + .of_match_table = stm32_etzpc_of_match, + }, +}; + +static int __init stm32_etzpc_init(void) +{ + return platform_driver_register(&stm32_etzpc_driver); +} +arch_initcall(stm32_etzpc_init); + +MODULE_AUTHOR("Benjamin Gaignard "); +MODULE_DESCRIPTION("STMicroelectronics STM32 Bus Firewall Controller"); diff --git a/include/dt-bindings/bus/stm32/stm32-etzpc.h b/include/dt-bindings/bus/stm32/stm32-etzpc.h new file mode 100644 index 000000000000..9c4783b9783c --- /dev/null +++ b/include/dt-bindings/bus/stm32/stm32-etzpc.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) STMicroelectronics 2020 - All Rights Reserved + * Author: Benjamin Gaignard for STMicroelectronics. + */ + +#ifndef _STM32_ETZPC_H_ +#define _STM32_ETZPC_H_ + +/* ETZPC configurations: trust-zone, non-secure or coprocessor*/ +#define STM32_ETZPC_TRUST 1 +#define STM32_ETPCZ_COPRO 2 +#define STM32_ETZPC_NON_SECURE 3 + +/* ETZPC hard blocks index */ +#define STM32_ETZPC_USART1 3 +#define STM32_ETZPC_SPI6 4 +#define STM32_ETZPC_I2C4 5 +#define STM32_ETZPC_RNG1 7 +#define STM32_ETZPC_HASH1 8 +#define STM32_ETZPC_CRYP1 9 +#define STM32_ETZPC_I2C6 12 +#define STM32_ETZPC_TIM2 16 +#define STM32_ETZPC_TIM3 17 +#define STM32_ETZPC_TIM4 18 +#define STM32_ETZPC_TIM5 19 +#define STM32_ETZPC_TIM6 20 +#define STM32_ETZPC_TIM7 21 +#define STM32_ETZPC_TIM12 22 +#define STM32_ETZPC_TIM13 23 +#define STM32_ETZPC_TIM14 24 +#define STM32_ETZPC_LPTIM1 25 +#define STM32_ETZPC_SPI2 27 +#define STM32_ETZPC_SPI3 28 +#define STM32_ETZPC_USART2 30 +#define STM32_ETZPC_USART3 31 +#define STM32_ETZPC_USART4 32 +#define STM32_ETZPC_USART5 33 +#define STM32_ETZPC_I2C1 34 +#define STM32_ETZPC_I2C2 35 +#define STM32_ETZPC_I2C3 36 +#define STM32_ETZPC_I2C5 37 +#define STM32_ETZPC_CEC 38 +#define STM32_ETZPC_DAC 39 +#define STM32_ETZPC_UART7 40 +#define STM32_ETZPC_UART8 41 +#define STM32_ETZPC_MDIOS 44 +#define STM32_ETZPC_TIM1 48 +#define STM32_ETZPC_TIM8 49 +#define STM32_ETZPC_USART6 51 +#define STM32_ETZPC_SPI1 52 +#define STM32_ETZPC_SPI4 53 +#define STM32_ETZPC_TIM15 54 +#define STM32_ETZPC_TIM16 55 +#define STM32_ETZPC_TIM17 56 +#define STM32_ETZPC_SPI5 57 +#define STM32_ETZPC_SAI1 58 +#define STM32_ETZPC_SAI2 59 +#define STM32_ETZPC_SAI3 60 +#define STM32_ETZPC_DFSDM 61 +#define STM32_ETZPC_TT_FDCAN 62 +#define STM32_ETZPC_LPTIM2 64 +#define STM32_ETZPC_LPTIM3 65 +#define STM32_ETZPC_LPTIM4 66 +#define STM32_ETZPC_LPTIM5 67 +#define STM32_ETZPC_SAI4 68 +#define STM32_ETZPC_VREFBUF 69 +#define STM32_ETZPC_DCMI 70 +#define STM32_ETZPC_CRC2 71 +#define STM32_ETZPC_ADC 72 +#define STM32_ETZPC_HASH2 73 +#define STM32_ETZPC_RNG2 74 +#define STM32_ETZPC_CRYP2 75 +#define STM32_ETZPC_SRAM1 80 +#define STM32_ETZPC_SRAM2 81 +#define STM32_ETZPC_SRAM3 82 +#define STM32_ETZPC_SRAM4 83 +#define STM32_ETZPC_RETRAM 84 +#define STM32_ETZPC_OTG 85 +#define STM32_ETZPC_SDMMC3 86 +#define STM32_ETZPC_DLYBSD3 87 +#define STM32_ETZPC_DMA1 88 +#define STM32_ETZPC_DMA2 89 +#define STM32_ETZPC_DMAMUX 90 +#define STM32_ETZPC_FMC 91 +#define STM32_ETZPC_QSPI 92 +#define STM32_ETZPC_DLYBQ 93 +#define STM32_ETZPC_ETH1 94 + +#endif /* _STM32_ETZPC_H_ */ From patchwork Wed Jul 1 13:25:23 2020 Content-Type: text/plain; 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Wed, 01 Jul 2020 15:25:34 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EB39510002A; Wed, 1 Jul 2020 15:25:33 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DE7132B6DD6; Wed, 1 Jul 2020 15:25:33 +0200 (CEST) Received: from localhost (10.75.127.50) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Jul 2020 15:25:33 +0200 From: Benjamin Gaignard To: , , , , Subject: [PATCH v4 5/5] ARM: dts: stm32: Use ETZPC firewall bus Date: Wed, 1 Jul 2020 15:25:23 +0200 Message-ID: <20200701132523.32533-6-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200701132523.32533-1-benjamin.gaignard@st.com> References: <20200701132523.32533-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG4NODE1.st.com (10.75.127.10) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-01_08:2020-07-01, 2020-07-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_092544_135256_1DD85F6B X-CRM114-Status: GOOD ( 14.77 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [62.209.51.94 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , tomase@xilinx.com, linux-kernel@vger.kernel.org, stefano.stabellini@xilinx.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Allow STM32 ETZPC to check firewall configuration before populating the platform bus. Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32mp151.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 3ea05ba48215..0290eb6f3c35 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -4,6 +4,7 @@ * Author: Ludovic Barre for STMicroelectronics. */ #include +#include #include #include @@ -110,8 +111,10 @@ status = "disabled"; }; - soc { - compatible = "simple-bus"; + etzpc_bus: soc@5c007000 { + compatible = "st,stm32-etzpc-bus", "simple-bus"; + reg = <0x5c007000 0x400>; + #firewall-cells = <2>; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>;