From patchwork Thu Jul 2 00:45:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 11637637 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54DAE13B6 for ; Thu, 2 Jul 2020 00:45:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3D4FD2085B for ; Thu, 2 Jul 2020 00:45:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="AKIHQJeQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728121AbgGBApw (ORCPT ); Wed, 1 Jul 2020 20:45:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727993AbgGBApe (ORCPT ); Wed, 1 Jul 2020 20:45:34 -0400 Received: from mail-pj1-x1044.google.com (mail-pj1-x1044.google.com [IPv6:2607:f8b0:4864:20::1044]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 360CBC08C5DB for ; Wed, 1 Jul 2020 17:45:34 -0700 (PDT) Received: by mail-pj1-x1044.google.com with SMTP id l6so8576755pjq.1 for ; Wed, 01 Jul 2020 17:45:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jkGcjxRkJ6dCPuaybiPstZAyKU85uMADDKqqgUxYero=; b=AKIHQJeQnAOPNI2gGQrvqd9S3Y7bK1oz1xUxjXASgco2p5Jnkbd+JOewpSZ4lCXVg4 onxJ3xvwbcwmLysRT7TDcyysWiMh4Ozitkz6tPoOlIS40R2T00KA+cqLdghcXBdL8FnW jveDSJpqRdDLw9TAHu5CGsM5eclZzjtUsdpOU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jkGcjxRkJ6dCPuaybiPstZAyKU85uMADDKqqgUxYero=; b=o6cF6ECbIhseOjakJOTv5+XVz9ugZzD04d3DpnD6jUbHil8d40Ftai/HpkrPpH9pjw nVqeq8JOZVh1sdU7H/ldA2qvKzGh1J/vN6A/WLcmWN7d3F4N6DodyHczZcqVQhx73A2j hF7+8SqiQ3xYGfQsQoJKo5jYHIx0ydWrqAOqD1YUW20HuPTI5AvbMD0GVnNVbr8ThIEJ 3ZOx/ujXgqVqs5BAQotvOhIT7lFmQuBDKOTk/dgU18sM1OTtfPytI4WLGfkYbZ9lperm 2rurD7+7vgOLMCZ5PxauVsbuJ1wiXvkfG7XZtQBRO99/utsy/uW8f78/z+A90t8BQZe9 N2sg== X-Gm-Message-State: AOAM5324WnO8O+oDT6Ozb4DCYaj25I7ptp1feBgxYuaK2wYPJyxMr3PY OvjpV59oMOChZ83nD9O4mVqmlA== X-Google-Smtp-Source: ABdhPJxlhWIfAqHpE6aUGK+1UfUbqkZMAkfT4oF9/Vd/2Zzi+2KGX6ovV/CJ4W2f0mhqUZMvNbVxlA== X-Received: by 2002:a17:902:b216:: with SMTP id t22mr23734470plr.181.1593650733748; Wed, 01 Jul 2020 17:45:33 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id w4sm6966212pfd.39.2020.07.01.17.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2020 17:45:33 -0700 (PDT) From: Douglas Anderson To: Mark Brown , Andy Gross , Bjorn Andersson Cc: akashast@codeaurora.org, linux-arm-msm@vger.kernel.org, mkshah@codeaurora.org, swboyd@chromium.org, georgi.djakov@linaro.org, ctheegal@codeaurora.org, mka@chromium.org, Douglas Anderson , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 1/3] spi: spi-geni-qcom: Avoid clock setting if not needed Date: Wed, 1 Jul 2020 17:45:07 -0700 Message-Id: <20200701174506.1.Icfdcee14649fc0a6c38e87477b28523d4e60bab3@changeid> X-Mailer: git-send-email 2.27.0.383.g050319c2ae-goog In-Reply-To: <20200702004509.2333554-1-dianders@chromium.org> References: <20200702004509.2333554-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Every SPI transfer could have a different clock rate. The spi-geni-qcom controller code to deal with this was never very well optimized and has always had a lot of code plus some calls into the clk framework which, at the very least, would grab a mutex. However, until recently, the overhead wasn't _too_ much. That changed with commit 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") we're now calling geni_icc_set_bw(), which leads to a bunch of math plus: geni_icc_set_bw() icc_set_bw() apply_constraints() qcom_icc_set() qcom_icc_bcm_voter_commit() rpmh_invalidate() rpmh_write_batch() ...and those rpmh commands can be a bit beefy if you call them too often. We already know what speed we were running at before, so if we see that nothing has changed let's avoid the whole pile of code. On my hardware, this made spi_geni_prepare_message() drop down from ~145 us down to ~14 us. NOTE: Potentially it might also make sense to add some code into the interconnect framework to avoid executing so much code when bandwidth isn't changing, but even if we did that we still want to short circuit here to save the extra math / clock calls. Fixes: 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") Signed-off-by: Douglas Anderson Reviewed-by: Akash Asthana Acked-by: Mark Brown --- drivers/spi/spi-geni-qcom.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index e01c782ef7d0..bb4cdda2dec8 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -201,6 +201,9 @@ static int geni_spi_set_clock_and_bw(struct spi_geni_master *mas, struct geni_se *se = &mas->se; int ret; + if (clk_hz == mas->cur_speed_hz) + return 0; + ret = get_spi_clk_cfg(clk_hz, mas, &idx, &div); if (ret) { dev_err(mas->dev, "Err setting clk to %lu: %d\n", clk_hz, ret); @@ -339,11 +342,9 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, } /* Speed and bits per word can be overridden per transfer */ - if (xfer->speed_hz != mas->cur_speed_hz) { - ret = geni_spi_set_clock_and_bw(mas, xfer->speed_hz); - if (ret) - return; - } + ret = geni_spi_set_clock_and_bw(mas, xfer->speed_hz); + if (ret) + return; mas->tx_rem_bytes = 0; mas->rx_rem_bytes = 0; From patchwork Thu Jul 2 00:45:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 11637627 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B6EB174A for ; Thu, 2 Jul 2020 00:45:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 624702083E for ; Thu, 2 Jul 2020 00:45:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="OgTYIQGo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728059AbgGBApg (ORCPT ); Wed, 1 Jul 2020 20:45:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728051AbgGBApf (ORCPT ); Wed, 1 Jul 2020 20:45:35 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 396FFC08C5DC for ; Wed, 1 Jul 2020 17:45:35 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id f16so1353517pjt.0 for ; Wed, 01 Jul 2020 17:45:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qKjLnIEQ5s8BQOFR0Dm9JoOFH5y6dFVrqIR/bR40PHg=; b=OgTYIQGoqbGGi3TqnnISr32Pc9Qf/cJx2SkEpLvV3ryeXnjuKg5CKulguIVQYnpVM8 97+zU4abqfcA3ysytFl0KTHUVA4yjlxTnti3dbuIa8oxpVK/ci36uTT5yxsxbcINAhtx ucYdEsaWG/rhk5E1IbgAIk51mo9Mc7+IBPJLM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qKjLnIEQ5s8BQOFR0Dm9JoOFH5y6dFVrqIR/bR40PHg=; b=R5QYZcNk1MRL3m7Hc8PG9CDk/nnaJV18GQLByisNORueJwcDA7obuynFtBUYJinDur BFYFv5rCFqFtGBJDEItHRI8BO8HqA/1nAQGZlypiQVeAt1f2ZVB6ybmQLabQMaTqd2JE RHH7CpERtwtt+sDOaEjtWZQPSo9H1VkIPBayegz1JWbnXJ4/eJGMkFviXl7iNjR6cjM3 bXxgntxqsjAmSdjdoLXzTICECAs5BMftHdSXtR0CWpAo7IeWy7wfH6FZ4I61iyMM+Pd6 qerHnnzY4SR1bJcKW2zKNMp+7X43tOZQEH/Ks0QLyhmhUDfHIvI1ktj+a1x1b0+ulFLd uJJQ== X-Gm-Message-State: AOAM530SeEO2Pg9kL9AdpMxIvj6Q/VTafLyCI2KyNo6rHf/RN7zzYCyL M28DtMCGDrOsDob4+AZ1BmWQrQ== X-Google-Smtp-Source: ABdhPJwpOlo75/PNS/C5MOdlszShYU92XZBrkp+HcSUZD+vA7JbAvH5XAw3YsxEce5XF/aiIC7cU7Q== X-Received: by 2002:a17:902:ff10:: with SMTP id f16mr24605718plj.277.1593650734789; Wed, 01 Jul 2020 17:45:34 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id w4sm6966212pfd.39.2020.07.01.17.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2020 17:45:34 -0700 (PDT) From: Douglas Anderson To: Mark Brown , Andy Gross , Bjorn Andersson Cc: akashast@codeaurora.org, linux-arm-msm@vger.kernel.org, mkshah@codeaurora.org, swboyd@chromium.org, georgi.djakov@linaro.org, ctheegal@codeaurora.org, mka@chromium.org, Douglas Anderson , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 2/3] spi: spi-geni-qcom: Set an autosuspend delay of 250 ms Date: Wed, 1 Jul 2020 17:45:08 -0700 Message-Id: <20200701174506.2.I9b8f6bb1e7e6d8847e2ed2cf854ec55678db427f@changeid> X-Mailer: git-send-email 2.27.0.383.g050319c2ae-goog In-Reply-To: <20200702004509.2333554-1-dianders@chromium.org> References: <20200702004509.2333554-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In commit 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") the spi_geni_runtime_suspend() and spi_geni_runtime_resume() became a bit slower. Measuring on my hardware I see numbers in the hundreds of microseconds now. Let's use autosuspend to help avoid some of the overhead. Now if we're doing a bunch of transfers we won't need to be constantly chruning. The number 250 ms for the autosuspend delay was picked a bit arbitrarily, so if someone has measurements showing a better value we could easily change this. Fixes: 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") Signed-off-by: Douglas Anderson Reviewed-by: Akash Asthana --- drivers/spi/spi-geni-qcom.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index bb4cdda2dec8..f51279608fc7 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -595,6 +595,8 @@ static int spi_geni_probe(struct platform_device *pdev) init_completion(&mas->xfer_done); spin_lock_init(&mas->lock); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, 250); pm_runtime_enable(dev); ret = geni_icc_get(&mas->se, NULL); From patchwork Thu Jul 2 00:45:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 11637629 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 31E8013B6 for ; Thu, 2 Jul 2020 00:45:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 10FF72083E for ; Thu, 2 Jul 2020 00:45:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="K8dryPte" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726877AbgGBApn (ORCPT ); Wed, 1 Jul 2020 20:45:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728055AbgGBApg (ORCPT ); Wed, 1 Jul 2020 20:45:36 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9984CC08C5DB for ; Wed, 1 Jul 2020 17:45:36 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id gc9so5172445pjb.2 for ; Wed, 01 Jul 2020 17:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l0ar211YP+36NHOe0RGdo5xX/ajG/sfFSQ8f60VejD0=; b=K8dryPtevEWJdF6SRZtGa+5PKQFaWzwvHBySR6u2HjiruZ2Nj2GDh3biDtq0WsOzqS pEtk2XCHBg+9pAZYqGRL3g2nGdU6WPHoQ/sX4dI4/0W1+LpIuTUyIIH9/CdxbxVSEzwf ZaU54QAtbJBTg/Td+Fqip/FVCLcj9oyQ7SnuE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l0ar211YP+36NHOe0RGdo5xX/ajG/sfFSQ8f60VejD0=; b=oNHe36iNqLQt/ofmf3Tjx7RwX3D4Fbgx9XZEDsyUwGjfVGwh6CIWGB8gtForsy0gol ezzgwGVHtUafyUE2Sf9BnRuEGphad+evLS3qz0vxDLMDQAIVBbn/Es10dhtqzvuBSHxK XmFSFJVwIJzCOPRnEq8oZdck8RGlfueaofPak6rEhMDFhFMK/+1vpa+VSdg82UHtHi2T wuQXRYAsz0Ehi82jpEumVMHDk0VDCLehhFGaU9jCeB3qL+d7yX+HO6/fnKsbDq/6iQVy vh8BzCLG0HWWwW+lZ+FZEEKiJ2nh44Lgwzy/5/lgyhrIIPRPu/7x4CDx8qyXz5tqS0+W UHyg== X-Gm-Message-State: AOAM533+amrU2x5ZReOQAN3jpH+ys9rJb56CO9jyRGxUHfPvoOr+wXdJ jibHaI1CXVbHwunxDx5g+jmmJA== X-Google-Smtp-Source: ABdhPJwhyy/qWqaGb8JH1N+a/tD9m0LydHWyYXMgG+Not2qxrJ+qYYncwwDbkuIMPoZEPcSqyStrCg== X-Received: by 2002:a17:902:b60f:: with SMTP id b15mr24662170pls.248.1593650736141; Wed, 01 Jul 2020 17:45:36 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id w4sm6966212pfd.39.2020.07.01.17.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2020 17:45:35 -0700 (PDT) From: Douglas Anderson To: Mark Brown , Andy Gross , Bjorn Andersson Cc: akashast@codeaurora.org, linux-arm-msm@vger.kernel.org, mkshah@codeaurora.org, swboyd@chromium.org, georgi.djakov@linaro.org, ctheegal@codeaurora.org, mka@chromium.org, Douglas Anderson , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 3/3] spi: spi-geni-qcom: Get rid of most overhead in prepare_message() Date: Wed, 1 Jul 2020 17:45:09 -0700 Message-Id: <20200701174506.3.I2b3d7aeb1ea622335482cce60c58d2f8381e61dd@changeid> X-Mailer: git-send-email 2.27.0.383.g050319c2ae-goog In-Reply-To: <20200702004509.2333554-1-dianders@chromium.org> References: <20200702004509.2333554-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There's a bunch of overhead in spi-geni-qcom's prepare_message. Get rid of it. Before this change spi_geni_prepare_message() took around 14.5 us. After this change, spi_geni_prepare_message() takes about 1.75 us (as measured by ftrace). What's here: * We're always in FIFO mode, so no need to call it for every transfer. This avoids a whole ton of readl/writel calls. * We don't need to write a whole pile of config registers if the mode isn't changing. Cache the last mode and only do the work if needed. * For several registers we were trying to do read/modify/write, but there was no reason. The registers only have one thing in them, so just write them. Signed-off-by: Douglas Anderson Reviewed-by: Akash Asthana Acked-by: Mark Brown --- drivers/spi/spi-geni-qcom.c | 54 +++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 30 deletions(-) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index f51279608fc7..97fac5ea6afd 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -77,6 +77,7 @@ struct spi_geni_master { u32 tx_fifo_depth; u32 fifo_width_bits; u32 tx_wm; + u32 last_mode; unsigned long cur_speed_hz; unsigned int cur_bits_per_word; unsigned int tx_rem_bytes; @@ -177,8 +178,6 @@ static void spi_setup_word_len(struct spi_geni_master *mas, u16 mode, struct geni_se *se = &mas->se; u32 word_len; - word_len = readl(se->base + SE_SPI_WORD_LEN); - /* * If bits_per_word isn't a byte aligned value, set the packing to be * 1 SPI word per FIFO word. @@ -187,10 +186,9 @@ static void spi_setup_word_len(struct spi_geni_master *mas, u16 mode, pack_words = mas->fifo_width_bits / bits_per_word; else pack_words = 1; - word_len &= ~WORD_LEN_MSK; - word_len |= ((bits_per_word - MIN_WORD_LEN) & WORD_LEN_MSK); geni_se_config_packing(&mas->se, bits_per_word, pack_words, msb_first, true, true); + word_len = (bits_per_word - MIN_WORD_LEN) & WORD_LEN_MSK; writel(word_len, se->base + SE_SPI_WORD_LEN); } @@ -238,38 +236,34 @@ static int setup_fifo_params(struct spi_device *spi_slv, { struct spi_geni_master *mas = spi_master_get_devdata(spi); struct geni_se *se = &mas->se; - u32 loopback_cfg, cpol, cpha, demux_output_inv; + u32 loopback_cfg = 0, cpol = 0, cpha = 0, demux_output_inv = 0; u32 demux_sel; - loopback_cfg = readl(se->base + SE_SPI_LOOPBACK); - cpol = readl(se->base + SE_SPI_CPOL); - cpha = readl(se->base + SE_SPI_CPHA); - demux_output_inv = 0; - loopback_cfg &= ~LOOPBACK_MSK; - cpol &= ~CPOL; - cpha &= ~CPHA; + if (mas->last_mode != spi_slv->mode) { + if (spi_slv->mode & SPI_LOOP) + loopback_cfg = LOOPBACK_ENABLE; - if (spi_slv->mode & SPI_LOOP) - loopback_cfg |= LOOPBACK_ENABLE; + if (spi_slv->mode & SPI_CPOL) + cpol = CPOL; - if (spi_slv->mode & SPI_CPOL) - cpol |= CPOL; + if (spi_slv->mode & SPI_CPHA) + cpha = CPHA; - if (spi_slv->mode & SPI_CPHA) - cpha |= CPHA; + if (spi_slv->mode & SPI_CS_HIGH) + demux_output_inv = BIT(spi_slv->chip_select); - if (spi_slv->mode & SPI_CS_HIGH) - demux_output_inv = BIT(spi_slv->chip_select); + demux_sel = spi_slv->chip_select; + mas->cur_bits_per_word = spi_slv->bits_per_word; - demux_sel = spi_slv->chip_select; - mas->cur_bits_per_word = spi_slv->bits_per_word; + spi_setup_word_len(mas, spi_slv->mode, spi_slv->bits_per_word); + writel(loopback_cfg, se->base + SE_SPI_LOOPBACK); + writel(demux_sel, se->base + SE_SPI_DEMUX_SEL); + writel(cpha, se->base + SE_SPI_CPHA); + writel(cpol, se->base + SE_SPI_CPOL); + writel(demux_output_inv, se->base + SE_SPI_DEMUX_OUTPUT_INV); - spi_setup_word_len(mas, spi_slv->mode, spi_slv->bits_per_word); - writel(loopback_cfg, se->base + SE_SPI_LOOPBACK); - writel(demux_sel, se->base + SE_SPI_DEMUX_SEL); - writel(cpha, se->base + SE_SPI_CPHA); - writel(cpol, se->base + SE_SPI_CPOL); - writel(demux_output_inv, se->base + SE_SPI_DEMUX_OUTPUT_INV); + mas->last_mode = spi_slv->mode; + } return geni_spi_set_clock_and_bw(mas, spi_slv->max_speed_hz); } @@ -279,9 +273,7 @@ static int spi_geni_prepare_message(struct spi_master *spi, { int ret; struct spi_geni_master *mas = spi_master_get_devdata(spi); - struct geni_se *se = &mas->se; - geni_se_select_mode(se, GENI_SE_FIFO); ret = setup_fifo_params(spi_msg->spi, spi); if (ret) dev_err(mas->dev, "Couldn't select mode %d\n", ret); @@ -322,6 +314,8 @@ static int spi_geni_init(struct spi_geni_master *mas) else mas->oversampling = 1; + geni_se_select_mode(se, GENI_SE_FIFO); + pm_runtime_put(mas->dev); return 0; }