From patchwork Thu Jul 2 02:14:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11637719 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 604AE13B4 for ; Thu, 2 Jul 2020 02:17:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 52CF620874 for ; Thu, 2 Jul 2020 02:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728155AbgGBCRx (ORCPT ); Wed, 1 Jul 2020 22:17:53 -0400 Received: from inva020.nxp.com ([92.121.34.13]:45958 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728132AbgGBCRw (ORCPT ); Wed, 1 Jul 2020 22:17:52 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A78791A0925; Thu, 2 Jul 2020 04:17:50 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8AF911A1890; Thu, 2 Jul 2020 04:17:43 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id A16F8402E7; Thu, 2 Jul 2020 10:17:34 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, peng.fan@nxp.com, arnd@arndb.de, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 1/5] clk: composite: Export clk_hw_register_composite() Date: Thu, 2 Jul 2020 10:14:30 +0800 Message-Id: <1593656074-10092-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> References: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Export clk_hw_register_composite() to support user built as module. ERROR: modpost: "clk_hw_register_composite" [drivers/clk/imx/mxc-clk.ko] undefined! Signed-off-by: Anson Huang Reviewed-by: Stephen Boyd --- No change. --- drivers/clk/clk-composite.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 7376f57..2ddb54f 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -328,6 +328,7 @@ struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name, rate_hw, rate_ops, gate_hw, gate_ops, flags); } +EXPORT_SYMBOL_GPL(clk_hw_register_composite); struct clk_hw *clk_hw_register_composite_pdata(struct device *dev, const char *name, From patchwork Thu Jul 2 02:14:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11637727 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5073F13B4 for ; Thu, 2 Jul 2020 02:18:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42083207F5 for ; Thu, 2 Jul 2020 02:18:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728185AbgGBCR4 (ORCPT ); Wed, 1 Jul 2020 22:17:56 -0400 Received: from inva021.nxp.com ([92.121.34.21]:39312 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725845AbgGBCRz (ORCPT ); Wed, 1 Jul 2020 22:17:55 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 56BE92005B7; Thu, 2 Jul 2020 04:17:52 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 243B9200803; Thu, 2 Jul 2020 04:17:45 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4627D40294; Thu, 2 Jul 2020 10:17:36 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, peng.fan@nxp.com, arnd@arndb.de, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 2/5] clk: imx: Add clock configuration for ARMv7 platforms Date: Thu, 2 Jul 2020 10:14:31 +0800 Message-Id: <1593656074-10092-3-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> References: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add CONFIG_CLK_xxx for i.MX ARMv7 platforms, and use it as build option instead of CONFIG_SOC_xxx, the CONFIG_CLK_xxx will be selected by default according to CONFIG_SOC_xxx. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng --- Changes since V3: - Add clock configuration for each ARMv7. --- drivers/clk/imx/Kconfig | 90 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/imx/Makefile | 30 ++++++++-------- 2 files changed, 105 insertions(+), 15 deletions(-) diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index db0253f..09fc8ad 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -8,6 +8,96 @@ config MXC_CLK_SCU bool depends on IMX_SCU +config CLK_IMX1 + bool "IMX1 CCM Clock Driver" + depends on SOC_IMX1 || COMPILE_TEST + default SOC_IMX1 + select MXC_CLK + +config CLK_IMX21 + bool "IMX21 CCM Clock Driver" + depends on SOC_IMX21 || COMPILE_TEST + default SOC_IMX21 + select MXC_CLK + +config CLK_IMX25 + bool "IMX25 CCM Clock Driver" + depends on SOC_IMX25 || COMPILE_TEST + default SOC_IMX25 + select MXC_CLK + +config CLK_IMX27 + bool "IMX27 CCM Clock Driver" + depends on SOC_IMX27 || COMPILE_TEST + default SOC_IMX27 + select MXC_CLK + +config CLK_IMX31 + bool "IMX31 CCM Clock Driver" + depends on SOC_IMX31 || COMPILE_TEST + default SOC_IMX31 + select MXC_CLK + +config CLK_IMX35 + bool "IMX35 CCM Clock Driver" + depends on SOC_IMX35 || COMPILE_TEST + default SOC_IMX35 + select MXC_CLK + +config CLK_IMX5 + bool "IMX5 CCM Clock Driver" + depends on SOC_IMX5 || COMPILE_TEST + default SOC_IMX5 + select MXC_CLK + +config CLK_IMX6Q + bool "IMX6Q CCM Clock Driver" + depends on SOC_IMX6Q || COMPILE_TEST + default SOC_IMX6Q + select MXC_CLK + +config CLK_IMX6SL + bool "IMX6SL CCM Clock Driver" + depends on SOC_IMX6SL || COMPILE_TEST + default SOC_IMX6SL + select MXC_CLK + +config CLK_IMX6SLL + bool "IMX6SLL CCM Clock Driver" + depends on SOC_IMX6SLL || COMPILE_TEST + default SOC_IMX6SLL + select MXC_CLK + +config CLK_IMX6SX + bool "IMX6SX CCM Clock Driver" + depends on SOC_IMX6SX || COMPILE_TEST + default SOC_IMX6SX + select MXC_CLK + +config CLK_IMX6UL + bool "IMX6UL CCM Clock Driver" + depends on SOC_IMX6UL || COMPILE_TEST + default SOC_IMX6UL + select MXC_CLK + +config CLK_IMX7D + bool "IMX7D CCM Clock Driver" + depends on SOC_IMX7D || COMPILE_TEST + default SOC_IMX7D + select MXC_CLK + +config CLK_IMX7ULP + bool "IMX7ULP Clock Driver" + depends on SOC_IMX7ULP || COMPILE_TEST + default SOC_IMX7ULP + select MXC_CLK + +config CLK_VF610 + bool "VF610 Clock Driver" + depends on SOC_VF610 || COMPILE_TEST + default SOC_VF610 + select MXC_CLK + config CLK_IMX8MM bool "IMX8MM CCM Clock Driver" depends on ARCH_MXC diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 928f874..394ade7 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -31,18 +31,18 @@ obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o -obj-$(CONFIG_SOC_IMX1) += clk-imx1.o -obj-$(CONFIG_SOC_IMX21) += clk-imx21.o -obj-$(CONFIG_SOC_IMX25) += clk-imx25.o -obj-$(CONFIG_SOC_IMX27) += clk-imx27.o -obj-$(CONFIG_SOC_IMX31) += clk-imx31.o -obj-$(CONFIG_SOC_IMX35) += clk-imx35.o -obj-$(CONFIG_SOC_IMX5) += clk-imx5.o -obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o -obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o -obj-$(CONFIG_SOC_IMX6SLL) += clk-imx6sll.o -obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o -obj-$(CONFIG_SOC_IMX6UL) += clk-imx6ul.o -obj-$(CONFIG_SOC_IMX7D) += clk-imx7d.o -obj-$(CONFIG_SOC_IMX7ULP) += clk-imx7ulp.o -obj-$(CONFIG_SOC_VF610) += clk-vf610.o +obj-$(CONFIG_CLK_IMX1) += clk-imx1.o +obj-$(CONFIG_CLK_IMX21) += clk-imx21.o +obj-$(CONFIG_CLK_IMX25) += clk-imx25.o +obj-$(CONFIG_CLK_IMX27) += clk-imx27.o +obj-$(CONFIG_CLK_IMX31) += clk-imx31.o +obj-$(CONFIG_CLK_IMX35) += clk-imx35.o +obj-$(CONFIG_CLK_IMX5) += clk-imx5.o +obj-$(CONFIG_CLK_IMX6Q) += clk-imx6q.o +obj-$(CONFIG_CLK_IMX6SL) += clk-imx6sl.o +obj-$(CONFIG_CLK_IMX6SLL) += clk-imx6sll.o +obj-$(CONFIG_CLK_IMX6SX) += clk-imx6sx.o +obj-$(CONFIG_CLK_IMX6UL) += clk-imx6ul.o +obj-$(CONFIG_CLK_IMX7D) += clk-imx7d.o +obj-$(CONFIG_CLK_IMX7ULP) += clk-imx7ulp.o +obj-$(CONFIG_CLK_VF610) += clk-vf610.o From patchwork Thu Jul 2 02:14:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11637723 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D0022913 for ; Thu, 2 Jul 2020 02:18:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B40AB214D8 for ; Thu, 2 Jul 2020 02:18:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728205AbgGBCR6 (ORCPT ); Wed, 1 Jul 2020 22:17:58 -0400 Received: from inva021.nxp.com ([92.121.34.21]:39362 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728168AbgGBCR5 (ORCPT ); Wed, 1 Jul 2020 22:17:57 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id EC9A72005BB; Thu, 2 Jul 2020 04:17:53 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B656F200802; Thu, 2 Jul 2020 04:17:46 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id D57EF402F0; Thu, 2 Jul 2020 10:17:37 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, peng.fan@nxp.com, arnd@arndb.de, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 3/5] clk: imx: Support building i.MX common clock driver as module Date: Thu, 2 Jul 2020 10:14:32 +0800 Message-Id: <1593656074-10092-4-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> References: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org There are more and more requirements of building SoC specific drivers as modules, add support for building i.MX common clock driver as module to meet the requirement. Signed-off-by: Anson Huang --- Changes since V3: - ONLY include __setup_param() build for built-in, module build no need to have it. --- drivers/clk/imx/Kconfig | 8 ++++++-- drivers/clk/imx/Makefile | 40 +++++++++++++++++++------------------- drivers/clk/imx/clk-composite-8m.c | 2 ++ drivers/clk/imx/clk-cpu.c | 2 ++ drivers/clk/imx/clk-frac-pll.c | 2 ++ drivers/clk/imx/clk-gate2.c | 2 ++ drivers/clk/imx/clk-pll14xx.c | 5 +++++ drivers/clk/imx/clk-sscg-pll.c | 2 ++ drivers/clk/imx/clk.c | 22 +++++++++++++++------ 9 files changed, 57 insertions(+), 28 deletions(-) diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index 09fc8ad..f6ddf76 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 # common clock support for NXP i.MX SoC family. config MXC_CLK - bool - def_bool ARCH_MXC + tristate "IMX clock" + depends on ARCH_MXC config MXC_CLK_SCU bool @@ -101,24 +101,28 @@ config CLK_VF610 config CLK_IMX8MM bool "IMX8MM CCM Clock Driver" depends on ARCH_MXC + select MXC_CLK help Build the driver for i.MX8MM CCM Clock Driver config CLK_IMX8MN bool "IMX8MN CCM Clock Driver" depends on ARCH_MXC + select MXC_CLK help Build the driver for i.MX8MN CCM Clock Driver config CLK_IMX8MP bool "IMX8MP CCM Clock Driver" depends on ARCH_MXC + select MXC_CLK help Build the driver for i.MX8MP CCM Clock Driver config CLK_IMX8MQ bool "IMX8MQ CCM Clock Driver" depends on ARCH_MXC + select MXC_CLK help Build the driver for i.MX8MQ CCM Clock Driver diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 394ade7..17f5d12 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -1,25 +1,25 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_MXC_CLK) += \ - clk.o \ - clk-busy.o \ - clk-composite-8m.o \ - clk-cpu.o \ - clk-composite-7ulp.o \ - clk-divider-gate.o \ - clk-fixup-div.o \ - clk-fixup-mux.o \ - clk-frac-pll.o \ - clk-gate-exclusive.o \ - clk-gate2.o \ - clk-pfd.o \ - clk-pfdv2.o \ - clk-pllv1.o \ - clk-pllv2.o \ - clk-pllv3.o \ - clk-pllv4.o \ - clk-sscg-pll.o \ - clk-pll14xx.o +mxc-clk-objs += clk.o +mxc-clk-objs += clk-busy.o +mxc-clk-objs += clk-composite-7ulp.o +mxc-clk-objs += clk-composite-8m.o +mxc-clk-objs += clk-cpu.o +mxc-clk-objs += clk-divider-gate.o +mxc-clk-objs += clk-fixup-div.o +mxc-clk-objs += clk-fixup-mux.o +mxc-clk-objs += clk-frac-pll.o +mxc-clk-objs += clk-gate2.o +mxc-clk-objs += clk-gate-exclusive.o +mxc-clk-objs += clk-pfd.o +mxc-clk-objs += clk-pfdv2.o +mxc-clk-objs += clk-pllv1.o +mxc-clk-objs += clk-pllv2.o +mxc-clk-objs += clk-pllv3.o +mxc-clk-objs += clk-pllv4.o +mxc-clk-objs += clk-pll14xx.o +mxc-clk-objs += clk-sscg-pll.o +obj-$(CONFIG_MXC_CLK) += mxc-clk.o obj-$(CONFIG_MXC_CLK_SCU) += \ clk-scu.o \ diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index d2b5af8..78fb7e5 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -5,6 +5,7 @@ #include #include +#include #include #include @@ -243,3 +244,4 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, kfree(mux); return ERR_CAST(hw); } +EXPORT_SYMBOL_GPL(imx8m_clk_hw_composite_flags); diff --git a/drivers/clk/imx/clk-cpu.c b/drivers/clk/imx/clk-cpu.c index cb182be..cb6ca4c 100644 --- a/drivers/clk/imx/clk-cpu.c +++ b/drivers/clk/imx/clk-cpu.c @@ -5,6 +5,7 @@ #include #include +#include #include #include "clk.h" @@ -104,3 +105,4 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name, return hw; } +EXPORT_SYMBOL_GPL(imx_clk_hw_cpu); diff --git a/drivers/clk/imx/clk-frac-pll.c b/drivers/clk/imx/clk-frac-pll.c index 101e0a3..c703056 100644 --- a/drivers/clk/imx/clk-frac-pll.c +++ b/drivers/clk/imx/clk-frac-pll.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -233,3 +234,4 @@ struct clk_hw *imx_clk_hw_frac_pll(const char *name, return hw; } +EXPORT_SYMBOL_GPL(imx_clk_hw_frac_pll); diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c index b87ab3c..512f675 100644 --- a/drivers/clk/imx/clk-gate2.c +++ b/drivers/clk/imx/clk-gate2.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -177,3 +178,4 @@ struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name, return hw; } +EXPORT_SYMBOL_GPL(clk_hw_register_gate2); diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index f9eb189..f5c3e7e 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -68,6 +69,7 @@ struct imx_pll14xx_clk imx_1443x_pll = { .rate_table = imx_pll1443x_tbl, .rate_count = ARRAY_SIZE(imx_pll1443x_tbl), }; +EXPORT_SYMBOL_GPL(imx_1443x_pll); struct imx_pll14xx_clk imx_1443x_dram_pll = { .type = PLL_1443X, @@ -75,12 +77,14 @@ struct imx_pll14xx_clk imx_1443x_dram_pll = { .rate_count = ARRAY_SIZE(imx_pll1443x_tbl), .flags = CLK_GET_RATE_NOCACHE, }; +EXPORT_SYMBOL_GPL(imx_1443x_dram_pll); struct imx_pll14xx_clk imx_1416x_pll = { .type = PLL_1416X, .rate_table = imx_pll1416x_tbl, .rate_count = ARRAY_SIZE(imx_pll1416x_tbl), }; +EXPORT_SYMBOL_GPL(imx_1416x_pll); static const struct imx_pll14xx_rate_table *imx_get_pll_settings( struct clk_pll14xx *pll, unsigned long rate) @@ -436,3 +440,4 @@ struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name, return hw; } +EXPORT_SYMBOL_GPL(imx_dev_clk_hw_pll14xx); diff --git a/drivers/clk/imx/clk-sscg-pll.c b/drivers/clk/imx/clk-sscg-pll.c index 773d8a5..9d6cdff 100644 --- a/drivers/clk/imx/clk-sscg-pll.c +++ b/drivers/clk/imx/clk-sscg-pll.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -537,3 +538,4 @@ struct clk_hw *imx_clk_hw_sscg_pll(const char *name, return hw; } +EXPORT_SYMBOL_GPL(imx_clk_hw_sscg_pll); diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c index 87ab8db..6f2a94d 100644 --- a/drivers/clk/imx/clk.c +++ b/drivers/clk/imx/clk.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -13,6 +14,7 @@ #define CCDR_MMDC_CH1_MASK BIT(16) DEFINE_SPINLOCK(imx_ccm_lock); +EXPORT_SYMBOL_GPL(imx_ccm_lock); void imx_unregister_clocks(struct clk *clks[], unsigned int count) { @@ -29,8 +31,9 @@ void imx_unregister_hw_clocks(struct clk_hw *hws[], unsigned int count) for (i = 0; i < count; i++) clk_hw_unregister(hws[i]); } +EXPORT_SYMBOL_GPL(imx_unregister_hw_clocks); -void __init imx_mmdc_mask_handshake(void __iomem *ccm_base, +void imx_mmdc_mask_handshake(void __iomem *ccm_base, unsigned int chn) { unsigned int reg; @@ -59,8 +62,9 @@ void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count) pr_err("i.MX clk %u: register failed with %ld\n", i, PTR_ERR(clks[i])); } +EXPORT_SYMBOL_GPL(imx_check_clk_hws); -static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name) +static struct clk *imx_obtain_fixed_clock_from_dt(const char *name) { struct of_phandle_args phandle; struct clk *clk = ERR_PTR(-ENODEV); @@ -80,7 +84,7 @@ static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name) return clk; } -struct clk * __init imx_obtain_fixed_clock( +struct clk *imx_obtain_fixed_clock( const char *name, unsigned long rate) { struct clk *clk; @@ -91,7 +95,7 @@ struct clk * __init imx_obtain_fixed_clock( return clk; } -struct clk_hw * __init imx_obtain_fixed_clock_hw( +struct clk_hw *imx_obtain_fixed_clock_hw( const char *name, unsigned long rate) { struct clk *clk; @@ -113,6 +117,7 @@ struct clk_hw * imx_obtain_fixed_clk_hw(struct device_node *np, return __clk_get_hw(clk); } +EXPORT_SYMBOL_GPL(imx_obtain_fixed_clk_hw); /* * This fixups the register CCM_CSCMR1 write value. @@ -143,16 +148,18 @@ void imx_cscmr1_fixup(u32 *val) static int imx_keep_uart_clocks; static struct clk ** const *imx_uart_clocks; -static int __init imx_keep_uart_clocks_param(char *str) +static int __maybe_unused imx_keep_uart_clocks_param(char *str) { imx_keep_uart_clocks = 1; return 0; } +#ifndef MODULE __setup_param("earlycon", imx_keep_uart_earlycon, imx_keep_uart_clocks_param, 0); __setup_param("earlyprintk", imx_keep_uart_earlyprintk, imx_keep_uart_clocks_param, 0); +#endif void imx_register_uart_clocks(struct clk ** const clks[]) { @@ -164,8 +171,9 @@ void imx_register_uart_clocks(struct clk ** const clks[]) clk_prepare_enable(*imx_uart_clocks[i]); } } +EXPORT_SYMBOL_GPL(imx_register_uart_clocks); -static int __init imx_clk_disable_uart(void) +static int imx_clk_disable_uart(void) { if (imx_keep_uart_clocks && imx_uart_clocks) { int i; @@ -177,3 +185,5 @@ static int __init imx_clk_disable_uart(void) return 0; } late_initcall_sync(imx_clk_disable_uart); + +MODULE_LICENSE("GPL v2"); From patchwork Thu Jul 2 02:14:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11637725 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3888213B4 for ; Thu, 2 Jul 2020 02:18:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B3372083E for ; Thu, 2 Jul 2020 02:18:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725845AbgGBCR6 (ORCPT ); Wed, 1 Jul 2020 22:17:58 -0400 Received: from inva020.nxp.com ([92.121.34.13]:46034 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728182AbgGBCR5 (ORCPT ); Wed, 1 Jul 2020 22:17:57 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 377DE1A0914; Thu, 2 Jul 2020 04:17:55 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id EDF191A090C; Thu, 2 Jul 2020 04:17:47 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 70C90402F7; Thu, 2 Jul 2020 10:17:39 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, peng.fan@nxp.com, arnd@arndb.de, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 4/5] clk: imx8m: Support module build Date: Thu, 2 Jul 2020 10:14:33 +0800 Message-Id: <1593656074-10092-5-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> References: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Change configuration to "tristate", add module author, description and license to support building i.MX8M SoCs clock driver as module. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng --- Changes since V3: - add module author/description, and merge all i.MX8M SoCs patch into one patch. --- drivers/clk/imx/Kconfig | 8 ++++---- drivers/clk/imx/clk-imx8mm.c | 4 ++++ drivers/clk/imx/clk-imx8mn.c | 4 ++++ drivers/clk/imx/clk-imx8mp.c | 4 ++++ drivers/clk/imx/clk-imx8mq.c | 4 ++++ 5 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index f6ddf76..1867111 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -99,28 +99,28 @@ config CLK_VF610 select MXC_CLK config CLK_IMX8MM - bool "IMX8MM CCM Clock Driver" + tristate "IMX8MM CCM Clock Driver" depends on ARCH_MXC select MXC_CLK help Build the driver for i.MX8MM CCM Clock Driver config CLK_IMX8MN - bool "IMX8MN CCM Clock Driver" + tristate "IMX8MN CCM Clock Driver" depends on ARCH_MXC select MXC_CLK help Build the driver for i.MX8MN CCM Clock Driver config CLK_IMX8MP - bool "IMX8MP CCM Clock Driver" + tristate "IMX8MP CCM Clock Driver" depends on ARCH_MXC select MXC_CLK help Build the driver for i.MX8MP CCM Clock Driver config CLK_IMX8MQ - bool "IMX8MQ CCM Clock Driver" + tristate "IMX8MQ CCM Clock Driver" depends on ARCH_MXC select MXC_CLK help diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b793264..0de0be0 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -657,3 +657,7 @@ static struct platform_driver imx8mm_clk_driver = { }, }; module_platform_driver(imx8mm_clk_driver); + +MODULE_AUTHOR("Bai Ping "); +MODULE_DESCRIPTION("NXP i.MX8MM clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 213cc37..e984de5 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -608,3 +608,7 @@ static struct platform_driver imx8mn_clk_driver = { }, }; module_platform_driver(imx8mn_clk_driver); + +MODULE_AUTHOR("Anson Huang "); +MODULE_DESCRIPTION("NXP i.MX8MN clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index ca74771..f3cedf2 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -773,3 +773,7 @@ static struct platform_driver imx8mp_clk_driver = { }, }; module_platform_driver(imx8mp_clk_driver); + +MODULE_AUTHOR("Anson Huang "); +MODULE_DESCRIPTION("NXP i.MX8MP clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index a64aace..a06cc21 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -643,3 +643,7 @@ static struct platform_driver imx8mq_clk_driver = { }, }; module_platform_driver(imx8mq_clk_driver); + +MODULE_AUTHOR("Abel Vesa "); +MODULE_DESCRIPTION("NXP i.MX8MQ clock driver"); +MODULE_LICENSE("GPL v2"); From patchwork Thu Jul 2 02:14:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11637721 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3ACE14E3 for ; Thu, 2 Jul 2020 02:18:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B20CD2070C for ; Thu, 2 Jul 2020 02:18:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728233AbgGBCSC (ORCPT ); Wed, 1 Jul 2020 22:18:02 -0400 Received: from inva021.nxp.com ([92.121.34.21]:39422 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728213AbgGBCSC (ORCPT ); Wed, 1 Jul 2020 22:18:02 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8C0DB200801; Thu, 2 Jul 2020 04:17:59 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4EA0B2005AD; Thu, 2 Jul 2020 04:17:52 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 0CB0B402B1; Thu, 2 Jul 2020 10:17:40 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, peng.fan@nxp.com, arnd@arndb.de, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 5/5] clk: imx8qxp: Support building i.MX8QXP clock driver as module Date: Thu, 2 Jul 2020 10:14:34 +0800 Message-Id: <1593656074-10092-6-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> References: <1593656074-10092-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Change configuration to "tristate", use device_initcall() instead of builtin_platform_driver(), add module author, description and license to support building i.MX8QXP clock drivers as module. Signed-off-by: Anson Huang --- Changes since V3: - use device_initcall() instead of builtin_platform_driver(); - add module author/description; - link common scu/lpcg clock driver to i.MX8QXP clock driver, then no need to have exports. --- drivers/clk/imx/Kconfig | 6 +++--- drivers/clk/imx/Makefile | 9 ++++----- drivers/clk/imx/clk-imx8qxp-lpcg.c | 10 +++++++++- drivers/clk/imx/clk-imx8qxp.c | 11 ++++++++++- 4 files changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index 1867111..8340dfe 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -5,8 +5,8 @@ config MXC_CLK depends on ARCH_MXC config MXC_CLK_SCU - bool - depends on IMX_SCU + tristate "IMX SCU clock" + depends on ARCH_MXC && IMX_SCU config CLK_IMX1 bool "IMX1 CCM Clock Driver" @@ -127,7 +127,7 @@ config CLK_IMX8MQ Build the driver for i.MX8MQ CCM Clock Driver config CLK_IMX8QXP - bool "IMX8QXP SCU Clock" + tristate "IMX8QXP SCU Clock" depends on ARCH_MXC && IMX_SCU && ARM64 select MXC_CLK_SCU help diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 17f5d12..79e53f2 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -21,15 +21,14 @@ mxc-clk-objs += clk-pll14xx.o mxc-clk-objs += clk-sscg-pll.o obj-$(CONFIG_MXC_CLK) += mxc-clk.o -obj-$(CONFIG_MXC_CLK_SCU) += \ - clk-scu.o \ - clk-lpcg-scu.o - obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o -obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o + +obj-$(CONFIG_MXC_CLK_SCU) += clk-imx-scu.o clk-imx-lpcg-scu.o +clk-imx-scu-$(CONFIG_CLK_IMX8QXP) += clk-scu.o clk-imx8qxp.o +clk-imx-lpcg-scu-$(CONFIG_CLK_IMX8QXP) += clk-lpcg-scu.o clk-imx8qxp-lpcg.o obj-$(CONFIG_CLK_IMX1) += clk-imx1.o obj-$(CONFIG_CLK_IMX21) += clk-imx21.o diff --git a/drivers/clk/imx/clk-imx8qxp-lpcg.c b/drivers/clk/imx/clk-imx8qxp-lpcg.c index 04c8ee3..5b6648e 100644 --- a/drivers/clk/imx/clk-imx8qxp-lpcg.c +++ b/drivers/clk/imx/clk-imx8qxp-lpcg.c @@ -231,4 +231,12 @@ static struct platform_driver imx8qxp_lpcg_clk_driver = { .probe = imx8qxp_lpcg_clk_probe, }; -builtin_platform_driver(imx8qxp_lpcg_clk_driver); +static int __init imx8qxp_lpcg_clk_init(void) +{ + return platform_driver_register(&imx8qxp_lpcg_clk_driver); +} +device_initcall(imx8qxp_lpcg_clk_init); + +MODULE_AUTHOR("Aisheng Dong "); +MODULE_DESCRIPTION("NXP i.MX8QXP LPCG clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 5e2903e..9bcf0d1 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -151,4 +151,13 @@ static struct platform_driver imx8qxp_clk_driver = { }, .probe = imx8qxp_clk_probe, }; -builtin_platform_driver(imx8qxp_clk_driver); + +static int __init imx8qxp_clk_init(void) +{ + return platform_driver_register(&imx8qxp_clk_driver); +} +device_initcall(imx8qxp_clk_init); + +MODULE_AUTHOR("Aisheng Dong "); +MODULE_DESCRIPTION("NXP i.MX8QXP clock driver"); +MODULE_LICENSE("GPL v2");