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Thu, 02 Jul 2020 07:53:23 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, vkoul@kernel.org, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 01/10] dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml Date: Thu, 2 Jul 2020 20:22:47 +0530 Message-Id: <1593701576-28580-2-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105326_182704_FCF7F8EB X-CRM114-Status: GOOD ( 18.30 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:642 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, cristian.ciocaltea@gmail.com, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Converts the device tree bindings for the Actions Semi Owl SoCs DMA Controller over to YAML schemas. It also adds new compatible string "actions,s700-dma". Reviewed-by: Rob Herring Signed-off-by: Amit Singh Tomar --- Changes since v4: * Added Rob's Reviewed-by tag. * Re-order it from 05/10 to 01/10. Changes since v3: * No change. Changes since v2: * Addressed Rob's comments: - removed unnecessary description. - added unevaluatedProperties - added relevant information about dma-channels and dma-request * Added power-domain property. Change since v1: * Updated the description field to reflect only the necessary information. * replaced the maxItems field with description for each controller attribute(except interrupts). * Replaced the clock macro with number to keep the example as independent as possible. --- Documentation/devicetree/bindings/dma/owl-dma.txt | 47 ------------- Documentation/devicetree/bindings/dma/owl-dma.yaml | 79 ++++++++++++++++++++++ 2 files changed, 79 insertions(+), 47 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml diff --git a/Documentation/devicetree/bindings/dma/owl-dma.txt b/Documentation/devicetree/bindings/dma/owl-dma.txt deleted file mode 100644 index 03e9bb12b75f..000000000000 --- a/Documentation/devicetree/bindings/dma/owl-dma.txt +++ /dev/null @@ -1,47 +0,0 @@ -* Actions Semi Owl SoCs DMA controller - -This binding follows the generic DMA bindings defined in dma.txt. - -Required properties: -- compatible: Should be "actions,s900-dma". -- reg: Should contain DMA registers location and length. -- interrupts: Should contain 4 interrupts shared by all channel. -- #dma-cells: Must be <1>. Used to represent the number of integer - cells in the dmas property of client device. -- dma-channels: Physical channels supported. -- dma-requests: Number of DMA request signals supported by the controller. - Refer to Documentation/devicetree/bindings/dma/dma.txt -- clocks: Phandle and Specifier of the clock feeding the DMA controller. - -Example: - -Controller: - dma: dma-controller@e0260000 { - compatible = "actions,s900-dma"; - reg = <0x0 0xe0260000 0x0 0x1000>; - interrupts = , - , - , - ; - #dma-cells = <1>; - dma-channels = <12>; - dma-requests = <46>; - clocks = <&clock CLK_DMAC>; - }; - -Client: - -DMA clients connected to the Actions Semi Owl SoCs DMA controller must -use the format described in the dma.txt file, using a two-cell specifier -for each channel. - -The two cells in order are: -1. A phandle pointing to the DMA controller. -2. The channel id. - -uart5: serial@e012a000 { - ... - dma-names = "tx", "rx"; - dmas = <&dma 26>, <&dma 27>; - ... -}; diff --git a/Documentation/devicetree/bindings/dma/owl-dma.yaml b/Documentation/devicetree/bindings/dma/owl-dma.yaml new file mode 100644 index 000000000000..5577cd910781 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/owl-dma.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/owl-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs DMA controller + +description: | + The OWL DMA is a general-purpose direct memory access controller capable of + supporting 10 and 12 independent DMA channels for S700 and S900 SoCs + respectively. + +maintainers: + - Manivannan Sadhasivam + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + enum: + - actions,s900-dma + - actions,s700-dma + + reg: + maxItems: 1 + + interrupts: + description: + controller supports 4 interrupts, which are freely assignable to the + DMA channels. + maxItems: 4 + + "#dma-cells": + const: 1 + + dma-channels: + maximum: 12 + + dma-requests: + maximum: 46 + + clocks: + maxItems: 1 + description: + Phandle and Specifier of the clock feeding the DMA controller. + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - dma-channels + - dma-requests + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + dma: dma-controller@e0260000 { + compatible = "actions,s900-dma"; + reg = <0x0 0xe0260000 0x0 0x1000>; + interrupts = , + , + , + ; + #dma-cells = <1>; + dma-channels = <12>; + dma-requests = <46>; + clocks = <&clock 22>; + }; + +... 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Thu, 02 Jul 2020 07:53:27 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, vkoul@kernel.org, afaerber@suse.de, manivannan.sadhasivam@linaro.org Subject: [PATCH v5 02/10] dmaengine: Actions: get rid of bit fields from dma descriptor Date: Thu, 2 Jul 2020 20:22:48 +0530 Message-Id: <1593701576-28580-3-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105330_553448_006C189A X-CRM114-Status: GOOD ( 20.22 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:543 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, cristian.ciocaltea@gmail.com, dmaengine@vger.kernel.org, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org At the moment, Driver uses bit fields to describe registers of the DMA descriptor structure that makes it less portable and maintainable, and Andre suugested(and even sketched important bits for it) to make use of array to describe this DMA descriptors instead. It gives the flexibility while extending support for other platform such as Actions S700. This commit removes the "owl_dma_lli_hw" (that includes bit-fields) and uses array to describe DMA descriptor. Suggested-by: Andre Przywara Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * Reordered it from 01/10 to 02/10. Changes since v3: * Added description for enum fields. * Restored the old comment. * Added detailed comment about, the way FLEN and FCNT values are filled. Changes since v2: * No change. Changes since v1: * Defined macro for frame count value. * Introduced llc_hw_flen() from patch 2/9. * Removed the unnecessary line break. Changes since rfc: * No change. --- drivers/dma/owl-dma.c | 98 +++++++++++++++++++++++++++++---------------------- 1 file changed, 56 insertions(+), 42 deletions(-) diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c index 66ef70b00ec0..948d1bead860 100644 --- a/drivers/dma/owl-dma.c +++ b/drivers/dma/owl-dma.c @@ -120,30 +120,33 @@ #define BIT_FIELD(val, width, shift, newshift) \ ((((val) >> (shift)) & ((BIT(width)) - 1)) << (newshift)) +/* Frame count value is fixed as 1 */ +#define FCNT_VAL 0x1 + /** - * struct owl_dma_lli_hw - Hardware link list for dma transfer - * @next_lli: physical address of the next link list - * @saddr: source physical address - * @daddr: destination physical address - * @flen: frame length - * @fcnt: frame count - * @src_stride: source stride - * @dst_stride: destination stride - * @ctrla: dma_mode and linklist ctrl config - * @ctrlb: interrupt config - * @const_num: data for constant fill + * owl_dmadesc_offsets - Describe DMA descriptor, hardware link + * list for dma transfer + * @OWL_DMADESC_NEXT_LLI: physical address of the next link list + * @OWL_DMADESC_SADDR: source physical address + * @OWL_DMADESC_DADDR: destination physical address + * @OWL_DMADESC_FLEN: frame length + * @OWL_DMADESC_SRC_STRIDE: source stride + * @OWL_DMADESC_DST_STRIDE: destination stride + * @OWL_DMADESC_CTRLA: dma_mode and linklist ctrl config + * @OWL_DMADESC_CTRLB: interrupt config + * @OWL_DMADESC_CONST_NUM: data for constant fill */ -struct owl_dma_lli_hw { - u32 next_lli; - u32 saddr; - u32 daddr; - u32 flen:20; - u32 fcnt:12; - u32 src_stride; - u32 dst_stride; - u32 ctrla; - u32 ctrlb; - u32 const_num; +enum owl_dmadesc_offsets { + OWL_DMADESC_NEXT_LLI = 0, + OWL_DMADESC_SADDR, + OWL_DMADESC_DADDR, + OWL_DMADESC_FLEN, + OWL_DMADESC_SRC_STRIDE, + OWL_DMADESC_DST_STRIDE, + OWL_DMADESC_CTRLA, + OWL_DMADESC_CTRLB, + OWL_DMADESC_CONST_NUM, + OWL_DMADESC_SIZE }; /** @@ -153,7 +156,7 @@ struct owl_dma_lli_hw { * @node: node for txd's lli_list */ struct owl_dma_lli { - struct owl_dma_lli_hw hw; + u32 hw[OWL_DMADESC_SIZE]; dma_addr_t phys; struct list_head node; }; @@ -318,6 +321,11 @@ static inline u32 llc_hw_ctrlb(u32 int_ctl) return ctl; } +static u32 llc_hw_flen(struct owl_dma_lli *lli) +{ + return lli->hw[OWL_DMADESC_FLEN] & GENMASK(19, 0); +} + static void owl_dma_free_lli(struct owl_dma *od, struct owl_dma_lli *lli) { @@ -349,8 +357,9 @@ static struct owl_dma_lli *owl_dma_add_lli(struct owl_dma_txd *txd, list_add_tail(&next->node, &txd->lli_list); if (prev) { - prev->hw.next_lli = next->phys; - prev->hw.ctrla |= llc_hw_ctrla(OWL_DMA_MODE_LME, 0); + prev->hw[OWL_DMADESC_NEXT_LLI] = next->phys; + prev->hw[OWL_DMADESC_CTRLA] |= + llc_hw_ctrla(OWL_DMA_MODE_LME, 0); } return next; @@ -363,8 +372,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, struct dma_slave_config *sconfig, bool is_cyclic) { - struct owl_dma_lli_hw *hw = &lli->hw; - u32 mode; + u32 mode, ctrlb; mode = OWL_DMA_MODE_PW(0); @@ -405,22 +413,28 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, return -EINVAL; } - hw->next_lli = 0; /* One link list by default */ - hw->saddr = src; - hw->daddr = dst; - - hw->fcnt = 1; /* Frame count fixed as 1 */ - hw->flen = len; /* Max frame length is 1MB */ - hw->src_stride = 0; - hw->dst_stride = 0; - hw->ctrla = llc_hw_ctrla(mode, - OWL_DMA_LLC_SAV_LOAD_NEXT | - OWL_DMA_LLC_DAV_LOAD_NEXT); + lli->hw[OWL_DMADESC_CTRLA] = llc_hw_ctrla(mode, + OWL_DMA_LLC_SAV_LOAD_NEXT | + OWL_DMA_LLC_DAV_LOAD_NEXT); if (is_cyclic) - hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK); + ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK); else - hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK); + ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK); + + lli->hw[OWL_DMADESC_NEXT_LLI] = 0; /* One link list by default */ + lli->hw[OWL_DMADESC_SADDR] = src; + lli->hw[OWL_DMADESC_DADDR] = dst; + lli->hw[OWL_DMADESC_SRC_STRIDE] = 0; + lli->hw[OWL_DMADESC_DST_STRIDE] = 0; + /* + * Word starts from offset 0xC is shared between frame length + * (max frame length is 1MB) and frame count, where first 20 + * bits are for frame length and rest of 12 bits are for frame + * count. + */ + lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20; + lli->hw[OWL_DMADESC_CTRLB] = ctrlb; return 0; } @@ -752,7 +766,7 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) /* Start from the next active node */ if (lli->phys == next_lli_phy) { list_for_each_entry(lli, &txd->lli_list, node) - bytes += lli->hw.flen; + bytes += llc_hw_flen(lli); break; } } @@ -783,7 +797,7 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan, if (vd) { txd = to_owl_txd(&vd->tx); list_for_each_entry(lli, &txd->lli_list, node) - bytes += lli->hw.flen; + bytes += llc_hw_flen(lli); } else { bytes = owl_dma_getbytes_chan(vchan); } From patchwork Thu Jul 2 14:52:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639241 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2E6B618 for ; Thu, 2 Jul 2020 15:03:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AAB8320737 for ; Thu, 2 Jul 2020 15:03:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="uRcLerRj"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Czgpfxph" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AAB8320737 Authentication-Results: mail.kernel.org; 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Thu, 02 Jul 2020 07:53:31 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, vkoul@kernel.org, afaerber@suse.de, manivannan.sadhasivam@linaro.org Subject: [PATCH v5 03/10] dmaengine: Actions: Add support for S700 DMA engine Date: Thu, 2 Jul 2020 20:22:49 +0530 Message-Id: <1593701576-28580-4-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105337_707879_D95AA16B X-CRM114-Status: GOOD ( 21.23 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:443 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, cristian.ciocaltea@gmail.com, dmaengine@vger.kernel.org, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DMA controller present on S700 SoC is compatible with the one on S900 (as most of registers are same), but it has different DMA descriptor structure where registers "fcnt" and "ctrlb" uses different encoding. For instance, on S900 "fcnt" starts at offset 0x0c and uses upper 12 bits whereas on S700, it starts at offset 0x1c and uses lower 12 bits. This commit adds support for DMA controller present on S700. Signed-off-by: Amit Singh Tomar Reported-by: kernel test robot --- Changes since v4: * Reordered it from 02/10 to 03/10. * Used of_device_get_match_data() instead of of_match_device(). * Removed the uintptr_t used for typecast. Changes since v3: * Added description for enum fields. * Restored the old comment. * Added detailed comment about, the way FLEN and FCNT values are filled. Changes since v2: * No change. Changes since v1: * Defined macro for frame count value. * Introduced llc_hw_flen() from patch 2/9. * Removed the unnecessary line break. Changes since rfc: * No change. --- drivers/dma/owl-dma.c | 57 +++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 42 insertions(+), 15 deletions(-) diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c index 948d1bead860..331c8d8b10a3 100644 --- a/drivers/dma/owl-dma.c +++ b/drivers/dma/owl-dma.c @@ -149,6 +149,11 @@ enum owl_dmadesc_offsets { OWL_DMADESC_SIZE }; +enum owl_dma_id { + S900_DMA, + S700_DMA, +}; + /** * struct owl_dma_lli - Link list for dma transfer * @hw: hardware link list @@ -213,6 +218,7 @@ struct owl_dma_vchan { * @pchans: array of data for the physical channels * @nr_vchans: the number of physical channels * @vchans: array of data for the physical channels + * @devid: device id based on OWL SoC */ struct owl_dma { struct dma_device dma; @@ -227,6 +233,7 @@ struct owl_dma { unsigned int nr_vchans; struct owl_dma_vchan *vchans; + enum owl_dma_id devid; }; static void pchan_update(struct owl_dma_pchan *pchan, u32 reg, @@ -316,6 +323,10 @@ static inline u32 llc_hw_ctrlb(u32 int_ctl) { u32 ctl; + /* + * Irrespective of the SoC, ctrlb value starts filling from + * bit 18. + */ ctl = BIT_FIELD(int_ctl, 7, 0, 18); return ctl; @@ -372,6 +383,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, struct dma_slave_config *sconfig, bool is_cyclic) { + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); u32 mode, ctrlb; mode = OWL_DMA_MODE_PW(0); @@ -427,14 +439,26 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, lli->hw[OWL_DMADESC_DADDR] = dst; lli->hw[OWL_DMADESC_SRC_STRIDE] = 0; lli->hw[OWL_DMADESC_DST_STRIDE] = 0; - /* - * Word starts from offset 0xC is shared between frame length - * (max frame length is 1MB) and frame count, where first 20 - * bits are for frame length and rest of 12 bits are for frame - * count. - */ - lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20; - lli->hw[OWL_DMADESC_CTRLB] = ctrlb; + + if (od->devid == S700_DMA) { + /* Max frame length is 1MB */ + lli->hw[OWL_DMADESC_FLEN] = len; + /* + * On S700, word starts from offset 0x1C is shared between + * frame count and ctrlb, where first 12 bits are for frame + * count and rest of 20 bits are for ctrlb. + */ + lli->hw[OWL_DMADESC_CTRLB] = FCNT_VAL | ctrlb; + } else { + /* + * On S900, word starts from offset 0xC is shared between + * frame length (max frame length is 1MB) and frame count, + * where first 20 bits are for frame length and rest of + * 12 bits are for frame count. + */ + lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20; + lli->hw[OWL_DMADESC_CTRLB] = ctrlb; + } return 0; } @@ -596,7 +620,7 @@ static irqreturn_t owl_dma_interrupt(int irq, void *dev_id) global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); - if (chan_irq_pending && !(global_irq_pending & BIT(i))) { + if (chan_irq_pending && !(global_irq_pending & BIT(i))) { dev_dbg(od->dma.dev, "global and channel IRQ pending match err\n"); @@ -1054,6 +1078,13 @@ static struct dma_chan *owl_dma_of_xlate(struct of_phandle_args *dma_spec, return chan; } +static const struct of_device_id owl_dma_match[] = { + { .compatible = "actions,s900-dma", .data = (void *)S900_DMA,}, + { .compatible = "actions,s700-dma", .data = (void *)S700_DMA,}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, owl_dma_match); + static int owl_dma_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -1083,6 +1114,8 @@ static int owl_dma_probe(struct platform_device *pdev) dev_info(&pdev->dev, "dma-channels %d, dma-requests %d\n", nr_channels, nr_requests); + od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev); + od->nr_pchans = nr_channels; od->nr_vchans = nr_requests; @@ -1215,12 +1248,6 @@ static int owl_dma_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id owl_dma_match[] = { - { .compatible = "actions,s900-dma", }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, owl_dma_match); - static struct platform_driver owl_dma_driver = { .probe = owl_dma_probe, .remove = owl_dma_remove, From patchwork Thu Jul 2 14:52:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639243 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 20221618 for ; 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Thu, 02 Jul 2020 07:53:36 -0700 (PDT) Received: from localhost.localdomain ([223.190.0.253]) by smtp.gmail.com with ESMTPSA id 204sm9487891pfc.18.2020.07.02.07.53.32 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:53:35 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, sboyd@kernel.org Subject: [PATCH v5 04/10] clk: actions: Add MMC clock-register reset bits Date: Thu, 2 Jul 2020 20:22:50 +0530 Message-Id: <1593701576-28580-5-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105341_073592_4BF8080B X-CRM114-Status: GOOD ( 12.65 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1044 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commit adds reset bits needed for MMC clock registers present on Actions S700 SoC. Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes from v4: * Reordered it from 03/10 to 04/10. Changes from v3: * NO change. Changes from v2: * No change. Changes from v1: * No change. Changes from RFC: * No change. --- drivers/clk/actions/owl-s700.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c index a2f34d13fb54..cd60eca7727d 100644 --- a/drivers/clk/actions/owl-s700.c +++ b/drivers/clk/actions/owl-s700.c @@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = { [RESET_DSI] = { CMU_DEVRST0, BIT(2) }, [RESET_CSI] = { CMU_DEVRST0, BIT(13) }, [RESET_SI] = { CMU_DEVRST0, BIT(14) }, + [RESET_SD0] = { CMU_DEVRST0, BIT(22) }, + [RESET_SD1] = { CMU_DEVRST0, BIT(23) }, + [RESET_SD2] = { CMU_DEVRST0, BIT(24) }, [RESET_I2C0] = { CMU_DEVRST1, BIT(0) }, [RESET_I2C1] = { CMU_DEVRST1, BIT(1) }, [RESET_I2C2] = { CMU_DEVRST1, BIT(2) }, From patchwork Thu Jul 2 14:52:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639245 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71B6F6C1 for ; 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Thu, 02 Jul 2020 07:53:40 -0700 (PDT) Received: from localhost.localdomain ([223.190.0.253]) by smtp.gmail.com with ESMTPSA id 204sm9487891pfc.18.2020.07.02.07.53.36 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:53:39 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 05/10] arm64: dts: actions: limit address range for pinctrl node Date: Thu, 2 Jul 2020 20:22:51 +0530 Message-Id: <1593701576-28580-6-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105346_770078_F035B588 X-CRM114-Status: GOOD ( 16.61 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:644 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org After commit 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") following error has been observed while booting Linux on Cubieboard7-lite(based on S700 SoC). [ 0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for resource [mem 0xe01b0000-0xe01b0fff] [ 0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16 This is due to the fact that memory range for "sps" power domain controller clashes with pinctrl. One way to fix it, is to limit pinctrl address range which is safe to do as current pinctrl driver uses address range only up to 0x100. This commit limits the pinctrl address range to 0x100 so that it doesn't conflict with sps range. Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") Suggested-by: Andre Przywara Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * Reordered it from 04/10 to 05/10. Changes since v3: * No change. Changes since v2: * this is no more don't merge and fixed the broken S700 boot by limiting pinctrl address range. * Modified the subject to reflect the changes. Changes since v1: * No change. Changes since RFC: * kept as do not merge. --- arch/arm64/boot/dts/actions/s700.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 2006ad5424fa..f8eb72bb4125 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -231,7 +231,7 @@ pinctrl: pinctrl@e01b0000 { compatible = "actions,s700-pinctrl"; - reg = <0x0 0xe01b0000 0x0 0x1000>; + reg = <0x0 0xe01b0000 0x0 0x100>; clocks = <&cmu CLK_GPIO>; gpio-controller; gpio-ranges = <&pinctrl 0 0 136>; From patchwork Thu Jul 2 14:52:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639247 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D54FB618 for ; Thu, 2 Jul 2020 15:05:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 85612206E2 for ; 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Thu, 02 Jul 2020 07:53:44 -0700 (PDT) Received: from localhost.localdomain ([223.190.0.253]) by smtp.gmail.com with ESMTPSA id 204sm9487891pfc.18.2020.07.02.07.53.40 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:53:44 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, vkoul@kernel.org, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 06/10] arm64: dts: actions: Add DMA Controller for S700 Date: Thu, 2 Jul 2020 20:22:52 +0530 Message-Id: <1593701576-28580-7-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105347_758483_FC6C0EB1 X-CRM114-Status: GOOD ( 12.21 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.214.196 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.214.196 listed in wl.mailspike.net] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, cristian.ciocaltea@gmail.com, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commit adds DMA controller present on Actions S700, it differs from S900 in terms of number of dma channels and requests. Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * No change. Changes since v3: * Fixed typo in commit message. * Placed owl-s700-powergate.h in alphabetical order. Changes since v2: * added power-domain property as sps is enabled now and DMA needs it. Changes since v1: * No Change. Changes since RFC: * No Change. --- arch/arm64/boot/dts/actions/s700.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index f8eb72bb4125..2c78caebf515 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include / { @@ -244,5 +245,19 @@ , ; }; + + dma: dma-controller@e0230000 { + compatible = "actions,s700-dma"; + reg = <0x0 0xe0230000 0x0 0x1000>; + interrupts = , + , + , + ; + #dma-cells = <1>; + dma-channels = <10>; + dma-requests = <44>; + clocks = <&cmu CLK_DMAC>; + power-domains = <&sps S700_PD_DMA>; + }; }; }; From patchwork Thu Jul 2 14:52:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639253 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF258618 for ; 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Thu, 02 Jul 2020 07:53:50 -0700 (PDT) Received: from localhost.localdomain ([223.190.0.253]) by smtp.gmail.com with ESMTPSA id 204sm9487891pfc.18.2020.07.02.07.53.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:53:49 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 07/10] dt-bindings: reset: s700: Add binding constants for mmc Date: Thu, 2 Jul 2020 20:22:53 +0530 Message-Id: <1593701576-28580-8-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105355_464593_E392562D X-CRM114-Status: GOOD ( 12.33 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1042 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commit adds device tree binding reset constants for mmc controller present on Actions S700 Soc. Acked-by: Rob Herring Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * No change. Changes since v3: * No change. Changes since v2: * No change. Changes since v1: * No change. Changes since RFC: * added Rob's acked-by tag --- include/dt-bindings/reset/actions,s700-reset.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h index 5e3b16b8ef53..a3118de6d7aa 100644 --- a/include/dt-bindings/reset/actions,s700-reset.h +++ b/include/dt-bindings/reset/actions,s700-reset.h @@ -30,5 +30,8 @@ #define RESET_UART4 20 #define RESET_UART5 21 #define RESET_UART6 22 +#define RESET_SD0 23 +#define RESET_SD1 24 +#define RESET_SD2 25 #endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ From patchwork Thu Jul 2 14:52:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639249 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8CBF413B6 for ; Thu, 2 Jul 2020 15:05:25 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 47E25206B7 for ; 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Thu, 02 Jul 2020 07:53:53 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 08/10] dt-bindings: mmc: owl: add compatible string actions, s700-mmc Date: Thu, 2 Jul 2020 20:22:54 +0530 Message-Id: <1593701576-28580-9-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_155357_952395_DD5F6BB1 X-CRM114-Status: GOOD ( 11.22 ) X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.4.4 on casper.infradead.org summary: Content analysis details: (-1.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:442 listed in] [list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The commit adds a new SoC specific compatible string "actions,s700-mmc" in combination with more generic string "actions,owl-mmc". Placement order of these strings should abide by the principle of "from most specific to most general". Reviewed-by: Rob Herring Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * No change. Changes since v3: * No change. Changes since v2: * Added Rob's Reviewed-by tag --- Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml index 1380501fb8f0..5eab25ccf7ae 100644 --- a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml @@ -14,7 +14,11 @@ maintainers: properties: compatible: - const: actions,owl-mmc + oneOf: + - const: actions,owl-mmc + - items: + - const: actions,s700-mmc + - const: actions,owl-mmc reg: maxItems: 1 From patchwork Thu Jul 2 14:52:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639251 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 22C85618 for ; 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Thu, 02 Jul 2020 07:53:58 -0700 (PDT) Received: from localhost.localdomain ([223.190.0.253]) by smtp.gmail.com with ESMTPSA id 204sm9487891pfc.18.2020.07.02.07.53.54 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:53:57 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 09/10] arm64: dts: actions: Add MMC controller support for S700 Date: Thu, 2 Jul 2020 20:22:55 +0530 Message-Id: <1593701576-28580-10-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_105403_271481_83807B13 X-CRM114-Status: GOOD ( 12.37 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1041 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commits adds support for MMC controllers present on Actions S700 SoC, there are 3 MMC controllers in this SoC which can be used for accessing SD/EMMC/SDIO cards. Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam --- Changes since v4: * No change. Changes since v3: * No change. Changes since v2: * No change. Changes since v1: * Added SoC specific compatibe string. Changes since RFC: * No change --- arch/arm64/boot/dts/actions/s700.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 2c78caebf515..9ed88aafc2da 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -259,5 +259,38 @@ clocks = <&cmu CLK_DMAC>; power-domains = <&sps S700_PD_DMA>; }; + + mmc0: mmc@e0210000 { + compatible = "actions,s700-mmc", "actions,owl-mmc"; + reg = <0x0 0xe0210000 0x0 0x4000>; + interrupts = ; + clocks = <&cmu CLK_SD0>; + resets = <&cmu RESET_SD0>; + dmas = <&dma 2>; + dma-names = "mmc"; + status = "disabled"; + }; + + mmc1: mmc@e0214000 { + compatible = "actions,s700-mmc", "actions,owl-mmc"; + reg = <0x0 0xe0214000 0x0 0x4000>; + interrupts = ; + clocks = <&cmu CLK_SD1>; + resets = <&cmu RESET_SD1>; + dmas = <&dma 3>; + dma-names = "mmc"; + status = "disabled"; + }; + + mmc2: mmc@e0218000 { + compatible = "actions,s700-mmc", "actions,owl-mmc"; + reg = <0x0 0xe0218000 0x0 0x4000>; + interrupts = ; + clocks = <&cmu CLK_SD2>; + resets = <&cmu RESET_SD2>; + dmas = <&dma 4>; + dma-names = "mmc"; + status = "disabled"; + }; }; }; From patchwork Thu Jul 2 14:52:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Tomer X-Patchwork-Id: 11639255 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F35B0618 for ; Thu, 2 Jul 2020 15:06:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F777206B7 for ; Thu, 2 Jul 2020 15:06:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lg8Yi1PK"; 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Thu, 02 Jul 2020 07:54:02 -0700 (PDT) From: Amit Singh Tomar To: andre.przywara@arm.com, afaerber@suse.de, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Subject: [PATCH v5 10/10] arm64: dts: actions: Add uSD support for Cubieboard7 Date: Thu, 2 Jul 2020 20:22:56 +0530 Message-Id: <1593701576-28580-11-git-send-email-amittomer25@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_155407_010421_9C698E2F X-CRM114-Status: GOOD ( 15.38 ) X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.4.4 on casper.infradead.org summary: Content analysis details: (-1.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1042 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [amittomer25[at]gmail.com] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [amittomer25[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, cristian.ciocaltea@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commit adds uSD support for Cubieboard7 board based on Actions Semi S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support added yet, fixed regulator has been used as a regulator node. Signed-off-by: Amit Singh Tomar --- Changes since v4: * No change. Changes since v3: * No change. Changes since v2: * No change. Changes since v1: * No change. Changes since RFC: * No change. --- arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++ arch/arm64/boot/dts/actions/s700.dtsi | 1 + 2 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts index 63e375cd9eb4..ec117eb12f3a 100644 --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts @@ -13,6 +13,7 @@ aliases { serial3 = &uart3; + mmc0 = &mmc0; }; chosen { @@ -28,6 +29,23 @@ device_type = "memory"; reg = <0x1 0xe0000000 0x0 0x0>; }; + + /* Fixed regulator used in the absence of PMIC */ + vcc_3v1: vcc-3v1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.1V"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + }; + + /* Fixed regulator used in the absence of PMIC */ + sd_vcc: sd-vcc { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.1V"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; }; &i2c0 { @@ -81,6 +99,14 @@ bias-pull-up; }; }; + + mmc0_default: mmc0_default { + pinmux { + groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", + "sd0_cmd_mfp", "sd0_clk_mfp"; + function = "sd0"; + }; + }; }; &timer { @@ -90,3 +116,18 @@ &uart3 { status = "okay"; }; + +/* uSD */ +&mmc0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_default>; + cd-gpios = <&pinctrl 120 GPIO_ACTIVE_LOW>; + no-sdio; + no-mmc; + no-1-8-v; + bus-width = <4>; + vmmc-supply = <&sd_vcc>; + vqmmc-supply = <&sd_vcc>; +}; + diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 9ed88aafc2da..ba498cf9217d 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include