From patchwork Mon Jul 30 11:29:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10548927 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 32C69A754 for ; Mon, 30 Jul 2018 11:29:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2453C29AE3 for ; Mon, 30 Jul 2018 11:29:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 18F4E29AEA; Mon, 30 Jul 2018 11:29:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9B33D29AE3 for ; Mon, 30 Jul 2018 11:29:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F1896E07C; Mon, 30 Jul 2018 11:29:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 755A36E07C for ; Mon, 30 Jul 2018 11:29:43 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 12503315-1500050 for multiple; Mon, 30 Jul 2018 12:29:17 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 30 Jul 2018 12:29:16 +0100 Message-Id: <20180730112916.16891-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.18.0 Subject: [Intel-gfx] [PATCH] drm/i915: Limit C-states when waiting for the active request X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eero Tamminen MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP If we are waiting for the currently executing request, we have a good idea that it will be completed in the very near future and so want to cap the CPU_DMA_LATENCY to ensure that we wake up the client quickly. Testcase: igt/gem_sync/store-default Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Cc: Eero Tamminen Cc: Francisco Jerez --- drivers/gpu/drm/i915/i915_request.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index 694269e5b761..dd99eba5ae7c 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -1258,6 +1258,19 @@ static bool __i915_wait_request_check_and_reset(struct i915_request *request) return true; } +struct pm_qos { + struct pm_qos_request req; + struct work_struct work; +}; + +static void pm_qos_del(struct work_struct *work) +{ + struct pm_qos *pm_qos = container_of(work, typeof(*pm_qos), work); + + pm_qos_remove_request(&pm_qos->req); + kfree(pm_qos); +} + /** * i915_request_wait - wait until execution of request has finished * @rq: the request to wait upon @@ -1286,6 +1299,7 @@ long i915_request_wait(struct i915_request *rq, wait_queue_head_t *errq = &rq->i915->gpu_error.wait_queue; DEFINE_WAIT_FUNC(reset, default_wake_function); DEFINE_WAIT_FUNC(exec, default_wake_function); + struct pm_qos *pm_qos = NULL; struct intel_wait wait; might_sleep(); @@ -1387,6 +1401,18 @@ long i915_request_wait(struct i915_request *rq, break; } + if (!pm_qos && + i915_seqno_passed(intel_engine_get_seqno(rq->engine), + wait.seqno - 1)) { + pm_qos = kzalloc(sizeof(*pm_qos), GFP_KERNEL); + if (pm_qos) { + pm_qos_add_request(&pm_qos->req, + PM_QOS_CPU_DMA_LATENCY, + 50); + INIT_WORK(&pm_qos->work, pm_qos_del); + } + } + timeout = schedule_timeout(timeout); if (intel_wait_complete(&wait) && @@ -1443,6 +1469,8 @@ long i915_request_wait(struct i915_request *rq, if (flags & I915_WAIT_LOCKED) remove_wait_queue(errq, &reset); remove_wait_queue(&rq->execute, &exec); + if (pm_qos) + schedule_work(&pm_qos->work); trace_i915_request_wait_end(rq); return timeout;