From patchwork Tue Jul 7 18:09:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 11649523 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02FD3912 for ; Tue, 7 Jul 2020 18:09:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DF0BB20708 for ; Tue, 7 Jul 2020 18:09:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DF0BB20708 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=chris-wilson.co.uk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FE996E0F8; Tue, 7 Jul 2020 18:09:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (unknown [77.68.26.236]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9E9A6E0F8 for ; Tue, 7 Jul 2020 18:09:25 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from build.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 21744515-1500050 for multiple; Tue, 07 Jul 2020 19:09:10 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Jul 2020 19:09:09 +0100 Message-Id: <20200707180909.7556-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200707171517.28183-1-chris@chris-wilson.co.uk> References: <20200707171517.28183-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2] drm/i915/display: Fix initial fb to use resource_size_t X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld , Chris Wilson Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We lookup up the physical address of the inherited framebuffer, and presume that is an offset into the stolen memory region. As we are dealing with physical resources and their addresses, we need to use resource_size_t and not assume everything fits within a plain u32 [based on prior assumptions that we were simply handling offsets into the GGTT not generic addresses/offsets]. We made the switch to using resource_size_t for stolen in commit b7128ef125b4 ("drm/i915: prefer resource_size_t for everything stolen") v2: Expand the intel_initial_plane_config struct as well to accommodate any possible location. Reported-by: Tvrtko Ursulin References: b7128ef125b4 ("drm/i915: prefer resource_size_t for everything stolen") Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Tvrtko Ursulin Cc: Matthew Auld --- drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++++------- .../gpu/drm/i915/display/intel_display_types.h | 4 ++-- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index dff7c17f3d2b..9fd18b3dbb37 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3409,7 +3409,8 @@ initial_plane_vma(struct drm_i915_private *i915, { struct drm_i915_gem_object *obj; struct i915_vma *vma; - u32 base, size; + resource_size_t base; + resource_size_t size; if (plane_config->size == 0) return NULL; @@ -9319,13 +9320,13 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, aligned_height = intel_fb_align_height(fb, 0, fb->height); - plane_config->size = fb->pitches[0] * aligned_height; + plane_config->size = mul_u32_u32(fb->pitches[0], aligned_height); drm_dbg_kms(&dev_priv->drm, - "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", + "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%pa\n", crtc->base.name, plane->base.name, fb->width, fb->height, fb->format->cpp[0] * 8, base, fb->pitches[0], - plane_config->size); + &plane_config->size); plane_config->fb = intel_fb; } @@ -10595,13 +10596,13 @@ skl_get_initial_plane_config(struct intel_crtc *crtc, aligned_height = intel_fb_align_height(fb, 0, fb->height); - plane_config->size = fb->pitches[0] * aligned_height; + plane_config->size = mul_u32_u32(fb->pitches[0], aligned_height); drm_dbg_kms(&dev_priv->drm, - "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", + "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%pa\n", crtc->base.name, plane->base.name, fb->width, fb->height, fb->format->cpp[0] * 8, base, fb->pitches[0], - plane_config->size); + &plane_config->size); plane_config->fb = intel_fb; return; diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index e8f809161c75..75cbf00f5c9b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -591,9 +591,9 @@ struct intel_plane_state { struct intel_initial_plane_config { struct intel_framebuffer *fb; struct i915_vma *vma; + resource_size_t base; + resource_size_t size; unsigned int tiling; - int size; - u32 base; u8 rotation; };