From patchwork Tue Oct 16 15:06:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stewart Hildebrand X-Patchwork-Id: 10643771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5A35814E2 for ; Tue, 16 Oct 2018 15:07:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46E06296F3 for ; Tue, 16 Oct 2018 15:07:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B23629EB9; Tue, 16 Oct 2018 15:07:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B5B26296F3 for ; Tue, 16 Oct 2018 15:07:29 +0000 (UTC) Received: from localhost ([::1]:58573 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCQwT-0003kS-0w for patchwork-qemu-devel@patchwork.kernel.org; Tue, 16 Oct 2018 11:07:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37495) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCQvj-0003My-8f for qemu-devel@nongnu.org; Tue, 16 Oct 2018 11:06:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gCQve-0002cF-IX for qemu-devel@nongnu.org; Tue, 16 Oct 2018 11:06:43 -0400 Received: from mail.dornerworks.com ([12.207.209.150]:39067 helo=webmail.dornerworks.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCQvX-0002Bi-N0; Tue, 16 Oct 2018 11:06:31 -0400 From: Stewart Hildebrand To: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" Thread-Topic: [PATCH v2] hw/arm/boot: Increase compliance with kernel arm64 boot protocol Thread-Index: AdRlXuhcD7hargCPSzOdhzFRhAX+6w== Date: Tue, 16 Oct 2018 15:06:29 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.27.14.152] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 12.207.209.150 Subject: [Qemu-devel] [PATCH v2] hw/arm/boot: Increase compliance with kernel arm64 boot protocol X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Julien Grall , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Andre Przywara Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP "The Image must be placed text_offset bytes from a 2MB aligned base address anywhere in usable system RAM and called there." For the virt board, we write our startup bootloader at the very bottom of RAM, so that bit can't be used for the image. To avoid overlap in case the image requests to be loaded at an offset smaller than our bootloader, we increment the load offset to the next 2MB. This fixes a boot failure for Xen AArch64. Signed-off-by: Stewart Hildebrand Tested-by: Andre Przywara --- Changes v1 -> v2: - use KiB/MiB macros for readability (suggested by Philippe Mathieu-Daudé), hence the additional #include - define an upper bound for the bootloader size since TEXT_OFFSET has to be page aligned anyway (suggested by Andre Przywara) - add assert() in write_bootloader() to make sure we stay below the 4K max (suggested by Peter Maydell) --- hw/arm/boot.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 20c71d7d96..a675a602bc 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -24,6 +24,7 @@ #include "qemu/config-file.h" #include "qemu/option.h" #include "exec/address-spaces.h" +#include "qemu/units.h" /* Kernel boot protocol is specified in the kernel docs * Documentation/arm/Booting and Documentation/arm64/booting.txt @@ -36,6 +37,8 @@ #define ARM64_TEXT_OFFSET_OFFSET 8 #define ARM64_MAGIC_OFFSET 56 +#define BOOTLOADER_MAX_SIZE (4 * KiB) + AddressSpace *arm_boot_address_space(ARMCPU *cpu, const struct arm_boot_info *info) { @@ -184,6 +187,8 @@ static void write_bootloader(const char *name, hwaddr addr, code[i] = tswap32(insn); } + assert((len * sizeof(uint32_t)) < BOOTLOADER_MAX_SIZE); + rom_add_blob_fixed_as(name, code, len * sizeof(uint32_t), addr, as); g_free(code); @@ -919,6 +924,16 @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base, memcpy(&hdrvals, buffer + ARM64_TEXT_OFFSET_OFFSET, sizeof(hdrvals)); if (hdrvals[1] != 0) { kernel_load_offset = le64_to_cpu(hdrvals[0]); + + /* For the virt board, we write our startup "bootloader" at the very + * bottom of RAM, so that bit can't be used for the image. To avoid + * overlap in case the image requests to be loaded at an offset + * smaller than our bootloader, we increment the load offset to the + * next 2MB. + */ + if (kernel_load_offset < BOOTLOADER_MAX_SIZE) { + kernel_load_offset += 2 * MiB; + } } }