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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:41 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 1/5] iommu/arm-smmu: Make all valid stream mappings BYPASS Date: Wed, 8 Jul 2020 22:01:41 -0700 Message-Id: <20200709050145.3520931-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010144_208484_AB6023F5 X-CRM114-Status: GOOD ( 15.13 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1042 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Turn all stream mappings marked as valid into BYPASS. This allows the platform specific implementation to configure stream mappings to match the boot loader's configuration for e.g. display to continue to function through the reset of the SMMU. Suggested-by: Robin Murphy Signed-off-by: Bjorn Andersson Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/iommu/arm-smmu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 243bc4cb2705..2e27cf9815ab 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1924,6 +1924,22 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) return 0; } +int arm_smmu_setup_identity(struct arm_smmu_device *smmu) +{ + int i; + + for (i = 0; i < smmu->num_mapping_groups; i++) { + if (smmu->smrs[i].valid) { + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + smmu->s2crs[i].count++; + } + } + + return 0; +} + struct arm_smmu_match_data { enum arm_smmu_arch_version version; enum arm_smmu_implementation model; @@ -2181,6 +2197,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev) if (err) return err; + err = arm_smmu_setup_identity(smmu); + if (err) + return err; + if (smmu->version == ARM_SMMU_V2) { if (smmu->num_context_banks > smmu->num_context_irqs) { dev_err(dev, From patchwork Thu Jul 9 05:01:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11653343 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E823D6C1 for ; Thu, 9 Jul 2020 05:03:29 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C217D20708 for ; Thu, 9 Jul 2020 05:03:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="NFJ8lefd"; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:42 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 2/5] iommu/arm-smmu: Emulate bypass by using context banks Date: Wed, 8 Jul 2020 22:01:42 -0700 Message-Id: <20200709050145.3520931-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010145_377784_023A57E5 X-CRM114-Status: GOOD ( 22.17 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:442 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some firmware found on various Qualcomm platforms traps writes to S2CR of type BYPASS and writes FAULT into the register. This prevents us from marking the streams for the display controller as BYPASS to allow continued scanout of the screen through the initialization of the ARM SMMU. This adds a Qualcomm specific cfg_probe function, which probes the behavior of the S2CR registers and if found faulty enables the related quirk. Based on this quirk context banks are allocated for IDENTITY domains as well, but with ARM_SMMU_SCTLR_M omitted. The result is valid stream mappings, without translation. Signed-off-by: Bjorn Andersson --- drivers/iommu/arm-smmu-qcom.c | 21 +++++++++++++++++++++ drivers/iommu/arm-smmu.c | 14 ++++++++++++-- drivers/iommu/arm-smmu.h | 3 +++ 3 files changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c index cf01d0215a39..e8a36054e912 100644 --- a/drivers/iommu/arm-smmu-qcom.c +++ b/drivers/iommu/arm-smmu-qcom.c @@ -23,6 +23,26 @@ static const struct of_device_id qcom_smmu_client_of_match[] = { { } }; +static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) +{ + unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); + u32 reg; + + /* + * With some firmware writes to S2CR of type FAULT are ignored, and + * writing BYPASS will end up as FAULT in the register. Perform a write + * to S2CR to detect if this is the case with the current firmware. + */ + arm_smmu_gr0_write(smmu, last_s2cr, FIELD_PREP(ARM_SMMU_S2CR_TYPE, S2CR_TYPE_BYPASS) | + FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) | + FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT)); + reg = arm_smmu_gr0_read(smmu, last_s2cr); + if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) + smmu->qcom_bypass_quirk = true; + + return 0; +} + static int qcom_smmu_def_domain_type(struct device *dev) { const struct of_device_id *match = @@ -61,6 +81,7 @@ static int qcom_smmu500_reset(struct arm_smmu_device *smmu) } static const struct arm_smmu_impl qcom_smmu_impl = { + .cfg_probe = qcom_smmu_cfg_probe, .def_domain_type = qcom_smmu_def_domain_type, .reset = qcom_smmu500_reset, }; diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 2e27cf9815ab..f33eda3117fa 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -654,7 +654,9 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) /* SCTLR */ reg = ARM_SMMU_SCTLR_CFIE | ARM_SMMU_SCTLR_CFRE | ARM_SMMU_SCTLR_AFE | - ARM_SMMU_SCTLR_TRE | ARM_SMMU_SCTLR_M; + ARM_SMMU_SCTLR_TRE; + if (cfg->m) + reg |= ARM_SMMU_SCTLR_M; if (stage1) reg |= ARM_SMMU_SCTLR_S1_ASIDPNE; if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) @@ -678,7 +680,11 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, if (smmu_domain->smmu) goto out_unlock; - if (domain->type == IOMMU_DOMAIN_IDENTITY) { + /* + * Nothing to do for IDENTITY domains,unless disabled context banks are + * used to emulate bypass mappings on Qualcomm platforms. + */ + if (domain->type == IOMMU_DOMAIN_IDENTITY && !smmu->qcom_bypass_quirk) { smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; smmu_domain->smmu = smmu; goto out_unlock; @@ -826,6 +832,10 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, domain->geometry.aperture_end = (1UL << ias) - 1; domain->geometry.force_aperture = true; + /* Enable translation for non-identity context banks */ + if (domain->type != IOMMU_DOMAIN_IDENTITY) + cfg->m = true; + /* Initialise the context bank with our page table cfg */ arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg); arm_smmu_write_context_bank(smmu, cfg->cbndx); diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h index d172c024be61..a71d193073e4 100644 --- a/drivers/iommu/arm-smmu.h +++ b/drivers/iommu/arm-smmu.h @@ -305,6 +305,8 @@ struct arm_smmu_device { /* IOMMU core code handle */ struct iommu_device iommu; + + bool qcom_bypass_quirk; }; enum arm_smmu_context_fmt { @@ -323,6 +325,7 @@ struct arm_smmu_cfg { }; enum arm_smmu_cbar_type cbar; enum arm_smmu_context_fmt fmt; + bool m; }; #define ARM_SMMU_INVALID_IRPTNDX 0xff From patchwork Thu Jul 9 05:01:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11653339 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 610FA6C1 for ; Thu, 9 Jul 2020 05:03:27 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A8E520708 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:43 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 3/5] iommu/arm-smmu: Move SMR and S2CR definitions to header file Date: Wed, 8 Jul 2020 22:01:43 -0700 Message-Id: <20200709050145.3520931-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010146_955677_D1648CC7 X-CRM114-Status: GOOD ( 12.23 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1043 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Expose the SMR and S2CR structs in the header file, to allow platform specific implementations to populate/initialize the smrs and s2cr arrays. Signed-off-by: Bjorn Andersson --- drivers/iommu/arm-smmu.c | 14 -------------- drivers/iommu/arm-smmu.h | 15 +++++++++++++++ 2 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index f33eda3117fa..e2d6c0aaf1ea 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -68,24 +68,10 @@ module_param(disable_bypass, bool, S_IRUGO); MODULE_PARM_DESC(disable_bypass, "Disable bypass streams such that incoming transactions from devices that are not attached to an iommu domain will report an abort back to the device and will not be allowed to pass through the SMMU."); -struct arm_smmu_s2cr { - struct iommu_group *group; - int count; - enum arm_smmu_s2cr_type type; - enum arm_smmu_s2cr_privcfg privcfg; - u8 cbndx; -}; - #define s2cr_init_val (struct arm_smmu_s2cr){ \ .type = disable_bypass ? S2CR_TYPE_FAULT : S2CR_TYPE_BYPASS, \ } -struct arm_smmu_smr { - u16 mask; - u16 id; - bool valid; -}; - struct arm_smmu_cb { u64 ttbr[2]; u32 tcr[2]; diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h index a71d193073e4..bcd160d01c53 100644 --- a/drivers/iommu/arm-smmu.h +++ b/drivers/iommu/arm-smmu.h @@ -251,6 +251,21 @@ enum arm_smmu_implementation { QCOM_SMMUV2, }; +struct arm_smmu_s2cr { + struct iommu_group *group; + int count; + enum arm_smmu_s2cr_type type; + enum arm_smmu_s2cr_privcfg privcfg; + u8 cbndx; +}; + +struct arm_smmu_smr { + u16 mask; + u16 id; + bool valid; + bool pinned; +}; + struct arm_smmu_device { struct device *dev; From patchwork Thu Jul 9 05:01:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11653347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A29DE6C1 for ; Thu, 9 Jul 2020 05:03:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CDFE20708 for ; Thu, 9 Jul 2020 05:03:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PPo5AtEO"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="pMadG799" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CDFE20708 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iixEOHZA0Ro5a7dtf6hXTUfjHIbQ9lFVAyEGG5caId8=; b=PPo5AtEOgTbRM/vrEFATI3lVO FD9SbHlsJMid/9ofGwK6zg/co+vPr2Uht4i1u35uVpASrv4i8pxfVSCp7XN5K+pAZK4rKRytVpH+T hIC/kLBWGUuSOqr80CqSRQBELLquzhkIHbcZinAVp9BPFBst6emFSc4Bth39pYx+xj2jztzLLh1Yg ekpHPP6xxgx0Grm4L4o1AwkD0u8+gx+/Zqrkf6KwKKJRR/Og76/iqXRhsbuKtgAcx/9JpEtPzz/Bn bpolhTU9M224UakC28EeSAWpslCSOaP5bl6n7XPZOy+/UNKlIs1SJnu2sVrqPdk20uzwck4//jqpg QdFIBWL/w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtOh7-0007SO-WB; Thu, 09 Jul 2020 05:02:03 +0000 Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtOgv-0007Mt-Or for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2020 05:01:52 +0000 Received: by mail-pl1-x643.google.com with SMTP id x9so344589plr.2 for ; Wed, 08 Jul 2020 22:01:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=410aRxR/jUVzarYYA7FRja4VMLxxjmJi5LB1naX7CXw=; b=pMadG799IDnLhFVn72xi9qEswo6WriD7WzmvA0YSRVBHLDFdlJlXUWOhI85zGWE8FF BQpX3w8cQhZAmZfj5SzYtuZ734FjH2WvmZuKI3lZTJVr6CXkYaV7PrTLtqTZkMoa3lmq CxOcLRZwzcJUyfNbB93hH9X/KNrEazeClJ1ZzP8aaS/IUKWoyoiYyriWoQwwQ1Gl52ZT bJ6Cv247hS8zFF0YMuarBnAPXKnxQCnfyxx77xzqpbRxFJk4VeCGkPl+gaqr/Kl6U0XB 62aQwYZwvjXo6u+BMOvoipMHZAafGfKkF15TIOrygpjRcjZIZV67V09shv5RSRulIOLZ QHJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=410aRxR/jUVzarYYA7FRja4VMLxxjmJi5LB1naX7CXw=; b=aPzjhBJ285aJUCvVS+WYpObbJA5V/xWYcAduGVNrChj1hOFHqzqz98MkRd+euKRPrn Ojqzh3G6hV9hVhVT2fPxTYw3dvDfrLOQ6KOO119JcwXpsscdQTToln+B4v2PHdgUAkHW ViMJeXI1p7IMzRfpWRRdDfRs7cMb4XqAbLS2JhjMInJHRMWXPuLUYWs+e2NgXU0vkyYv IALiSHKqotljYD2WPtjLEmqvgmS+0dhxumyne+S999qSe5QNqq6qbWdzIm5tv5D7dK7A Znw/9VSki5FLblgqKTjqm4+dEyZKlC+EcuWPTdCVp/DctfC0xJFpc/UX3EanBe81AG9P t0Iw== X-Gm-Message-State: AOAM532lEwl0hiI5TED4HNxssUj5y2o5Fbmxjx3HOYJCX3PgETYurEYH 86ZQW2JrxluRSLKSLlqnRX6nzQ== X-Google-Smtp-Source: ABdhPJzn/WLmoGZFSRbIxVw2BwDD4/FnLqo5Y/X/J/6ujt0hVGxCmLwin0PsGP8NMF1YQ2L16L9uEw== X-Received: by 2002:a17:90b:30c4:: with SMTP id hi4mr12329792pjb.166.1594270906127; Wed, 08 Jul 2020 22:01:46 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:45 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 4/5] iommu/arm-smmu-qcom: Consstently initialize stream mappings Date: Wed, 8 Jul 2020 22:01:44 -0700 Message-Id: <20200709050145.3520931-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010150_336553_ABB9AB84 X-CRM114-Status: GOOD ( 16.12 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:643 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Firmware that traps writes to S2CR to translate BYPASS into FAULT also ignores writes of type FAULT. As such booting with "disable_bypass" set will result in all S2CR registers left as configured by the bootloader. This has been seen to result in indeterministic results, as these mappings might linger and reference context banks that Linux is reconfiguring. Use the fact that BYPASS writes result in FAULT type to force all stream mappings to FAULT. Signed-off-by: Bjorn Andersson --- drivers/iommu/arm-smmu-qcom.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c index e8a36054e912..86b1917459a4 100644 --- a/drivers/iommu/arm-smmu-qcom.c +++ b/drivers/iommu/arm-smmu-qcom.c @@ -27,6 +27,7 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) { unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); u32 reg; + int i; /* * With some firmware writes to S2CR of type FAULT are ignored, and @@ -37,9 +38,24 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) | FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT)); reg = arm_smmu_gr0_read(smmu, last_s2cr); - if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) + if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) { smmu->qcom_bypass_quirk = true; + /* + * With firmware ignoring writes of type FAULT, booting the + * Linux kernel with disable_bypass disabled (i.e. "enable + * bypass") the initialization during probe will leave mappings + * in an inconsistent state. Avoid this by configuring all + * S2CRs to BYPASS. + */ + for (i = 0; i < smmu->num_mapping_groups; i++) { + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + smmu->s2crs[i].count = 0; + } + } + return 0; } From patchwork Thu Jul 9 05:01:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11653349 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 673686C1 for ; Thu, 9 Jul 2020 05:03:40 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4106620708 for ; Thu, 9 Jul 2020 05:03:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="RDHR3YRf"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sJK6emFs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4106620708 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1jeNA6A7/kkCeMB20thadrqiGSPD5TucnB1UCysytjs=; b=RDHR3YRfEJ6fNIOOAS8Gq3wCv cC8uwjphZbnUD2OYymSS0NGnMSRFs1YOeseKhOqej3GvqKiFofT5Qg/tiLwS1eMicI9MRG0VIfdQB N5pfI2BmvD7WnpcPLNU7/cSev7bOYIxHtlr5CCgtKb939RjVzO0KpgYam6Z6sAYMRtpV3O+jmQxqU F0A77WH0XwbsLpiXjV4sxRiilZH/CzsuPn38TBUbBlJcdR0kBHR3kju/hBNOXDltgo9N56qy7Ypv8 /Azx5Io9aFozykXcXM0K7PbHjfpBIHhounumtTuamfu0iGZs+zHvj0la/NUj2ChgEK2HjmcHVm4jl rvmF7H3Ig==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtOhB-0007TF-1a; Thu, 09 Jul 2020 05:02:05 +0000 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtOgw-0007Nu-KL for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2020 05:01:54 +0000 Received: by mail-pf1-x444.google.com with SMTP id 1so485196pfn.9 for ; Wed, 08 Jul 2020 22:01:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fpwjVW7Z+irWop7fAETDGc/ua6yC0KP+NMCvyoQB9RI=; b=sJK6emFsSGA7psgbjAjtw3CRMaGl/+7BOiQ4h4025c9G/rVWUt0A6aJm2gjrW8i7Wy Yrym08TuQl9dY0zvkSbZ2r1/VkMl4GOvHkhCCCatBhYTHgqUtf3X/9W37MpGiTG7Ktqy BbCRqZIA9yjdjCFauiLj1eh/8Zc525Iq225fyNlSNCU3zACQgRcYzKxpgK5hJOf17Juy F/VEaHTOmE4WWQxzVIloHzKMBszVPgWKskOtDFsQo9NG/9EL3K8OFict6ASYJSd0JOfE Wuthn6aw7DFI318hoKqJBVPR0kKzmuVqmDzwrfqlYB1YhNi++hQtjUHpmC8jwlJllPsm X4Hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fpwjVW7Z+irWop7fAETDGc/ua6yC0KP+NMCvyoQB9RI=; b=l8QVdLGSjLNk+vs+BQxuD8HF0WtJuZhkWcE7aN7SEfwCqK1YecdVX3YP6BVDNqs7ew a3//Z6HAHPDKEfKrO+N2kSniJiueugEbct45TQowoSoRFgbZGg0Pj+XUeJGB4LDY5hUw 1e/FkckVmG3wpyZlOxtbHMsO8nt3/6tVRm65koybcQBmYOWni5YT5VGIU2xY16Gkp/ga DYlsQryWrvqlYz1xAYrqIK2khCByDzYJnMjIfOQ/njtNqVNo5n2tUqc6AIqzRHeIQxzz ZmxgoJag1Fwxd8dptWVS5zx0ifvguzzez1v+jmZHj+2Lzgd0b+u8OxraSKhvpiKOxEVs KabA== X-Gm-Message-State: AOAM531Tbebq6JCfZ4ZfD+m7dSrXvD0eDpujPYV7lZDzSb0HdIfbR8bS SqAy3fr2Ar8ZAdc6d2UR+ykKqQ== X-Google-Smtp-Source: ABdhPJzN6OwP8GTvSH4ENnFiwWNlVHQa4IJ6tTaqVk88twX1CJ1jwT8Jvpf9n9tYDT6X1OX3iMcKTA== X-Received: by 2002:a63:e114:: with SMTP id z20mr45873953pgh.300.1594270907500; Wed, 08 Jul 2020 22:01:47 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:46 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 5/5] iommu/arm-smmu: Setup identity domain for boot mappings Date: Wed, 8 Jul 2020 22:01:45 -0700 Message-Id: <20200709050145.3520931-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010150_779213_4694CB7C X-CRM114-Status: GOOD ( 26.33 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org With many Qualcomm platforms not having functional S2CR BYPASS a temporary IOMMU domain, without translation, needs to be allocated in order to allow these memory transactions. Unfortunately the boot loader uses the first few context banks, so rather than overwriting a active bank the last context bank is used and streams are diverted here during initialization. This also performs the readback of SMR registers for the Qualcomm platform, to trigger the mechanism. This is based on prior work by Thierry Reding and Laurentiu Tudor. Signed-off-by: Bjorn Andersson Tested-by: Laurentiu Tudor --- drivers/iommu/arm-smmu-qcom.c | 11 +++++ drivers/iommu/arm-smmu.c | 80 +++++++++++++++++++++++++++++++++-- drivers/iommu/arm-smmu.h | 3 ++ 3 files changed, 90 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c index 86b1917459a4..397df27c1d69 100644 --- a/drivers/iommu/arm-smmu-qcom.c +++ b/drivers/iommu/arm-smmu-qcom.c @@ -26,6 +26,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] = { static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) { unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); + u32 smr; u32 reg; int i; @@ -56,6 +57,16 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) } } + for (i = 0; i < smmu->num_mapping_groups; i++) { + smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); + + if (FIELD_GET(ARM_SMMU_SMR_VALID, smr)) { + smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); + smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); + smmu->smrs[i].valid = true; + } + } + return 0; } diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index e2d6c0aaf1ea..a7cb27c1a49e 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -652,7 +652,8 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) } static int arm_smmu_init_domain_context(struct iommu_domain *domain, - struct arm_smmu_device *smmu) + struct arm_smmu_device *smmu, + bool boot_domain) { int irq, start, ret = 0; unsigned long ias, oas; @@ -770,6 +771,15 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, ret = -EINVAL; goto out_unlock; } + + /* + * Use the last context bank for identity mappings during boot, to + * avoid overwriting in-use bank configuration while we're setting up + * the new mappings. + */ + if (boot_domain) + start = smmu->num_context_banks - 1; + ret = __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); if (ret < 0) @@ -1149,7 +1159,10 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct arm_smmu_master_cfg *cfg; struct arm_smmu_device *smmu; + bool free_identity_domain = false; + int idx; int ret; + int i; if (!fwspec || fwspec->ops != &arm_smmu_ops) { dev_err(dev, "cannot attach to SMMU, is it on the same bus?\n"); @@ -1174,7 +1187,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) return ret; /* Ensure that the domain is finalised */ - ret = arm_smmu_init_domain_context(domain, smmu); + ret = arm_smmu_init_domain_context(domain, smmu, false); if (ret < 0) goto rpm_put; @@ -1190,9 +1203,34 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) goto rpm_put; } + /* Decrement use counter for any references to the identity domain */ + mutex_lock(&smmu->stream_map_mutex); + if (smmu->identity) { + struct arm_smmu_domain *identity = to_smmu_domain(smmu->identity); + + for_each_cfg_sme(cfg, fwspec, i, idx) { + dev_err(smmu->dev, "%s() %#x\n", __func__, smmu->smrs[idx].id); + if (smmu->s2crs[idx].cbndx == identity->cfg.cbndx) { + smmu->num_identity_masters--; + if (smmu->num_identity_masters == 0) + free_identity_domain = true; + } + } + } + mutex_unlock(&smmu->stream_map_mutex); + /* Looks ok, so add the device to the domain */ ret = arm_smmu_domain_add_master(smmu_domain, cfg, fwspec); + /* + * The last stream map to reference the identity domain has been + * overwritten, so it's now okay to free it. + */ + if (free_identity_domain) { + arm_smmu_domain_free(smmu->identity); + smmu->identity = NULL; + } + /* * Setup an autosuspend delay to avoid bouncing runpm state. * Otherwise, if a driver for a suspended consumer device @@ -1922,17 +1960,51 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) int arm_smmu_setup_identity(struct arm_smmu_device *smmu) { + struct device *dev = smmu->dev; + int cbndx = 0xff; + int type = S2CR_TYPE_BYPASS; + int ret; int i; + if (smmu->qcom_bypass_quirk) { + /* Create a IDENTITY domain to use for all inherited streams */ + smmu->identity = arm_smmu_domain_alloc(IOMMU_DOMAIN_IDENTITY); + if (!smmu->identity) { + dev_err(dev, "failed to create identity domain\n"); + return -ENOMEM; + } + + smmu->identity->pgsize_bitmap = smmu->pgsize_bitmap; + smmu->identity->type = IOMMU_DOMAIN_IDENTITY; + smmu->identity->ops = &arm_smmu_ops; + + ret = arm_smmu_init_domain_context(smmu->identity, smmu, true); + if (ret < 0) { + dev_err(dev, "failed to initialize identity domain: %d\n", ret); + return ret; + } + + type = S2CR_TYPE_TRANS; + cbndx = to_smmu_domain(smmu->identity)->cfg.cbndx; + } + for (i = 0; i < smmu->num_mapping_groups; i++) { if (smmu->smrs[i].valid) { - smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].type = type; smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; - smmu->s2crs[i].cbndx = 0xff; + smmu->s2crs[i].cbndx = cbndx; smmu->s2crs[i].count++; + + smmu->num_identity_masters++; } } + /* If no mappings where found, free the identiy domain again */ + if (smmu->identity && !smmu->num_identity_masters) { + arm_smmu_domain_free(smmu->identity); + smmu->identity = NULL; + } + return 0; } diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h index bcd160d01c53..37257ede86fa 100644 --- a/drivers/iommu/arm-smmu.h +++ b/drivers/iommu/arm-smmu.h @@ -321,6 +321,9 @@ struct arm_smmu_device { /* IOMMU core code handle */ struct iommu_device iommu; + struct iommu_domain *identity; + unsigned int num_identity_masters; + bool qcom_bypass_quirk; };