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Signed-off-by: Laurentiu Palcu --- drivers/gpu/drm/imx/dcss/dcss-drv.c | 89 ++++++++++++++++++++++------- drivers/gpu/drm/imx/dcss/dcss-kms.c | 14 ++++- drivers/gpu/drm/imx/dcss/dcss-kms.h | 4 +- 3 files changed, 80 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/imx/dcss/dcss-drv.c b/drivers/gpu/drm/imx/dcss/dcss-drv.c index 8dc2f85c514b..09d0ac28e28a 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-drv.c +++ b/drivers/gpu/drm/imx/dcss/dcss-drv.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include "dcss-dev.h" @@ -14,6 +15,8 @@ struct dcss_drv { struct dcss_dev *dcss; struct dcss_kms_dev *kms; + + bool is_componentized; }; struct dcss_dev *dcss_drv_dev_to_dcss(struct device *dev) @@ -30,30 +33,18 @@ struct drm_device *dcss_drv_dev_to_drm(struct device *dev) return mdrv ? &mdrv->kms->base : NULL; } -static int dcss_drv_platform_probe(struct platform_device *pdev) +static int dcss_drv_init(struct device *dev, bool componentized) { - struct device *dev = &pdev->dev; - struct device_node *remote; struct dcss_drv *mdrv; int err = 0; - bool hdmi_output = true; - - if (!dev->of_node) - return -ENODEV; - - remote = of_graph_get_remote_node(dev->of_node, 0, 0); - if (!remote) - return -ENODEV; - - hdmi_output = !of_device_is_compatible(remote, "fsl,imx8mq-nwl-dsi"); - - of_node_put(remote); mdrv = kzalloc(sizeof(*mdrv), GFP_KERNEL); if (!mdrv) return -ENOMEM; - mdrv->dcss = dcss_dev_create(dev, hdmi_output); + mdrv->is_componentized = componentized; + + mdrv->dcss = dcss_dev_create(dev, componentized); if (IS_ERR(mdrv->dcss)) { err = PTR_ERR(mdrv->dcss); goto err; @@ -61,7 +52,7 @@ static int dcss_drv_platform_probe(struct platform_device *pdev) dev_set_drvdata(dev, mdrv); - mdrv->kms = dcss_kms_attach(mdrv->dcss); + mdrv->kms = dcss_kms_attach(mdrv->dcss, componentized); if (IS_ERR(mdrv->kms)) { err = PTR_ERR(mdrv->kms); goto dcss_shutoff; @@ -79,19 +70,73 @@ static int dcss_drv_platform_probe(struct platform_device *pdev) return err; } -static int dcss_drv_platform_remove(struct platform_device *pdev) +static void dcss_drv_deinit(struct device *dev, bool componentized) { - struct dcss_drv *mdrv = dev_get_drvdata(&pdev->dev); + struct dcss_drv *mdrv = dev_get_drvdata(dev); if (!mdrv) - return 0; + return; - dcss_kms_detach(mdrv->kms); + dcss_kms_detach(mdrv->kms, componentized); dcss_dev_destroy(mdrv->dcss); - dev_set_drvdata(&pdev->dev, NULL); + dev_set_drvdata(dev, NULL); kfree(mdrv); +} + +static int dcss_drv_bind(struct device *dev) +{ + return dcss_drv_init(dev, true); +} + +static void dcss_drv_unbind(struct device *dev) +{ + return dcss_drv_deinit(dev, true); +} + +static const struct component_master_ops dcss_master_ops = { + .bind = dcss_drv_bind, + .unbind = dcss_drv_unbind, +}; + +static int compare_of(struct device *dev, void *data) +{ + return dev->of_node == data; +} + +static int dcss_drv_platform_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct component_match *match = NULL; + struct device_node *remote; + + if (!dev->of_node) + return -ENODEV; + + remote = of_graph_get_remote_node(dev->of_node, 0, 0); + if (!remote) + return -ENODEV; + + if (of_device_is_compatible(remote, "fsl,imx8mq-nwl-dsi")) { + of_node_put(remote); + return dcss_drv_init(dev, false); + } + + drm_of_component_match_add(dev, &match, compare_of, remote); + of_node_put(remote); + + return component_master_add_with_match(dev, &dcss_master_ops, match); +} + +static int dcss_drv_platform_remove(struct platform_device *pdev) +{ + struct dcss_drv *mdrv = dev_get_drvdata(&pdev->dev); + + if (mdrv->is_componentized) + component_master_del(&pdev->dev, &dcss_master_ops); + else + dcss_drv_deinit(&pdev->dev, false); return 0; } diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.c b/drivers/gpu/drm/imx/dcss/dcss-kms.c index 3ca49d0a3e61..bb009f3a878f 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-kms.c +++ b/drivers/gpu/drm/imx/dcss/dcss-kms.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "dcss-dev.h" #include "dcss-kms.h" @@ -106,7 +107,7 @@ static int dcss_kms_setup_encoder(struct dcss_kms_dev *kms) return drm_bridge_attach(encoder, bridge, NULL, 0); } -struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) +struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss, bool componentized) { struct dcss_kms_dev *kms; struct drm_device *drm; @@ -135,7 +136,11 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) if (ret) goto cleanup_mode_config; - ret = dcss_kms_setup_encoder(kms); + if (componentized) + ret = component_bind_all(dcss->dev, kms); + else + ret = dcss_kms_setup_encoder(kms); + if (ret) goto cleanup_crtc; @@ -162,9 +167,10 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) return ERR_PTR(ret); } -void dcss_kms_detach(struct dcss_kms_dev *kms) +void dcss_kms_detach(struct dcss_kms_dev *kms, bool componentized) { struct drm_device *drm = &kms->base; + struct dcss_dev *dcss = drm->dev_private; drm_dev_unregister(drm); drm_kms_helper_poll_fini(drm); @@ -173,5 +179,7 @@ void dcss_kms_detach(struct dcss_kms_dev *kms) drm->irq_enabled = false; drm_mode_config_cleanup(drm); dcss_crtc_deinit(&kms->crtc, drm); + if (componentized) + component_unbind_all(dcss->dev, drm); drm->dev_private = NULL; } diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.h b/drivers/gpu/drm/imx/dcss/dcss-kms.h index 1f51c86c6986..9b3bc7be9e84 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-kms.h +++ b/drivers/gpu/drm/imx/dcss/dcss-kms.h @@ -31,8 +31,8 @@ struct dcss_kms_dev { struct drm_encoder encoder; }; -struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss); -void dcss_kms_detach(struct dcss_kms_dev *kms); +struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss, bool componentized); +void dcss_kms_detach(struct dcss_kms_dev *kms, bool componentized); int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm); void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm); struct dcss_plane *dcss_plane_init(struct drm_device *drm, From patchwork Thu Jul 9 16:47:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Palcu X-Patchwork-Id: 11654749 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9048092A for ; Thu, 9 Jul 2020 16:49:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 639D320720 for ; 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Signed-off-by: Laurentiu Palcu Reviewed-by: Rob Herring --- .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 000000000000..a951409cf76d --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: iMX8MQ Display Controller Subsystem (DCSS) + +maintainers: + - Laurentiu Palcu + +description: + + The DCSS (display controller sub system) is used to source up to three + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 + image processing capabilities are included to provide a solution capable of + driving next generation high dynamic range displays. + +properties: + compatible: + const: nxp,imx8mq-dcss + + reg: + items: + - description: DCSS base address and size, up to IRQ steer start + - description: DCSS BLKCTL base address and size + + interrupts: + items: + - description: Context loader completion and error interrupt + - description: DTG interrupt used to signal context loader trigger time + - description: DTG interrupt for Vblank + + interrupt-names: + items: + - const: ctxld + - const: ctxld_kick + - const: vblank + + clocks: + items: + - description: Display APB clock for all peripheral PIO access interfaces + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL + - description: RTRAM clock + - description: Pixel clock, can be driver either by HDMI phy clock or MIPI + - description: DTRC clock, needed by video decompressor + + clock-names: + items: + - const: apb + - const: axi + - const: rtrm + - const: pix + - const: dtrc + + port: + type: object + description: + A port node pointing to the input port of a HDMI/DP or MIPI display bridge. + +examples: + - | + dcss: display-controller@32e00000 { + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctxld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk 248>, <&clk 247>, <&clk 249>, + <&clk 254>,<&clk 122>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>; + assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>; + assigned-clock-rates = <800000000>, + <400000000>; + port { + dcss_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; + From patchwork Thu Jul 9 16:47:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Palcu X-Patchwork-Id: 11654753 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D031B60D for ; Thu, 9 Jul 2020 16:50:02 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A6F3320720 for ; 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X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [40.107.6.68 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.6.68 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, agx@sigxcpu.org, lukas@mntmn.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, laurentiu.palcu@oss.nxp.com, linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Laurentiu Palcu This patch adds the node for iMX8MQ Display Controller Subsystem. Signed-off-by: Laurentiu Palcu --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 978f8122c0d2..022720cdf6ed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1040,6 +1040,29 @@ #size-cells = <1>; ranges = <0x32c00000 0x32c00000 0x400000>; + dcss: display-controller@32e00000 { + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctxld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, + <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, + <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, + <&clk IMX8MQ_VIDEO2_PLL_OUT>, + <&clk IMX8MQ_CLK_DISP_DTRC>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, + <&clk IMX8MQ_CLK_DISP_RTRM>, + <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_CLK_27M>; + assigned-clock-rates = <800000000>, + <400000000>; + status = "disabled"; + }; + irqsteer: interrupt-controller@32e2d000 { compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; reg = <0x32e2d000 0x1000>;