From patchwork Thu Jul 9 22:30:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11655197 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7DB7A618 for ; Thu, 9 Jul 2020 22:31:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 61F78207FF for ; Thu, 9 Jul 2020 22:31:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="A3e6kEKT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726821AbgGIWba (ORCPT ); Thu, 9 Jul 2020 18:31:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726213AbgGIWb3 (ORCPT ); Thu, 9 Jul 2020 18:31:29 -0400 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02A7FC08C5CE; Thu, 9 Jul 2020 15:31:29 -0700 (PDT) Received: by mail-wm1-x343.google.com with SMTP id o8so3709717wmh.4; Thu, 09 Jul 2020 15:31:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mpaSC1p/M8e0C5xyo/fI8EkMIZMfzNU5RHEEosFQwkY=; b=A3e6kEKTFE2n6CcwbKQq2Inhn3T+FIOIUwAWN8oGpVKSU1UgFg/klx6QWgDs7mAxBd sRXYgcg44gxTnAYfcD/Z/XUT+cxMFaCxHAMBCVSsGcVsP0r6yBHFDjfgFyLbWHO15ZmW GTMe3ZCjVXHdz7yIclj86BGfoaxyhZbkGP5JLUOGXkRP+3EvHHoLVVZWi3j+hygUO0Qv ZA4/k3gqD4SxoDScspPLhwZ+u0jiMqHKKOGN0b13bl4uHhPyOAOKYnYEN1Vjw8tm2HLx FmtL714hOle6wK/csi38lpXXycByepx+4ugUt1ep6cdB/TuMFC43bdKgzkGONNirz7Ux kpwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mpaSC1p/M8e0C5xyo/fI8EkMIZMfzNU5RHEEosFQwkY=; b=E3/2Cz1ZxWcSThOLDO96OFFa9p02g4SoOu0Y9FwLr1qB/+uhf6AEfmwze6AJ7a+xPo ozySGWsKl1Fj+Q3nIxhiGsAL2N0c6LDwTmm98HJydQ/3fMtoiCwmWwAqfVDHFwe7lmFm W2B0hHxcoiu3OyFrkap/U8HNFRbO5hEnelPzwfB2HL9UGyXYTtv8IAwBrPE8skKmOrUd XGTfAey7DVvHWkWBwnMGvO7lLAFWSYoRVBCsZE3IusxiE6SI+iewAx/1UIetjm1mpwTX Fd3EsZdXRDY4tWl4Ii6zZrPF5AHHGR7jcfUABEDovaco5wxeDvtPhRa7SMiblJIqicbV LE4A== X-Gm-Message-State: AOAM532uljSWjeeSfj4NRPSyvwH1mYpzki9E8knVSQB1h7RNfN4OqITT EFxO2tBWlY/Y/+pJ8MtltVOkKaYB X-Google-Smtp-Source: ABdhPJzAvLP4sYtSL0vWpmJssD1e0dwtEbAj8qXuWKQxQOQUr3kylO+ittQsdj5HZfzOebIUCRPP3w== X-Received: by 2002:a1c:96ce:: with SMTP id y197mr2034605wmd.86.1594333887420; Thu, 09 Jul 2020 15:31:27 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id m10sm7375267wru.4.2020.07.09.15.31.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 15:31:26 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Justin Chen , Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 1/6] irqchip/bcm7120-l2: Set controller as wake-up source Date: Thu, 9 Jul 2020 15:30:11 -0700 Message-Id: <20200709223016.989-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Justin Chen Utilize the Broadcom interrupt controller standard property "brcm,irq-can-wake" to flag whether this particular interrupt controller instance is wake-up capable. Since we do not know what type of parent interrupt controller we are interfaced with, ensure that enable_irq_wake() is called early on. Signed-off-by: Justin Chen Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7120-l2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c index 586df3587be0..c7c9e976acbb 100644 --- a/drivers/irqchip/irq-bcm7120-l2.c +++ b/drivers/irqchip/irq-bcm7120-l2.c @@ -143,6 +143,9 @@ static int bcm7120_l2_intc_init_one(struct device_node *dn, irq_set_chained_handler_and_data(parent_irq, bcm7120_l2_intc_irq_handle, l1_data); + if (data->can_wake) + enable_irq_wake(parent_irq); + return 0; } @@ -247,6 +250,8 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, if (ret < 0) goto out_free_l1_data; + data->can_wake = of_property_read_bool(dn, "brcm,irq-can-wake"); + for (irq = 0; irq < data->num_parent_irqs; irq++) { ret = bcm7120_l2_intc_init_one(dn, data, irq, valid_mask); if (ret) @@ -274,9 +279,6 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, goto out_free_domain; } - if (of_property_read_bool(dn, "brcm,irq-can-wake")) - data->can_wake = true; - for (idx = 0; idx < data->n_words; idx++) { irq = idx * IRQS_PER_WORD; gc = irq_get_domain_generic_chip(data->domain, irq); From patchwork Thu Jul 9 22:30:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11655207 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D0B8914DD for ; Thu, 9 Jul 2020 22:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B721920786 for ; Thu, 9 Jul 2020 22:31:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cImLMlFI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726893AbgGIWbd (ORCPT ); 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Thu, 09 Jul 2020 15:31:29 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Justin Chen , Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 2/6] irqchip/brcmstb-l2: Set controller as wake-up source Date: Thu, 9 Jul 2020 15:30:12 -0700 Message-Id: <20200709223016.989-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Justin Chen Utilize the Broadcom interrupt controller standard property "brcm,irq-can-wake" to flag whether this particular interrupt controller instance is wake-up capable. Since we do not know what type of parent interrupt controller we are interfaced with, ensure that enable_irq_wake() is called early on. Signed-off-by: Justin Chen Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-brcmstb-l2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 0298ede67e51..157fad184bdc 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -254,6 +254,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np, */ data->gc->wake_enabled = 0xffffffff; ct->chip.irq_set_wake = irq_gc_set_wake; + enable_irq_wake(parent_irq); } pr_info("registered L2 intc (%pOF, parent irq: %d)\n", np, parent_irq); From patchwork Thu Jul 9 22:30:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11655205 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 96AAE618 for ; Thu, 9 Jul 2020 22:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7D34120720 for ; Thu, 9 Jul 2020 22:31:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="i5CR0eis" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726932AbgGIWbg (ORCPT ); Thu, 9 Jul 2020 18:31:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726912AbgGIWbe (ORCPT ); Thu, 9 Jul 2020 18:31:34 -0400 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33D81C08C5CE; Thu, 9 Jul 2020 15:31:34 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id f2so3922657wrp.7; Thu, 09 Jul 2020 15:31:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lvQE+VFsC6LNvwy3huxAyom+Rgt1Ot1U4TqXHE1rJjc=; b=i5CR0eishX3JfFU4E3EM3t0j787D7B4xrjVEfsoiGO+JaZMDT/sD4nYrw5z2aLglou izLavaKD6S/f6y4MHlIzmBvkdGhe3k0K/Sdye+57LmkTl3vAjLY4QUwmhBJR7O1Q5PhK lIzup+y1LnzFzva7Z6HN3PCyI7IQOKsr60f7FWGQeRgwkqnbTLrigBOJOm2iwtZd09W+ FLN38Jwn8gMLZ2FiQzLuZyACvJdLLMzwB9Yi8B2FqAx+UG49/AGZbxFWDqOz8tmkYq8N WnuGgvyb6PbLPnCp7MiBCq5ixAQv7o6g965F9fGcor/DdizRtd15pPrLoJ0MqlvuNC4d PlTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lvQE+VFsC6LNvwy3huxAyom+Rgt1Ot1U4TqXHE1rJjc=; b=Ki0BYNbyab9DtUIOD/I8/IzvzXMGI2l6T6HR8uWs12ZXMdfwcbXbBdQDR/0NiyNlml JDXhSdPd7R/p3zaCZ49hgQRlpu8THKke5JXQdb/yq6C0nnbf/R6IUCiZ0pcpDNM9mzPO /zL5nQMfEVzs4L+Nbud59TE2PcBSmmVtxEeh+SQCsSJ718whU6ToiWkFqLxmbK83gf87 ueWrJVXMJ//b8MQw6ZGs1bQI7kqP0abD3Z0m2cwszDQdPD7L/2jSoJjtRbfnGBzh+/2y ldTOQV9KadioOv0j7nFRrPXAIlK37m1CcNNVKjNeXG7UO3hbcDyQjLtTmhJ+hwN+A+WH EI7g== X-Gm-Message-State: AOAM5337Dqu8r/CNpH4yV+RuBHEWJzuwxc2ctnfvohgE1wYh30v3ofTP y0XrJQCy8/0YsuIXkmluCvVvzHKZ X-Google-Smtp-Source: ABdhPJxOEjVwHyvR5mLFNPeVDv5z2YnAu8R83Tgq4U6L0jXN2pvx9ZpLrCb99I180NTLQdfNLx0ysQ== X-Received: by 2002:a5d:670d:: with SMTP id o13mr62099560wru.307.1594333892724; Thu, 09 Jul 2020 15:31:32 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id m10sm7375267wru.4.2020.07.09.15.31.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 15:31:32 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 3/6] dt-bindings: interrupt-controller: Document Broadcom STB HIF L2 Date: Thu, 9 Jul 2020 15:30:13 -0700 Message-Id: <20200709223016.989-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add documentation for the brcm,hif-spi-l2-intc compatible string to the brcm,l2-intc.txt binding document. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/interrupt-controller/brcm,l2-intc.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt index d514ec060a4a..98602f1d1e91 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt @@ -2,7 +2,9 @@ Broadcom Generic Level 2 Interrupt Controller Required properties: -- compatible: should be "brcm,l2-intc" for latched interrupt controllers +- compatible: should be one of: + "brcm,hif-spi-l2-intc" or + "brcm,l2-intc" for latched interrupt controllers should be "brcm,bcm7271-l2-intc" for level interrupt controllers - reg: specifies the base physical address and size of the registers - interrupt-controller: identifies the node as an interrupt controller From patchwork Thu Jul 9 22:30:14 2020 Content-Type: text/plain; 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Thu, 09 Jul 2020 15:31:35 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id m10sm7375267wru.4.2020.07.09.15.31.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 15:31:34 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Kamal Dasu , Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 4/6] irqchip/brcmstb-l2: Match HIF_SPI_INTR2 compatible Date: Thu, 9 Jul 2020 15:30:14 -0700 Message-Id: <20200709223016.989-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Kamal Dasu The HIF_SPI_INTR2 Level 2 interrupt controller node is defined with the "brcm,hif-spi-l2-intc" compatible string in Device Tree and behaves as an edge triggered standard Broadcom STB L2 interrupt controller. Signed-off-by: Kamal Dasu Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-brcmstb-l2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 157fad184bdc..b10fe5042a2f 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -276,6 +276,8 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); } IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); +IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", + brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, struct device_node *parent) From patchwork Thu Jul 9 22:30:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11655199 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB7EE618 for ; Thu, 9 Jul 2020 22:31:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF08F20786 for ; Thu, 9 Jul 2020 22:31:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UiJS+BDE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727031AbgGIWbk (ORCPT ); Thu, 9 Jul 2020 18:31:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbgGIWbj (ORCPT ); Thu, 9 Jul 2020 18:31:39 -0400 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B392C08C5CE; Thu, 9 Jul 2020 15:31:39 -0700 (PDT) Received: by mail-wr1-x442.google.com with SMTP id o11so3944276wrv.9; Thu, 09 Jul 2020 15:31:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=i21YO/2HZyXZNTbYkhCu9RBrriTl76O4ArhjFidKXBg=; b=UiJS+BDEjt5Aqe3nETuc1pmdz+lzwzHFf5lez6nC+K8xQ7m80WnQu8z/y1e9Jy560p EtH6mNq8Ai8BI4clC/dI1KqklTkbxdlOnzU46aTnJ5cLtyrX/kqgskma+n5lLVVdPT4F 217KitrazPAMtff+jqc6lkd8cJfYopmBDYG0tzuVBu06V5kbbPZPJVyL1Xoq8Rsgt8fW Cbjr6OZNbK0ExHEQfS19bnu6jiUKVo6ZsBHkJ8el3nZgUWuULkLQlV1WUDp1ZhcdIgWm u1FeFuUzHB4NyxNAWSi1jcZ5ECt9EfwSIzddTCfQWJwfpJSUmA1C/nhpqFrft9/MnU4w Svyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=i21YO/2HZyXZNTbYkhCu9RBrriTl76O4ArhjFidKXBg=; b=fPALl81ZX3PRiPQCuG5hE1boczzEBMSdVpgGIvO/O8ktWJDb7M9ma9Gt7xbcOLbThY 8PUTe4tcp98isjR1JR6Vr80IfATxpJO8t10C6e/ipFpe1zT6KMRRclqTqSEp3CcCg1Ry 0ArS/qfuUc02qWNa9Aw8ALGUtx+WJ16t6IPmg3Q6PdUPybOHzVvJU4UUhY7XAD8pcysC kch9HPbcreBvBpdixYe5WNtYWDUVoVs99NtPoxuqhdL/KxfLi1gos7j2l9vsi11G870w bTaHt4stkCZtdDYft3VpljFbk1QvLmZytQR79KkFXajOUz1qobmRMarynUy7OnWnx9EV PTZw== X-Gm-Message-State: AOAM531W8k67IM9AHlD/9+4GilItRlAp1gPvq8hFO/Pu1O+0ae1+75Ry G7edZxpr86r0y9Eyt9LY5WS3WztX X-Google-Smtp-Source: ABdhPJzn17fKsArJKHCbz7Qsf6L6cMtZsu+WBTCg6l3V6F5Mv/yNgDf22xFvimMz+MM44vKkiAzYvA== X-Received: by 2002:a5d:60d0:: with SMTP id x16mr66987742wrt.5.1594333898079; Thu, 09 Jul 2020 15:31:38 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id m10sm7375267wru.4.2020.07.09.15.31.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 15:31:37 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 5/6] dt-bindings: interrupt-controller: Document UPG auxiliary L2 Date: Thu, 9 Jul 2020 15:30:15 -0700 Message-Id: <20200709223016.989-6-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Define the compatible string brcm,upg-aux-aon-l2-intc which is used by the Broadcom STB UPG auxiliary always-on interrupt controller. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/interrupt-controller/brcm,l2-intc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt index 98602f1d1e91..021cf822395c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of: "brcm,hif-spi-l2-intc" or + "brcm,upg-aux-aon-l2-intc" or "brcm,l2-intc" for latched interrupt controllers should be "brcm,bcm7271-l2-intc" for level interrupt controllers - reg: specifies the base physical address and size of the registers From patchwork Thu Jul 9 22:30:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11655201 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79C15739 for ; Thu, 9 Jul 2020 22:31:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 616A42084C for ; Thu, 9 Jul 2020 22:31:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SQSfSuuM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726958AbgGIWbo (ORCPT ); Thu, 9 Jul 2020 18:31:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727058AbgGIWbm (ORCPT ); Thu, 9 Jul 2020 18:31:42 -0400 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26DCBC08C5CE; Thu, 9 Jul 2020 15:31:42 -0700 (PDT) Received: by mail-wm1-x341.google.com with SMTP id o2so3576371wmh.2; Thu, 09 Jul 2020 15:31:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X9gWmqsXdUhwD0HyUl/ux1LMEd24Rft7ZzqjMMlxbUY=; b=SQSfSuuM8twuL89S8ohqlE1svQU17lbRPJyAl5NvB45JztZm07t1GyUzvPfcKoJeH6 K26Po9+HzKl0hCAESOwXSIEq8Y3JFdk0zVFqqx9Hb8At75p3HrcRsSxlMv3btmEPY3lc OGuD/P3saKrP7Ul90jEVKE0IpI0UIQ/XSXBuju7SX/E1IzFm4lrM4/HuZFS3GRvm/Ivr owNj8nxEIAMjZmnFB//kq+CuVc+G5ykcRG9ot47y/kGPvlYc4Bcy77bfNARUVPMahJNA PmFkagL/4FAJKV4El0XZlSLq7NImGrR8fA4Hr851fxfmQp/WsvXxniGVCCyJJpYCpjx6 GvDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X9gWmqsXdUhwD0HyUl/ux1LMEd24Rft7ZzqjMMlxbUY=; b=YKwBSlxHJI/L85KVQeYfbLcVYHKWZJvgjLwpEF5tovhuHMKR1z+S2P2R4r3nf8LsfZ yev9/33DCOSJcbjF0NEgrsoM0N+eMHejXezY1BdH4q13IWhwLzVfPcab028p5kvAqGfq Kc7MskUeUhrqvTakE6EFP7Ch42l2n+88512FMvsL8sZ5YbXCKiP/p6cf1/MmsfURKJqu fWLyLNozRqXGbjwWkUrXqdZdXXIBFPHUUMZWCoQl5L1YpLZiyX0rEFORkPqTC1PsThrd QXTlJ+NfsowxS2Woy3qxXIAgAa3Xx6HGwkWpEMHDDmfKYd7qsKxBpEo63CHglVlFt6yk Z3ag== X-Gm-Message-State: AOAM5309CrmsIaovjEh5pkHzh3qL2UNnXcukruJ+g4RJIcN+ZrERFA5c 3pok0Uq2iYtiWIy3JPSX58XYB2DP X-Google-Smtp-Source: ABdhPJwYOOAzElN12jW2twg2CIIJJmtKgZRtbfjX9DxUtACEx89dUTfhcMHdvvd+5YctS5W3Zv9jSw== X-Received: by 2002:a1c:81c8:: with SMTP id c191mr2006334wmd.23.1594333900692; Thu, 09 Jul 2020 15:31:40 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id m10sm7375267wru.4.2020.07.09.15.31.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 15:31:40 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH 6/6] irqchip/brcmstb-l2: Match UPG_AUX_AON_INTR2 compatible Date: Thu, 9 Jul 2020 15:30:16 -0700 Message-Id: <20200709223016.989-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709223016.989-1-f.fainelli@gmail.com> References: <20200709223016.989-1-f.fainelli@gmail.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The UPG_AUX_AON_INTR2 Level 2 interrupt controller node is defined with the "brcm,upg-aux-aon-l2-intc" compatible string in Device Tree and behaves as an edge triggered standard Broadcom STB L2 interrupt controller. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-brcmstb-l2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index b10fe5042a2f..cdd6a42d4efa 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -278,6 +278,8 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init); +IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc", + brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, struct device_node *parent)