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Mon, 13 Jul 2020 01:01:29 +0000 From: Akshu Agrawal To: akshu.agrawal@amd.com Cc: sboyd@kernel.org, Michael Turquette , Rahul Tanwar , linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/5] clk: x86: Change name from ST to FCH Date: Mon, 13 Jul 2020 06:29:50 +0530 Message-Id: <20200713010001.18976-2-akshu.agrawal@amd.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200713010001.18976-1-akshu.agrawal@amd.com> References: <20200713010001.18976-1-akshu.agrawal@amd.com> X-ClientProxiedBy: MAXPR0101CA0056.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::18) To MWHPR12MB1599.namprd12.prod.outlook.com (2603:10b6:301:10::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from local.mshome.net (122.167.38.75) by MAXPR0101CA0056.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.20 via Frontend Transport; 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We can reuse the same clk driver for other platforms. Hence, changing name from ST(SoC) to FCH(IP) Signed-off-by: Akshu Agrawal --- drivers/clk/x86/Makefile | 2 +- drivers/clk/x86/{clk-st.c => clk-fch.c} | 26 ++++++++++++------------- 2 files changed, 14 insertions(+), 14 deletions(-) rename drivers/clk/x86/{clk-st.c => clk-fch.c} (73%) diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile index 7c774ea7ddeb..18564efdc651 100644 --- a/drivers/clk/x86/Makefile +++ b/drivers/clk/x86/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_PMC_ATOM) += clk-pmc-atom.o -obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-st.o +obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-fch.o clk-x86-lpss-objs := clk-lpt.o obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o obj-$(CONFIG_CLK_LGM_CGU) += clk-cgu.o clk-cgu-pll.o clk-lgm.o diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-fch.c similarity index 73% rename from drivers/clk/x86/clk-st.c rename to drivers/clk/x86/clk-fch.c index 25d4b97aff9b..b252f0cf0628 100644 --- a/drivers/clk/x86/clk-st.c +++ b/drivers/clk/x86/clk-fch.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include /* Clock Driving Strength 2 register */ @@ -29,12 +29,12 @@ static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" }; static struct clk_hw *hws[ST_MAX_CLKS]; -static int st_clk_probe(struct platform_device *pdev) +static int fch_clk_probe(struct platform_device *pdev) { - struct st_clk_data *st_data; + struct fch_clk_data *fch_data; - st_data = dev_get_platdata(&pdev->dev); - if (!st_data || !st_data->base) + fch_data = dev_get_platdata(&pdev->dev); + if (!fch_data || !fch_data->base) return -EINVAL; hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, @@ -44,12 +44,12 @@ static int st_clk_probe(struct platform_device *pdev) hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux", clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents), - 0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL); + 0, fch_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL); clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk); hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux", - 0, st_data->base + MISCCLKCNTL1, OSCCLKENB, + 0, fch_data->base + MISCCLKCNTL1, OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL); devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], "oscout1", @@ -58,7 +58,7 @@ static int st_clk_probe(struct platform_device *pdev) return 0; } -static int st_clk_remove(struct platform_device *pdev) +static int fch_clk_remove(struct platform_device *pdev) { int i; @@ -67,12 +67,12 @@ static int st_clk_remove(struct platform_device *pdev) return 0; } -static struct platform_driver st_clk_driver = { +static struct platform_driver fch_clk_driver = { .driver = { - .name = "clk-st", + .name = "clk-fch", .suppress_bind_attrs = true, }, - .probe = st_clk_probe, - .remove = st_clk_remove, + .probe = fch_clk_probe, + .remove = fch_clk_remove, }; -builtin_platform_driver(st_clk_driver); +builtin_platform_driver(fch_clk_driver); From patchwork Mon Jul 13 00:59:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akshu Agrawal X-Patchwork-Id: 11658511 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03D83722 for ; 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dkim=none (message not signed) header.d=none;amd.com; dmarc=none action=none header.from=amd.com; Received: from MWHPR12MB1599.namprd12.prod.outlook.com (2603:10b6:301:10::12) by MWHPR12MB1600.namprd12.prod.outlook.com (2603:10b6:301:f::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.22; Mon, 13 Jul 2020 01:02:19 +0000 Received: from MWHPR12MB1599.namprd12.prod.outlook.com ([fe80::25b9:83b0:4b17:2c63]) by MWHPR12MB1599.namprd12.prod.outlook.com ([fe80::25b9:83b0:4b17:2c63%12]) with mapi id 15.20.3174.025; Mon, 13 Jul 2020 01:02:18 +0000 From: Akshu Agrawal To: akshu.agrawal@amd.com Cc: sboyd@kernel.org, Michael Turquette , linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/5] clk: x86: Support RV architecture Date: Mon, 13 Jul 2020 06:29:52 +0530 Message-Id: <20200713010001.18976-4-akshu.agrawal@amd.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200713010001.18976-1-akshu.agrawal@amd.com> References: <20200713010001.18976-1-akshu.agrawal@amd.com> X-ClientProxiedBy: MAXPR0101CA0056.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::18) To MWHPR12MB1599.namprd12.prod.outlook.com (2603:10b6:301:10::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from local.mshome.net (122.167.38.75) by MAXPR0101CA0056.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: o2rtTkqxj44QJBPPxf0dGapEfhMLZHH1p+8nsMbSxr4MSZysFFeblhcxIYZSYrQCVBDZwb/qGIvakzyRtzp1eR0E8i0Y2i+Zg+QyZz6cqgYvjsPph7qoKd3YtjG9+AoAjVqLkbRiAZFhX63Gbg2rpqBERvGsf7LgwG14JobtPfcwqQ6KEGdZ3G6mc/eiEfAAqNbyBAT8B0/QxaOvryebIVGwN0UynTBs7EKCsqRoAoA54ZtLvb6yIhcXqTvOZhvXhF83SXQZRi+88dguw+kW/quYYxJ0qzUsHECvkpVdHuZFGPicwen8WC2WMG1yYPp2kqTbiaYTgdTylePml7wjaOjFwUsB7ffqC0w6F3TpGPGoJG1I3n20iiuMJ21iKxejynUkQx7B5yNQydrMvvCg/+VChX08xvGoKUyMzFAtS+Wx2W3adFkRLDKflfEKuzaiNAb2IkLxvPb0ejd0y8s4oAEucFgGkzkWaDRmGuDP5lg= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8bd550f6-776c-46a1-40d1-08d826c863e7 X-MS-Exchange-CrossTenant-AuthSource: MWHPR12MB1599.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jul 2020 01:02:18.8437 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ecIDYDnpOXfFfOgj6B76hJRl5YTZ65SxgONBYbwgbBicYHYiWxVX75sAlxh9nq8nL3Ma6Su8f/2HY9Id8f6PgQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1600 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org There is minor difference between previous family of SoC and the current one. Which is the there is only 48Mh fixed clk. There is no mux and no option to select another freq as there in previous. Signed-off-by: Akshu Agrawal --- drivers/clk/x86/clk-fch.c | 55 ++++++++++++++++++++++++++++----------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/drivers/clk/x86/clk-fch.c b/drivers/clk/x86/clk-fch.c index b252f0cf0628..a8aac71a3b65 100644 --- a/drivers/clk/x86/clk-fch.c +++ b/drivers/clk/x86/clk-fch.c @@ -26,6 +26,10 @@ #define ST_CLK_GATE 3 #define ST_MAX_CLKS 4 +#define RV_CLK_48M 0 +#define RV_CLK_GATE 1 +#define RV_MAX_CLKS 2 + static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" }; static struct clk_hw *hws[ST_MAX_CLKS]; @@ -37,23 +41,36 @@ static int fch_clk_probe(struct platform_device *pdev) if (!fch_data || !fch_data->base) return -EINVAL; - hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, - 48000000); - hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0, - 25000000); + if (!fch_data->is_rv) { + hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", + NULL, 0, 48000000); + hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", + NULL, 0, 25000000); + + hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux", + clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents), + 0, fch_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, + NULL); + + clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk); - hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux", - clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents), - 0, fch_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL); + hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", + "oscout1_mux", 0, fch_data->base + MISCCLKCNTL1, + OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL); - clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk); + devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], + "oscout1", NULL); + } else { + hws[RV_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", + NULL, 0, 48000000); - hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux", - 0, fch_data->base + MISCCLKCNTL1, OSCCLKENB, - CLK_GATE_SET_TO_DISABLE, NULL); + hws[RV_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", + "clk48MHz", 0, fch_data->base + MISCCLKCNTL1, + OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL); - devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], "oscout1", - NULL); + devm_clk_hw_register_clkdev(&pdev->dev, hws[RV_CLK_GATE], + "oscout1", NULL); + } return 0; } @@ -61,9 +78,17 @@ static int fch_clk_probe(struct platform_device *pdev) static int fch_clk_remove(struct platform_device *pdev) { int i; + struct fch_clk_data *fch_data; + + fch_data = dev_get_platdata(&pdev->dev); - for (i = 0; i < ST_MAX_CLKS; i++) - clk_hw_unregister(hws[i]); + if (!fch_data->is_rv) { + for (i = 0; i < ST_MAX_CLKS; i++) + clk_hw_unregister(hws[i]); + } else { + for (i = 0; i < RV_MAX_CLKS; i++) + clk_hw_unregister(hws[i]); + } return 0; }