From patchwork Thu Jul 16 15:13:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud Ferraris X-Patchwork-Id: 11667777 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D659860D for ; Thu, 16 Jul 2020 15:16:07 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6B7E72063A for ; Thu, 16 Jul 2020 15:16:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="bLMlywjq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6B7E72063A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 01E4E1661; Thu, 16 Jul 2020 17:15:20 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 01E4E1661 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1594912566; bh=Gn51r1XxHa8bpgRq9ol2CsixNUIj9qTNWpj0NKzxYVI=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=bLMlywjqYfWJ9NKCoblNUDYPX1fdK8Ee1M4GEm9XqRHEQotFJLDPgtMp05aWqb2Cz IfQ4mcj0/TraPQ/TPrf8CByEkoMK6xJZbS9zBcs6/TyX3nV/v5TBeAVqDAMh5R17nm ZwHlGa8H/5dtZcFXnfUOt5S4X9EO3DbaOyBjQ+cs= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 41DC4F8020C; Thu, 16 Jul 2020 17:15:17 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id F3D67F8026A; Thu, 16 Jul 2020 17:15:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on alsa1.perex.cz X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=SPF_HELO_PASS,SPF_PASS, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 1D48BF80110 for ; Thu, 16 Jul 2020 17:15:09 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 1D48BF80110 Received: from xps.home (unknown [IPv6:2a01:e35:2fb5:1510:95f7:ce7f:fb76:c54a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: aferraris) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id AB2852A5297; Thu, 16 Jul 2020 16:15:08 +0100 (BST) From: Arnaud Ferraris To: alsa-devel@alsa-project.org Subject: [PATCH v2 1/2] ASoC: fsl_asrc: make sure the input and output clocks are different Date: Thu, 16 Jul 2020 17:13:52 +0200 Message-Id: <20200716151352.193451-2-arnaud.ferraris@collabora.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200716151352.193451-1-arnaud.ferraris@collabora.com> References: <20200716145201.186270-1-arnaud.ferraris@collabora.com> <20200716151352.193451-1-arnaud.ferraris@collabora.com> MIME-Version: 1.0 Cc: Arnaud Ferraris , Timur Tabi , Xiubo Li , Fabio Estevam , Liam Girdwood , linux-kernel@vger.kernel.org, Nicolin Chen , Mark Brown , kernel@collabora.com, Shengjiu Wang X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The current clock selection algorithm might select the same clock for both input and output. This can happen when, for instance, the output sample rate is a multiple of the input rate. This patch makes sure it always selects distinct input and output clocks. Signed-off-by: Arnaud Ferraris --- sound/soc/fsl/fsl_asrc.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 02c81d2e34ad..6d43cab6c885 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -608,8 +608,8 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv, { struct fsl_asrc_pair_priv *pair_priv = pair->private; struct asrc_config *config = pair_priv->config; - int rate[2], select_clk[2]; /* Array size 2 means IN and OUT */ - int clk_rate, clk_index; + int rate[2], select_clk[2], clk_index[2]; /* Array size 2 means IN and OUT */ + int clk_rate; int i = 0, j = 0; rate[IN] = in_rate; @@ -618,11 +618,12 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv, /* Select proper clock source for internal ratio mode */ for (j = 0; j < 2; j++) { for (i = 0; i < ASRC_CLK_MAP_LEN; i++) { - clk_index = asrc_priv->clk_map[j][i]; - clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index]); + clk_index[j] = asrc_priv->clk_map[j][i]; + clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index[j]]); /* Only match a perfect clock source with no remainder */ if (clk_rate != 0 && (clk_rate / rate[j]) <= 1024 && - (clk_rate % rate[j]) == 0) + (clk_rate % rate[j]) == 0 && + (j == 0 || clk_index[j] != clk_index[j-1])) break; } From patchwork Thu Jul 16 15:13:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud Ferraris X-Patchwork-Id: 11667781 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C28260D for ; Thu, 16 Jul 2020 15:16:56 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E56442063A for ; Thu, 16 Jul 2020 15:16:55 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Thu, 16 Jul 2020 16:15:19 +0100 (BST) From: Arnaud Ferraris To: alsa-devel@alsa-project.org Subject: [PATCH v2 2/2] ASoC: fsl_asrc: always use internal ratio Date: Thu, 16 Jul 2020 17:13:54 +0200 Message-Id: <20200716151352.193451-3-arnaud.ferraris@collabora.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200716151352.193451-1-arnaud.ferraris@collabora.com> References: <20200716145201.186270-1-arnaud.ferraris@collabora.com> <20200716151352.193451-1-arnaud.ferraris@collabora.com> MIME-Version: 1.0 Cc: Arnaud Ferraris , Timur Tabi , Xiubo Li , Fabio Estevam , Liam Girdwood , linux-kernel@vger.kernel.org, Nicolin Chen , Mark Brown , kernel@collabora.com, Shengjiu Wang X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Even though the current driver calculates the dividers to be used depending on the clocks and sample rates, enabling the internal ratio can lead to noticeable improvements in the audio quality, based on my testing. As stated in the documentation, "When USRx=1 and IDRx=0, ASRC internal measured ratio will be used", so setting this bit even when not in "Ideal Ratio" mode still makes sense. Signed-off-by: Arnaud Ferraris --- sound/soc/fsl/fsl_asrc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 6d43cab6c885..0b79a02d0d76 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -465,7 +465,7 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ATSi_MASK(index), ASRCTR_ATS(index)); regmap_update_bits(asrc->regmap, REG_ASRCTR, - ASRCTR_USRi_MASK(index), 0); + ASRCTR_USRi_MASK(index), ASRCTR_USR(index)); /* Set the input and output clock sources */ regmap_update_bits(asrc->regmap, REG_ASRCSR, @@ -507,8 +507,7 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) /* Enable Ideal Ratio mode */ regmap_update_bits(asrc->regmap, REG_ASRCTR, - ASRCTR_IDRi_MASK(index) | ASRCTR_USRi_MASK(index), - ASRCTR_IDR(index) | ASRCTR_USR(index)); + ASRCTR_IDRi_MASK(index), ASRCTR_IDR(index); fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc);