From patchwork Thu Jul 16 21:10:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gustavo A. R. Silva" X-Patchwork-Id: 11668463 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D58E2161F for ; Thu, 16 Jul 2020 21:05:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B7B19207E8 for ; Thu, 16 Jul 2020 21:05:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1594933532; bh=iW7BjEZ60Foe5MOsebfnRJHNZwW9KgJqpGOyAb7JsGU=; h=Date:From:To:Cc:Subject:List-ID:From; b=GYX7P1SQketR6TRPqpDRtbaC0uVm9reDeZed2h8otYkiZdEobwBoP1IcfvRA/smzX oweP81YXVdBwgEQj4ecJnVA3HAo+CJuc/PH9uB9TGB7L8faZHsQrr10qb5+Qkqk17o RgxYYPW9KSXb8DSHIHaNBtcHDt46B8oOVygO/WIs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725933AbgGPVFa (ORCPT ); Thu, 16 Jul 2020 17:05:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:49222 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725926AbgGPVFa (ORCPT ); Thu, 16 Jul 2020 17:05:30 -0400 Received: from embeddedor (unknown [201.162.240.161]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BE828207DD; Thu, 16 Jul 2020 21:05:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1594933529; bh=iW7BjEZ60Foe5MOsebfnRJHNZwW9KgJqpGOyAb7JsGU=; h=Date:From:To:Cc:Subject:From; b=Xdb4jTIC972OWicAcjGAjt8XjGzG33BuaaDDh1fXUuNHRTg3+ov4YPlKacoLY8xVg IhUxhZy0U0c3w9Ff34IlHqy4/D0n9cU6ismqF9BuMYIscA9+I+4ndPiK6U257lHkyB IAOn0daYQwoZwyOATyV+mTQdHL2e1y1H6RIib0Xk= Date: Thu, 16 Jul 2020 16:10:52 -0500 From: "Gustavo A. R. Silva" To: Richard Zhu , Lucas Stach , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "Gustavo A. R. Silva" Subject: [PATCH][next] PCI: imx6: Use fallthrough pseudo-keyword Message-ID: <20200716211052.GA16893@embeddedor> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva --- drivers/pci/controller/dwc/pci-imx6.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 4e5c379ae418..1119ded593d0 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -439,7 +439,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); break; - case IMX6QP: /* FALLTHROUGH */ + case IMX6QP: case IMX6Q: /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -642,7 +642,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_2); - /* FALLTHROUGH */ + fallthrough; default: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); @@ -1107,7 +1107,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) dev_err(dev, "pcie_aux clock source missing or invalid\n"); return PTR_ERR(imx6_pcie->pcie_aux); } - /* fall through */ + fallthrough; case IMX7D: if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) imx6_pcie->controller_id = 1;