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spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Andy Gross , Bjorn Andersson Subject: [PATCH] arm64: dts: qcom: sdm845: Support ETMv4 power management Date: Tue, 21 Jul 2020 12:43:43 +0530 Message-Id: <20200721071343.2898-1-saiprakash.ranjan@codeaurora.org> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_031404_355633_859C0330 X-CRM114-Status: GOOD ( 10.80 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [69.72.43.7 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [69.72.43.7 listed in wl.mailspike.net] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sai Prakash Ranjan , Mathieu Poirier , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mike Leach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add "arm,coresight-loses-context-with-cpu" property to coresight ETM nodes to avoid failure of trace session because of losing context on entering deep idle states. Signed-off-by: Sai Prakash Ranjan Reviewed-by: Mathieu Poirier --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e506793407d8..0b5f063dcaea 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3016,6 +3016,7 @@ etm@7040000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3035,6 +3036,7 @@ etm@7140000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3054,6 +3056,7 @@ etm@7240000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3073,6 +3076,7 @@ etm@7340000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3092,6 +3096,7 @@ etm@7440000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3111,6 +3116,7 @@ etm@7540000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3130,6 +3136,7 @@ etm@7640000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3149,6 +3156,7 @@ etm@7740000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port {