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[88.29.77.103]) by smtp.gmail.com with ESMTPSA id c194sm3740003wme.8.2020.07.21.07.03.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2020 07:03:49 -0700 (PDT) From: Drew Fustini To: Andy Shevchenko , Tony Lindgren , Linus Walleij , linux-omap@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Jason Kridner , Robert Nelson Cc: Drew Fustini Subject: [PATCH v3] pinctrl: core: print gpio in pins debugfs file Date: Tue, 21 Jul 2020 16:02:34 +0200 Message-Id: <20200721140233.2063475-1-drew@beagleboard.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org If there is a gpio range mapping for the pin, then print out the gpio chip and line index for the pin in the debugfs 'pins' file with the format: "[gpiochip-label]:line-[index] " For example, here is a section of 'pins' the PocketBeagle (AM3358): /sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single/pins pin 25 (PIN25) gpio-32-63:line-25 44e10864 00000037 pinctrl-single pin 26 (PIN26) gpio-32-63:line-26 44e10868 00000037 pinctrl-single pin 27 (PIN27) gpio-32-63:line-27 44e1086c 00000037 pinctrl-single pin 28 (PIN28) NA 44e10870 00000036 pinctrl-single pin 29 (PIN29) NA 44e10874 00000006 pinctrl-single pin 30 (PIN30) gpio-32-63:line-28 44e10878 00000027 pinctrl-single pin 31 (PIN31) gpio-32-63:line-29 44e1087c 00000037 pinctrl-single pin 32 (PIN32) gpio-32-63:line-30 44e10880 00000037 pinctrl-single pin 33 (PIN33) gpio-32-63:line-31 44e10884 00000037 pinctrl-single pin 34 (PIN34) gpio-64-95:line-0 44e10888 00000037 pinctrl-single pin 35 (PIN35) gpio-64-95:line-1 44e1088c 00000037 pinctrl-single Suggested-by: Andy Shevchenko Suggested-by: Tony Lindgren Signed-off-by: Drew Fustini v3 changes: - gpio column is now gpiochip label and line index v2 changes: - print 'NA' if pin does not have a GPIO number - change gpio_num from unsigned to unsigned int per checkpatch --- drivers/pinctrl/core.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 821242bb4b16..a23dc264cae7 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -27,6 +27,7 @@ #include #ifdef CONFIG_GPIOLIB +#include "../gpio/gpiolib.h" #include #endif @@ -1601,6 +1602,9 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) struct pinctrl_dev *pctldev = s->private; const struct pinctrl_ops *ops = pctldev->desc->pctlops; unsigned i, pin; + struct pinctrl_gpio_range *range; + unsigned int gpio_num; + struct gpio_chip *chip; seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); @@ -1618,6 +1622,23 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) seq_printf(s, "pin %d (%s) ", pin, desc->name); +#ifdef CONFIG_GPIOLIB + gpio_num = 0; + list_for_each_entry(range, &pctldev->gpio_ranges, node) { + if ((pin >= range->pin_base) && + (pin < (range->pin_base + range->npins))) { + gpio_num = range->base + (pin - range->pin_base); + break; + } + } + chip = gpio_to_chip(gpio_num); + if (chip && chip->gpiodev && chip->gpiodev->base) + seq_printf(s, "%s:line-%u ", chip->label, + gpio_num - chip->gpiodev->base); + else + seq_puts(s, "NA "); +#endif + /* Driver-specific info per pin */ if (ops->pin_dbg_show) ops->pin_dbg_show(pctldev, s, pin);