From patchwork Mon Jul 27 20:51:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687687 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3515F1746 for ; Mon, 27 Jul 2020 21:35:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 131B920729 for ; Mon, 27 Jul 2020 21:35:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="XxfbYJlw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 131B920729 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 347276E06D; Mon, 27 Jul 2020 21:35:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4EAA89916; Mon, 27 Jul 2020 20:50:29 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:49:45 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:29 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:25 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:07 -0500 Message-ID: <20200727205112.27698-2-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595882985; bh=DsoKqreQfzZURwMK9ZuJ+aIV8L91hqK5a/R/nG9qDc8=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=XxfbYJlwhaLGrbeC8OnkvZxKPWBimJmSAvWBtxNQdzhPsyUj9I1uEZYtkdgWa0q4f EUqsSvb77DCUeXKB1UNDoiIwEt2pWoINXhfkDKugJi/3FFNCq6GC1iesI6k/m81vBs iMxWW6A/qUdeMv5qWY6PEWe/ZCZ9OTFUsyCY59guS56DMGxrXxklvSfoAEsDSjkLBS JHsFgI2afC1+xVUCeqr8gkkG+ux9qPWsfc3SJMyI17seooWzjuxDiS2/4is51WKm2e x68Mo4wDUiqE4nIHx05UpUgbKtAduIx0v6kwSyvXz+wjmzfqPOUb792m1qPX6H/eUL /uV8X7yWMJ72Q== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 1/6] vga-switcheroo: add new "immediate" switch event type X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" vga-switcheroo supports the following types of mux switch events: * standard: checks the clients' can_switch() callbacks and switches the mux if the client drivers report that they are prepared for a switch. Also uses client and handler callbacks to manage power on the GPUs and reprobe display outputs. * deferred: registers the intent to perform a mux switch and defers it until the client drivers no longer have any active modesetting clients. Performs the equivalent of a standard switch when clients are ready. * mux-only: switches the mux immediately without testing can_switch first and without calling any of the client or handler callbacks for power management and reprobing. In order to support additional use cases involving dynamic switching of display muxes, add a new type of "immediate" switch event which skips the can_switch test and power management hooks, but still calls the reprobe hook. This switch event type uses 'I' as a prefix for its commands, similar to the existing 'D' pefix for the deferred commands and 'M' for the mux-only commands. Signed-off-by: Daniel Dadap --- drivers/gpu/vga/vga_switcheroo.c | 86 +++++++++++++++++++++----------- 1 file changed, 58 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/vga/vga_switcheroo.c b/drivers/gpu/vga/vga_switcheroo.c index 087304b1a5d7..cf3c7024dafa 100644 --- a/drivers/gpu/vga/vga_switcheroo.c +++ b/drivers/gpu/vga/vga_switcheroo.c @@ -631,16 +631,23 @@ EXPORT_SYMBOL(vga_switcheroo_unlock_ddc); * * DDIS: Delayed switch to the discrete graphics device. * * MIGD: Mux-only switch to the integrated graphics device. * Does not remap console or change the power state of either gpu. + * Does not call into any client-supplied callbacks, e.g. reprobe. * If the integrated GPU is currently off, the screen will turn black. * If it is on, the screen will show whatever happens to be in VRAM. * Either way, the user has to blindly enter the command to switch back. * * MDIS: Mux-only switch to the discrete graphics device. + * * IIGD: Immediate switch to the integrated graphics device. + * Does not test for active user space processes utilizing the device + * files of the GPU or audio device. Does not change the power state of + * either gpu. The console is remapped and client-provided callbacks + * such as reprobe are called. + * * IDIS: Immediate switch to the discrete graphics device. * * For GPUs whose power state is controlled by the driver's runtime pm, * the ON and OFF commands are a no-op (see next section). * - * For muxless machines, the IGD/DIS, DIGD/DDIS and MIGD/MDIS commands - * should not be used. + * For muxless machines, the IGD/DIS, DIGD/DDIS, MIGD/MDIS and IIGD/IDIS + * commands should not be used. */ static int vga_switcheroo_show(struct seq_file *m, void *v) @@ -704,7 +711,8 @@ static void set_audio_state(enum vga_switcheroo_client_id id, } /* stage one happens before delay */ -static int vga_switchto_stage1(struct vga_switcheroo_client *new_client) +static int vga_switchto_stage1(struct vga_switcheroo_client *new_client, + bool power_control) { struct vga_switcheroo_client *active; @@ -712,7 +720,8 @@ static int vga_switchto_stage1(struct vga_switcheroo_client *new_client) if (!active) return 0; - if (vga_switcheroo_pwr_state(new_client) == VGA_SWITCHEROO_OFF) + if (power_control && + vga_switcheroo_pwr_state(new_client) == VGA_SWITCHEROO_OFF) vga_switchon(new_client); vga_set_default_device(new_client->pdev); @@ -720,7 +729,8 @@ static int vga_switchto_stage1(struct vga_switcheroo_client *new_client) } /* post delay */ -static int vga_switchto_stage2(struct vga_switcheroo_client *new_client) +static int vga_switchto_stage2(struct vga_switcheroo_client *new_client, + bool power_control) { int ret; struct vga_switcheroo_client *active; @@ -747,7 +757,8 @@ static int vga_switchto_stage2(struct vga_switcheroo_client *new_client) if (new_client->ops->reprobe) new_client->ops->reprobe(new_client->pdev); - if (vga_switcheroo_pwr_state(active) == VGA_SWITCHEROO_ON) + if (power_control && + vga_switcheroo_pwr_state(active) == VGA_SWITCHEROO_ON) vga_switchoff(active); /* let HDA controller autoresume if GPU uses driver power control */ @@ -779,6 +790,7 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf, int ret; bool delay = false, can_switch; bool just_mux = false; + bool immediate_switch = false; enum vga_switcheroo_client_id client_id = VGA_SWITCHEROO_UNKNOWN_ID; struct vga_switcheroo_client *client = NULL; @@ -822,30 +834,48 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf, goto out; } - /* request a delayed switch - test can we switch now */ - if (strncmp(usercmd, "DIGD", 4) == 0) { - client_id = VGA_SWITCHEROO_IGD; - delay = true; - } - - if (strncmp(usercmd, "DDIS", 4) == 0) { - client_id = VGA_SWITCHEROO_DIS; - delay = true; - } + /* normal switch request */ if (strncmp(usercmd, "IGD", 3) == 0) client_id = VGA_SWITCHEROO_IGD; if (strncmp(usercmd, "DIS", 3) == 0) client_id = VGA_SWITCHEROO_DIS; - if (strncmp(usercmd, "MIGD", 4) == 0) { - just_mux = true; - client_id = VGA_SWITCHEROO_IGD; - } - if (strncmp(usercmd, "MDIS", 4) == 0) { - just_mux = true; - client_id = VGA_SWITCHEROO_DIS; + if (client_id == VGA_SWITCHEROO_UNKNOWN_ID) { + switch (usercmd[0]) { + case 'D': + /* + * request a delayed switch - + * test can we switch now + */ + delay = true; + break; + case 'I': + /* + * switch immediately - + * ignore can switch test; + * communicate switch to clients + */ + immediate_switch = true; + break; + case 'M': + /* + * switch immediately - + * ignore can switch test; + * do not communicate switch to clients + */ + just_mux = true; + break; + default: + goto out; + } + + if (strncmp(usercmd + 1, "IGD", 3) == 0) + client_id = VGA_SWITCHEROO_IGD; + + if (strncmp(usercmd + 1, "DIS", 3) == 0) + client_id = VGA_SWITCHEROO_DIS; } if (client_id == VGA_SWITCHEROO_UNKNOWN_ID) @@ -867,17 +897,17 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf, goto out; /* okay we want a switch - test if devices are willing to switch */ - can_switch = check_can_switch(); + can_switch = immediate_switch || check_can_switch(); if (can_switch == false && delay == false) goto out; if (can_switch) { - ret = vga_switchto_stage1(client); + ret = vga_switchto_stage1(client, !immediate_switch); if (ret) pr_err("switching failed stage 1 %d\n", ret); - ret = vga_switchto_stage2(client); + ret = vga_switchto_stage2(client, !immediate_switch); if (ret) pr_err("switching failed stage 2 %d\n", ret); @@ -886,7 +916,7 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf, vgasr_priv.delayed_switch_active = true; vgasr_priv.delayed_client_id = client_id; - ret = vga_switchto_stage1(client); + ret = vga_switchto_stage1(client, !immediate_switch); if (ret) pr_err("delayed switching stage 1 failed %d\n", ret); } @@ -951,7 +981,7 @@ int vga_switcheroo_process_delayed_switch(void) if (!client || !check_can_switch()) goto err; - ret = vga_switchto_stage2(client); + ret = vga_switchto_stage2(client, true); if (ret) pr_err("delayed switching failed stage 2 %d\n", ret); From patchwork Mon Jul 27 20:51:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687683 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ABA8E175A for ; Mon, 27 Jul 2020 21:35:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8999D20729 for ; Mon, 27 Jul 2020 21:35:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="HVWH3zsb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8999D20729 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B98BD6E063; Mon, 27 Jul 2020 21:35:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B5D489B68; Mon, 27 Jul 2020 20:50:29 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:49:45 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:29 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:26 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:08 -0500 Message-ID: <20200727205112.27698-3-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595882985; bh=esEWuiyg3gYbIlV4ja+fxXb6VyrVF1oX1/jmfBsEyZg=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=HVWH3zsbbBul1yuWqpwt8UO5v9wThEaIoi5sr3W4rxyL9P2uZhMiG+IjgQSWoBdaX fUP4RS9as5/VMah5kEdd+eGCVSsJkAaqJQVh8PhF5Vj0kMOKo7cMhH6+i3AAgtlD90 efe6lxibl4PMinr1U1qBgn57bfvd55lVrtyCoYb8porgwKBRpyEhgjPqtcffDLzf8g y3F7VQX+Ko2o1c/XdZyRxMsLnBYkxCXHUy6dLE1mr2aLXlrf1apMhwjsieAMdTegdJ 1mzoIp9SIwyNqp99lJ3aeY1BeBogyp7bDG07P/cCdQmFllLdbTUqT9tGYk26IJcOzZ Yedk8JU6yFtkQ== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 2/6] vga-switcheroo: Add a way to test for the active client X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" vga-switcheroo clients may wish to know whether they are currently active, i.e., whether the mux is currently switched to the client in question. Add an in-kernel API to test whether a vga-switcheroo client, as identified by PCI device, is actively switched. Signed-off-by: Daniel Dadap --- drivers/gpu/vga/vga_switcheroo.c | 38 +++++++++++++++++++++++++++++++- include/linux/vga_switcheroo.h | 2 ++ 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/vga/vga_switcheroo.c b/drivers/gpu/vga/vga_switcheroo.c index cf3c7024dafa..a4fc78c4bf4f 100644 --- a/drivers/gpu/vga/vga_switcheroo.c +++ b/drivers/gpu/vga/vga_switcheroo.c @@ -99,7 +99,13 @@ * @id: client identifier. Determining the id requires the handler, * so gpus are initially assigned VGA_SWITCHEROO_UNKNOWN_ID * and later given their true id in vga_switcheroo_enable() - * @active: whether the outputs are currently switched to this client + * @active: whether the client is currently active: this is unset for the + * currently active client before preparing for a mux switch, and set + * for the newly active client after completing all post-switch actions. + * @switched: whether the outputs are physically switched to the client: + * this is unset for the currently switched client immediately before + * switching the mux, and set for the newly switched client immediately + * after switching the mux. * @driver_power_control: whether power state is controlled by the driver's * runtime pm. If true, writing ON and OFF to the vga_switcheroo debugfs * interface is a no-op so as not to interfere with runtime pm @@ -117,6 +123,7 @@ struct vga_switcheroo_client { const struct vga_switcheroo_client_ops *ops; enum vga_switcheroo_client_id id; bool active; + bool switched; bool driver_power_control; struct list_head list; struct pci_dev *vga_dev; @@ -306,6 +313,7 @@ static int register_client(struct pci_dev *pdev, client->ops = ops; client->id = id; client->active = active; + client->switched = active; client->driver_power_control = driver_power_control; client->vga_dev = vga_dev; @@ -748,11 +756,13 @@ static int vga_switchto_stage2(struct vga_switcheroo_client *new_client, if (new_client->fb_info) fbcon_remap_all(new_client->fb_info); + active->switched = false; mutex_lock(&vgasr_priv.mux_hw_lock); ret = vgasr_priv.handler->switchto(new_client->id); mutex_unlock(&vgasr_priv.mux_hw_lock); if (ret) return ret; + new_client->switched = true; if (new_client->ops->reprobe) new_client->ops->reprobe(new_client->pdev); @@ -1111,3 +1121,29 @@ void vga_switcheroo_fini_domain_pm_ops(struct device *dev) dev_pm_domain_set(dev, NULL); } EXPORT_SYMBOL(vga_switcheroo_fini_domain_pm_ops); + +/** + * vga_switcheroo_is_client_active() - test if a device is the active client + * @pdev: vga client device + * + * Check whether the mux is switched to the switcheroo client associated with + * the given PCI device. Assumes that mux is always switched to the device in + * question when switcheroo is inactive, and that the mux is switched away if + * no matching client is registered. + */ +bool vga_switcheroo_is_client_active(struct pci_dev *pdev) +{ + if (vgasr_priv.active) { + struct vga_switcheroo_client *client; + + client = find_client_from_pci(&vgasr_priv.clients, pdev); + + if (client) + return client->switched; + else + return false; + } else { + return true; + } +} +EXPORT_SYMBOL(vga_switcheroo_is_client_active); diff --git a/include/linux/vga_switcheroo.h b/include/linux/vga_switcheroo.h index 7e6ac0114d55..63e6d6e5786e 100644 --- a/include/linux/vga_switcheroo.h +++ b/include/linux/vga_switcheroo.h @@ -173,6 +173,7 @@ enum vga_switcheroo_state vga_switcheroo_get_client_state(struct pci_dev *dev); int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain); void vga_switcheroo_fini_domain_pm_ops(struct device *dev); +bool vga_switcheroo_is_client_active(struct pci_dev *pdev); #else static inline void vga_switcheroo_unregister_client(struct pci_dev *dev) {} @@ -194,6 +195,7 @@ static inline enum vga_switcheroo_state vga_switcheroo_get_client_state(struct p static inline int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain) { return -EINVAL; } static inline void vga_switcheroo_fini_domain_pm_ops(struct device *dev) {} +static inline bool vga_switcheroo_is_client_active(struct pci_dev *pdev) { return true; } #endif #endif /* _LINUX_VGA_SWITCHEROO_H_ */ From patchwork Mon Jul 27 20:51:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687693 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79F8B175A for ; Mon, 27 Jul 2020 21:35:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5875720729 for ; Mon, 27 Jul 2020 21:35:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="g8m+r6yY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5875720729 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A385E6E07D; Mon, 27 Jul 2020 21:35:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id A7CCE89E9B; Mon, 27 Jul 2020 20:50:29 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:49:45 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:29 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:27 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:09 -0500 Message-ID: <20200727205112.27698-4-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595882985; bh=ZRPljo5KYD8GIXijaOxzLgDlZ6v0DgNHM3aEhp9RDyk=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=g8m+r6yYuMlQ/dbluXcm2xneAORRa4LsAvxIKE+ISfWqAkPU/7BeucW9oSI5pFDws AUeMc94cSEiiR7q7m+2UsXY46wsayP1veszeL6sQ2y3kEZm2j1jLikHar6EqMr91vA Z6O7caQNC9kLbhkpqZHAAwQJeMai4q8yaqC7Jeynbh8RNH2pA1aLnVq0SohmDMsHIU 8ZukjJgLUXvUnxRFACH0Sy5BxfkEUkcxBbxohpXpkZF4Axvx79MdK6viIwAQMqznFz f5gCTZ2+q3WMhIuxazhprfBMxiWuzimF3bod/305LjHl5jO3p/+jXz48RwBFvRv2c9 f2JaGSLCt8TAg== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 3/6] vga-switcheroo: notify clients of pending/completed switch events X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a new vga-switcheroo client callback to allow clients to register for receiving notifications when a mux switch is pending, completed, or failed. This allows individual client drivers to prepare for or respond to mux switches to and from the registered client device. Signed-off-by: Daniel Dadap --- drivers/gpu/vga/vga_switcheroo.c | 29 ++++++++++++++++++++++++++++- include/linux/vga_switcheroo.h | 18 ++++++++++++++++++ 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/vga/vga_switcheroo.c b/drivers/gpu/vga/vga_switcheroo.c index a4fc78c4bf4f..6392dc92696b 100644 --- a/drivers/gpu/vga/vga_switcheroo.c +++ b/drivers/gpu/vga/vga_switcheroo.c @@ -756,14 +756,41 @@ static int vga_switchto_stage2(struct vga_switcheroo_client *new_client, if (new_client->fb_info) fbcon_remap_all(new_client->fb_info); + if (active->ops->notify) + active->ops->notify(active->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_AWAY, + VGA_SWITCHEROO_NOTIFY_SWITCH_PENDING); + if (new_client->ops->notify) + new_client->ops->notify(new_client->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_TO, + VGA_SWITCHEROO_NOTIFY_SWITCH_PENDING); + active->switched = false; mutex_lock(&vgasr_priv.mux_hw_lock); ret = vgasr_priv.handler->switchto(new_client->id); mutex_unlock(&vgasr_priv.mux_hw_lock); - if (ret) + if (ret) { + if (active->ops->notify) + active->ops->notify(active->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_AWAY, + VGA_SWITCHEROO_NOTIFY_SWITCH_FAILED); + if (new_client->ops->notify) + new_client->ops->notify(new_client->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_TO, + VGA_SWITCHEROO_NOTIFY_SWITCH_FAILED); return ret; + } new_client->switched = true; + if (active->ops->notify) + active->ops->notify(active->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_AWAY, + VGA_SWITCHEROO_NOTIFY_SWITCH_COMPLETE); + if (new_client->ops->notify) + new_client->ops->notify(new_client->pdev, + VGA_SWITCHEROO_NOTIFY_SWITCH_TO, + VGA_SWITCHEROO_NOTIFY_SWITCH_COMPLETE); + if (new_client->ops->reprobe) new_client->ops->reprobe(new_client->pdev); diff --git a/include/linux/vga_switcheroo.h b/include/linux/vga_switcheroo.h index 63e6d6e5786e..2dc8ebc84fd4 100644 --- a/include/linux/vga_switcheroo.h +++ b/include/linux/vga_switcheroo.h @@ -90,6 +90,17 @@ enum vga_switcheroo_client_id { VGA_SWITCHEROO_MAX_CLIENTS, }; +enum vga_switcheroo_notify_direction { + VGA_SWITCHEROO_NOTIFY_SWITCH_TO, + VGA_SWITCHEROO_NOTIFY_SWITCH_AWAY, +}; + +enum vga_switcheroo_notify_action { + VGA_SWITCHEROO_NOTIFY_SWITCH_PENDING, + VGA_SWITCHEROO_NOTIFY_SWITCH_COMPLETE, + VGA_SWITCHEROO_NOTIFY_SWITCH_FAILED, +}; + /** * struct vga_switcheroo_handler - handler callbacks * @init: initialize handler. @@ -134,6 +145,10 @@ struct vga_switcheroo_handler { * Mandatory. The client should return false if a user space process * has one of its device files open * @gpu_bound: notify the client id to audio client when the GPU is bound. + * @notify: notify clients of pending and completed switches + * Optional. This gets called for both active and inactive clients, + * before a switch begins, and after a switch successfully completes + * or fails. * * Client callbacks. A client can be either a GPU or an audio device on a GPU. * The @set_gpu_state and @can_switch methods are mandatory, @reprobe may be @@ -145,6 +160,9 @@ struct vga_switcheroo_client_ops { void (*reprobe)(struct pci_dev *dev); bool (*can_switch)(struct pci_dev *dev); void (*gpu_bound)(struct pci_dev *dev, enum vga_switcheroo_client_id); + void (*notify)(struct pci_dev *dev, + enum vga_switcheroo_notify_direction, + enum vga_switcheroo_notify_action); }; #if defined(CONFIG_VGA_SWITCHEROO) From patchwork Mon Jul 27 20:51:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687681 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 370FE13B6 for ; Mon, 27 Jul 2020 21:35:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1584620809 for ; Mon, 27 Jul 2020 21:35:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="lhPcB2Y8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1584620809 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03E3489F75; Mon, 27 Jul 2020 21:35:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9191389916; Mon, 27 Jul 2020 20:50:29 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:49:45 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:29 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:28 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:10 -0500 Message-ID: <20200727205112.27698-5-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595882985; bh=V2mathaNGqgFDiJfvyfvooDAgmkBeUwMk/0KmirXkFs=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=lhPcB2Y8FaVcNxzkzpZm5ulYee4MQiO8rHECXIWOMeuUnLGy9a8/OYsEeOyp3ChtX AcmkYaZsk/09RKWjEFbsdo6wafCUerAyFtgj0ty5Zu53kajF5EOKG5DSjIL6YRfEL3 8NSUslpta/gxiaT/GL5LG9QSkK0gtdAzqfZZNNgJvx8OwS3LSVTgBSPTrOFKRtFDse e0hMziWXyC4EV6+63Oa0U7TI+dm7sn3byyzV3M7vmHz4T2/YjEJ1hZ6DFhYzi6Ml/D xG3Mqdgg7YkJd1WgrvtPuBlpsCaxeAVxZdZzlF23ggniM8TxIwcfMEyeKXqWERoXoB g53YgrfP7IX5w== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 4/6] i915: implement vga-switcheroo reprobe() callback X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a vga-switcheroo callback for reprobing displays. Use this new callback to retrain the link on all DP encoders after a mux switch. Signed-off-by: Daniel Dadap --- drivers/gpu/drm/i915/i915_switcheroo.c | 27 +++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_switcheroo.c b/drivers/gpu/drm/i915/i915_switcheroo.c index ed69b5d4a375..fa388de03cf6 100644 --- a/drivers/gpu/drm/i915/i915_switcheroo.c +++ b/drivers/gpu/drm/i915/i915_switcheroo.c @@ -7,6 +7,8 @@ #include "i915_drv.h" #include "i915_switcheroo.h" +#include "display/intel_display_types.h" +#include "display/intel_dp.h" static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_state state) @@ -46,9 +48,32 @@ static bool i915_switcheroo_can_switch(struct pci_dev *pdev) return i915 && atomic_read(&i915->drm.open_count) == 0; } +static void i915_switcheroo_reprobe(struct pci_dev *pdev) +{ + struct drm_i915_private *i915 = pdev_to_i915(pdev); + struct intel_encoder *encoder; + + for_each_intel_dp(&i915->drm, encoder) { + int ret = -EDEADLK; + struct drm_modeset_acquire_ctx ctx; + + drm_modeset_acquire_init(&ctx, 0); + + while (ret == -EDEADLK) { + ret = intel_dp_retrain_link(encoder, &ctx); + + if (ret == -EDEADLK) + drm_modeset_backoff(&ctx); + } + + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); + } +} + static const struct vga_switcheroo_client_ops i915_switcheroo_ops = { .set_gpu_state = i915_switcheroo_set_state, - .reprobe = NULL, + .reprobe = i915_switcheroo_reprobe, .can_switch = i915_switcheroo_can_switch, }; From patchwork Mon Jul 27 20:51:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687685 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4C1F61746 for ; Mon, 27 Jul 2020 21:35:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2A41020729 for ; Mon, 27 Jul 2020 21:35:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="d1izXNZR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2A41020729 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 667306E073; Mon, 27 Jul 2020 21:35:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com [216.228.121.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E44B389FD4; Mon, 27 Jul 2020 20:50:34 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:50:21 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:34 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:29 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:11 -0500 Message-ID: <20200727205112.27698-6-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595883021; bh=59T4gHQyf67sIQu9+jHG3Vk/zJuDG9Yb+zkpmwcbSGg=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=d1izXNZRmvxqzmKSS1zvEOv0HB5/f1KWrY1PuQ3QEEuJZMJJyBjRKGtphEWy9vxnc 8HmgTTulW+zl/eq4gXjS2h4Rl/k/nTN3itD/zRQcCmNgmCfkmENuF3MtAaYimcA5c7 u8vaf5EhFwHuxAQgm9X6D+2HZ3lqmXEvL7kM8YyE7kKgVrliok79w0R2atHgdGYvQG kJLByhsxCVbSkqzcXA/Zx39hr+eC/CdgMrXej0tU2yIwQ7KWyt9OQDwz8TQQ+sMjwL qGCleO3UinuwDE4Hi/GvaCF6XTtO9bpZP9FBnLoDuPxx/5kLoaeIXvVCmb2Iw176S6 4obCYlZugF+fQ== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 5/6] i915: fail atomic commit when muxed away X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Attempting to commit a modeset while mux-switched away can cause problems due to DisplayPort links being unavailable while they are physically disconnected. In order to avoid this, bail out of atomic commit early if attempted while a display mux is switched away. Signed-off-by: Daniel Dadap --- drivers/gpu/drm/i915/display/intel_display.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 346846609f45..4ad799e4b024 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -15736,6 +15737,12 @@ static int intel_atomic_commit(struct drm_device *dev, struct drm_i915_private *dev_priv = to_i915(dev); int ret = 0; + if (!vga_switcheroo_is_client_active(to_pci_dev(dev->dev))) { + drm_dbg_atomic(&dev_priv->drm, + "Atomic commit attempted while muxed away.\n"); + return -EINVAL; + } + state->wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); drm_atomic_state_get(&state->base); From patchwork Mon Jul 27 20:51:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Dadap X-Patchwork-Id: 11687691 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C9F6013B6 for ; Mon, 27 Jul 2020 21:35:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7BF420809 for ; Mon, 27 Jul 2020 21:35:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="LbIor99m" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A7BF420809 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 34D716E07B; Mon, 27 Jul 2020 21:35:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com [216.228.121.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E40EA89F45; Mon, 27 Jul 2020 20:50:34 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 27 Jul 2020 13:50:21 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 27 Jul 2020 13:50:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 27 Jul 2020 13:50:34 -0700 Received: from lenny.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul 2020 20:50:29 +0000 From: Daniel Dadap To: , , , , , Date: Mon, 27 Jul 2020 15:51:12 -0500 Message-ID: <20200727205112.27698-7-ddadap@nvidia.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200727205112.27698-1-ddadap@nvidia.com> References: <20200727205112.27698-1-ddadap@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595883021; bh=F/7YLGa7lOJIOpot14G8UyAHptYWSR4x6Lg82bmZ0i0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: X-Originating-IP:X-ClientProxiedBy:Content-Type; b=LbIor99mef0CsNFbjZIxw7elacyTZ6vLx/IaB/ZJWFzcPxlKtjsWIzLPvkBQxtTij CsUIra9eSpJnUNqaQbmlzuQjJqwjSanXgZ/MFDiRmaLfIvMiBhSLM+kw/saHCXqWIc lfM9vsryjaSEVrhtfEbvY+5yDNy0IU1KGEXWDBipmD0KRJk3E/fNrEICalhEjsF6IJ 5aWreiLbJy0+oPt21wNrbFnp3qkM6znsIGcB/OZ52P+mv46gmlDCZopBOARRM/gjAZ i+dHp0Q3WFUHbPykl2oCfHsUDP0g7yEAoEEW3emWfei2Pv+sWl058aktjlgnbi3kBj 6KI2+GO+rj1/w== X-Mailman-Approved-At: Mon, 27 Jul 2020 21:35:38 +0000 Subject: [Intel-gfx] [PATCH 6/6] i915: bail out of eDP link training while mux-switched away X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Dadap Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" It is not possible to train a Displayport link while the lanes are physically disconnected by a display mux. In order to prevent problems associated with attempting to train a disconnected link, abort eDP link training if the i915 GPU is not an active vga-switcheroo client. This short circuit is eDP-specific, as normal DP (e.g. for external displays) should be able to detect that the link is not physically connected, while eDP is usually assumed to be always connected. Signed-off-by: Daniel Dadap --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index a7defb37ab00..a1c61db8a228 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -24,6 +24,7 @@ #include "intel_display_types.h" #include "intel_dp.h" #include "intel_dp_link_training.h" +#include "linux/vga_switcheroo.h" static void intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) @@ -371,6 +372,14 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp) { struct intel_connector *intel_connector = intel_dp->attached_connector; + struct device *dev = dp_to_dig_port(intel_dp)->base.base.dev->dev; + + if (intel_dp_is_edp(intel_dp) && + !vga_switcheroo_is_client_active(to_pci_dev(dev))) { + drm_dbg_kms(&dp_to_i915(intel_dp)->drm, + "eDP link training not allowed when muxed away."); + return; + } if (!intel_dp_link_training_clock_recovery(intel_dp)) goto failure_handling;