From patchwork Wed Jul 29 07:32:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 11690517 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30DE8912 for ; Wed, 29 Jul 2020 07:39:14 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4ED992076E for ; Wed, 29 Jul 2020 07:39:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="C+Vf7R/i" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4ED992076E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 4C405173E; Wed, 29 Jul 2020 09:38:23 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 4C405173E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1596008351; bh=vldQV8blBjs3qvSfMB6/SlyJPatZDKeM/Ez3R77AgxU=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=C+Vf7R/iX7SJphQhhT/p61qMDlHkwD/4D1Uo05VWhk6TiiCGJDM/XZhsq17TWttue zUA3o5qZnr6cc3sOTuCN0aDjEg3ERXy7epzl29RTUB8BQsjSuxN+O18qqmpHvhRvse PYvMxn1E2Giv09PN29vVOmFpqfZlBpWQfaI8R+hI= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id C240EF801D9; Wed, 29 Jul 2020 09:38:22 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id B5985F8012F; Wed, 29 Jul 2020 09:38:20 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on alsa1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 6C635F8012F for ; Wed, 29 Jul 2020 09:38:10 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 6C635F8012F IronPort-SDR: uJtLdGogO88OsoxKuek/SmzjlWfDMDXRlImEqLuCSp7m2lt8QQx4vQC/1dncik6/cZpguvY/41 oKFzKNQ49x7Q== X-IronPort-AV: E=McAfee;i="6000,8403,9696"; a="149216424" X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="149216424" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2020 00:38:04 -0700 IronPort-SDR: 6euRkXTDPs/R52sbmg2Ef5t3DThkJnC7qs3rg/oadWmjcwVH63Txgy1+HhUsjwblax+d/uXpV8 Rsn8+qH7Mwdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="434604212" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by orsmga004.jf.intel.com with ESMTP; 29 Jul 2020 00:38:02 -0700 From: Michael Sit Wei Hong To: alsa-devel@alsa-project.org Subject: [PATCH 1/3] ASoC: codec: tlv3204: Enable 24 bit audio support Date: Wed, 29 Jul 2020 15:32:54 +0800 Message-Id: <20200729073256.24028-2-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> References: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> Cc: cezary.rojewski@intel.com, a-estrada@ti.com, andriy.shevchenko@intel.com, zakkaye@ti.com, tiwai@suse.com, jee.heng.sia@intel.com, pierre-louis.bossart@linux.intel.com, liam.r.girdwood@linux.intel.com, broonie@kernel.org, dmurphy@ti.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Enable 24 bit in 32 bit container audio support. Using the params_physical_width to differentiate 24 bit in 32 bit container and 24 bit in 24 bit container modes. Use the sample rate, bit depth and channel parameters to calculate the bit clock needed. Signed-off-by: Michael Sit Wei Hong Reviewed-by: Sia Jee Heng Reviewed-by: Pierre-Louis Bossart --- sound/soc/codecs/tlv320aic32x4.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index d087f3b20b1d..8534f9006e6a 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -665,7 +665,8 @@ static int aic32x4_set_processing_blocks(struct snd_soc_component *component, } static int aic32x4_setup_clocks(struct snd_soc_component *component, - unsigned int sample_rate) + unsigned int sample_rate, unsigned int channel, + unsigned int bit_depth) { u8 aosr; u16 dosr; @@ -753,7 +754,8 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, dosr); clk_set_rate(clocks[5].clk, - sample_rate * 32); + sample_rate * channel * + bit_depth); return 0; } } @@ -775,9 +777,11 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream, u8 iface1_reg = 0; u8 dacsetup_reg = 0; - aic32x4_setup_clocks(component, params_rate(params)); + aic32x4_setup_clocks(component, params_rate(params), + params_channels(params), + params_physical_width(params)); - switch (params_width(params)) { + switch (params_physical_width(params)) { case 16: iface1_reg |= (AIC32X4_WORD_LEN_16BITS << AIC32X4_IFACE1_DATALEN_SHIFT); @@ -862,7 +866,8 @@ static int aic32x4_set_bias_level(struct snd_soc_component *component, #define AIC32X4_RATES SNDRV_PCM_RATE_8000_192000 #define AIC32X4_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ - | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE \ + | SNDRV_PCM_FMTBIT_S32_LE) static const struct snd_soc_dai_ops aic32x4_ops = { .hw_params = aic32x4_hw_params, From patchwork Wed Jul 29 07:32:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 11690529 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 26D0D913 for ; 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a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1596008452; bh=ErQsObe3Q+lDTNkvmyn0xB1uRJWOBs783b0/zS7rnIM=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=TBd/HTkF7AJwfmuyL6Qn7phbVFlUTUuPdME3XZ3vSd4qwH9TZ0LoNlGz3IIHZ3xAR EjvRDHHn8pw3P/5afOJ/Q5wug+6H9f3P3vkk7T4qkOxqcqs3E8wOyLPdQjpUbsbXsy j2dHCS32N9tLYwU0OZd2tmsroXFEydsSoi9gHac0= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 424DCF801A3; Wed, 29 Jul 2020 09:38:29 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id B3A30F80171; Wed, 29 Jul 2020 09:38:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on alsa1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 3F101F80125 for ; Wed, 29 Jul 2020 09:38:15 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3F101F80125 IronPort-SDR: 2D/HNhKExYcFAuvKSn49ecaHxMe/HRfD58UC699QIY0FdM9u/3AolQD3zrBX8vN6lePsOwuyv1 wXx/WNDLiWOg== X-IronPort-AV: E=McAfee;i="6000,8403,9696"; a="149216432" X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="149216432" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2020 00:38:09 -0700 IronPort-SDR: ig3veScUJyXG6klwqotwrz7PvrvzmRpcHpR0xVPOLAk9IrB57K8wAMoT3WQOJ7DfCe6X1+CHT8 lusrH/UPzWFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="434604228" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by orsmga004.jf.intel.com with ESMTP; 29 Jul 2020 00:38:06 -0700 From: Michael Sit Wei Hong To: alsa-devel@alsa-project.org Subject: [PATCH 2/3] ASoC: codec: tlv3204: Increased maximum supported channels Date: Wed, 29 Jul 2020 15:32:55 +0800 Message-Id: <20200729073256.24028-3-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> References: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> Cc: cezary.rojewski@intel.com, a-estrada@ti.com, andriy.shevchenko@intel.com, zakkaye@ti.com, tiwai@suse.com, jee.heng.sia@intel.com, pierre-louis.bossart@linux.intel.com, liam.r.girdwood@linux.intel.com, broonie@kernel.org, dmurphy@ti.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Increased maximum supported channel to 8 channels for audio capture running in TDM mode. Signed-off-by: Michael Sit Wei Hong Reviewed-by: Sia Jee Heng Reviewed-by: Pierre-Louis Bossart --- sound/soc/codecs/tlv320aic32x4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 8534f9006e6a..5af438a00f95 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -887,7 +887,7 @@ static struct snd_soc_dai_driver aic32x4_dai = { .capture = { .stream_name = "Capture", .channels_min = 1, - .channels_max = 2, + .channels_max = 8, .rates = AIC32X4_RATES, .formats = AIC32X4_FORMATS,}, .ops = &aic32x4_ops, From patchwork Wed Jul 29 07:32:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 11690535 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 95D65912 for ; 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Wed, 29 Jul 2020 09:38:15 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 60F45F801A3 IronPort-SDR: VHfH/MvKGOQt5nklKWpdcFIksyA8gffWqSJUVb5ctJKWNx2RWnrF49brNCN/gq8ETNi1Bp7HfS vCOYHbQwUTNg== X-IronPort-AV: E=McAfee;i="6000,8403,9696"; a="149216440" X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="149216440" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2020 00:38:13 -0700 IronPort-SDR: 07MCNjAN1YfKuizfK9NM/LDncMNSEQbNyulT7iP/FAy8KVE6/0n89UpPF7Fd40cN833kCGH2yF XYfw/CUOQYUA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,409,1589266800"; d="scan'208";a="434604245" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by orsmga004.jf.intel.com with ESMTP; 29 Jul 2020 00:38:10 -0700 From: Michael Sit Wei Hong To: alsa-devel@alsa-project.org Subject: [PATCH 3/3] ASoC: codec: tlv3204: Moving GPIO reset and add ADC reset Date: Wed, 29 Jul 2020 15:32:56 +0800 Message-Id: <20200729073256.24028-4-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> References: <20200729073256.24028-1-michael.wei.hong.sit@intel.com> Cc: cezary.rojewski@intel.com, a-estrada@ti.com, andriy.shevchenko@intel.com, zakkaye@ti.com, tiwai@suse.com, jee.heng.sia@intel.com, pierre-louis.bossart@linux.intel.com, liam.r.girdwood@linux.intel.com, broonie@kernel.org, dmurphy@ti.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Moving GPIO reset to a later stage and before clock registration to ensure that the host system and codec clocks are in sync. If the host register clock values prior to gpio reset, the last configured codec clock is registered to the host. The codec then gets gpio resetted setting the codec clocks to their default value, causing a mismatch. Host system will skip clock setting thinking the codec clocks are already at the requested rate. ADC reset is added to ensure the next audio capture does not have undesired artifacts. It is probably related to the original code where the probe function resets the ADC prior to 1st record. Signed-off-by: Michael Sit Wei Hong Reviewed-by: Sia Jee Heng Reviewed-by: Pierre-Louis Bossart --- sound/soc/codecs/tlv320aic32x4.c | 47 ++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 5af438a00f95..37e14558d7c0 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -50,6 +50,28 @@ struct aic32x4_priv { struct device *dev; }; +static int aic32x4_reset_adc(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); + u32 adc_reg; + + /* + * Workaround: the datasheet does not mention a required programming + * sequence but experiments show the ADC needs to be reset after each + * capture to avoid audible artifacts. + */ + switch (event) { + case SND_SOC_DAPM_POST_PMD: + adc_reg = snd_soc_component_read32(component, AIC32X4_ADCSETUP); + snd_soc_component_write(component, AIC32X4_ADCSETUP, adc_reg | + AIC32X4_LADC_EN | AIC32X4_RADC_EN); + snd_soc_component_write(component, AIC32X4_ADCSETUP, adc_reg); + break; + } + return 0; +}; + static int mic_bias_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -434,6 +456,7 @@ static const struct snd_soc_dapm_widget aic32x4_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("Mic Bias", AIC32X4_MICBIAS, 6, 0, mic_bias_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_POST("ADC Reset", aic32x4_reset_adc), SND_SOC_DAPM_OUTPUT("HPL"), SND_SOC_DAPM_OUTPUT("HPR"), @@ -665,8 +688,8 @@ static int aic32x4_set_processing_blocks(struct snd_soc_component *component, } static int aic32x4_setup_clocks(struct snd_soc_component *component, - unsigned int sample_rate, unsigned int channel, - unsigned int bit_depth) + unsigned int sample_rate, unsigned int channel, + unsigned int bit_depth) { u8 aosr; u16 dosr; @@ -957,12 +980,6 @@ static int aic32x4_component_probe(struct snd_soc_component *component) if (ret) return ret; - if (gpio_is_valid(aic32x4->rstn_gpio)) { - ndelay(10); - gpio_set_value(aic32x4->rstn_gpio, 1); - mdelay(1); - } - snd_soc_component_write(component, AIC32X4_RESET, 0x01); if (aic32x4->setup) @@ -1195,10 +1212,6 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) aic32x4->mclk_name = "mclk"; } - ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); - if (ret) - return ret; - if (gpio_is_valid(aic32x4->rstn_gpio)) { ret = devm_gpio_request_one(dev, aic32x4->rstn_gpio, GPIOF_OUT_INIT_LOW, "tlv320aic32x4 rstn"); @@ -1220,6 +1233,16 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) return ret; } + if (gpio_is_valid(aic32x4->rstn_gpio)) { + ndelay(10); + gpio_set_value_cansleep(aic32x4->rstn_gpio, 1); + mdelay(1); + } + + ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); + if (ret) + return ret; + return 0; } EXPORT_SYMBOL(aic32x4_probe);