From patchwork Thu Jul 30 14:48:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11694285 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 683AE912 for ; Fri, 31 Jul 2020 07:37:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 46D8A2067D for ; Fri, 31 Jul 2020 07:37:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="KC3TWDmn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 46D8A2067D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 11B206EA07; Fri, 31 Jul 2020 07:37:06 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from crapouillou.net (crapouillou.net [89.234.176.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D8036E914 for ; Thu, 30 Jul 2020 14:48:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1596120516; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FdoE1nkLDPbTG7FoC1IHhp8tIhNRgkzWtzI0H+/zMgQ=; b=KC3TWDmn1K7+LRoLXGczHqEpdLlgf0dZ/d9rTADan7xOdnYeqYhPcBLLYFkzwyFBVin8aE tMLvBhYZX7m4SZAiBwfjsI4MbjqTwhhApqK21WmODvvyX5AlDKwtm4Hj/nziIaccY8OKNq XLlRe5/RYoIehupCk5crTM7mg5VesCo= From: Paul Cercueil To: David Airlie , Daniel Vetter Subject: [PATCH v2 1/3] drm/ingenic: ipu: Only restart manually on older SoCs Date: Thu, 30 Jul 2020 16:48:28 +0200 Message-Id: <20200730144830.10479-2-paul@crapouillou.net> In-Reply-To: <20200730144830.10479-1-paul@crapouillou.net> References: <20200730144830.10479-1-paul@crapouillou.net> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 31 Jul 2020 07:36:08 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Cercueil , od@zcrc.me, Sam Ravnborg , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On older SoCs, it is necessary to restart manually the IPU when a frame is done processing. Doing so on newer SoCs (JZ4760/70) kinds of work too, until the input or output resolutions or the framerate are too high. Make it work properly on newer SoCs by letting the LCD controller trigger the IPU frame restart signal. Reviewed-by: Sam Ravnborg Signed-off-by: Paul Cercueil --- drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c index 7a0a8bd865d3..7eae56fa92ea 100644 --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c @@ -35,6 +35,7 @@ struct soc_info { const u32 *formats; size_t num_formats; bool has_bicubic; + bool manual_restart; void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg, unsigned int sharpness, bool downscale, @@ -645,7 +646,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg) unsigned int dummy; /* dummy read allows CPU to reconfigure IPU */ - regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy); + if (ipu->soc_info->manual_restart) + regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy); /* ACK interrupt */ regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0); @@ -656,7 +658,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg) regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v); /* Run IPU for the new frame */ - regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN); + if (ipu->soc_info->manual_restart) + regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN); drm_crtc_handle_vblank(crtc); @@ -806,6 +809,7 @@ static const struct soc_info jz4725b_soc_info = { .formats = jz4725b_ipu_formats, .num_formats = ARRAY_SIZE(jz4725b_ipu_formats), .has_bicubic = false, + .manual_restart = true, .set_coefs = jz4725b_set_coefs, }; @@ -831,6 +835,7 @@ static const struct soc_info jz4760_soc_info = { .formats = jz4760_ipu_formats, .num_formats = ARRAY_SIZE(jz4760_ipu_formats), .has_bicubic = true, + .manual_restart = false, .set_coefs = jz4760_set_coefs, }; From patchwork Thu Jul 30 14:48:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11694265 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C9E2714B7 for ; Fri, 31 Jul 2020 07:36:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8C142067D for ; Fri, 31 Jul 2020 07:36:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="iyjT2kOL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8C142067D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 922826E9FA; Fri, 31 Jul 2020 07:36:30 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from crapouillou.net (crapouillou.net [89.234.176.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6B09E6E915 for ; Thu, 30 Jul 2020 14:48:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1596120517; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qt3g3tEVpW7ed636/4tctSkOhvgTtF4IyDUbEY1/K24=; b=iyjT2kOLlcBMF51VsqjIRvQl4qzXQLULQ97FlzLdnj4Xc7sjsxYrccGYbWGIsYp689mmwi ayjn9IJx1ssEL6eBL3mz6GnsuLdYSCDnr2pWs7VphhSiSDopBF/8my7PAfHbrAZCS3m0+a nCqyg175MIoL8OnbUhjLrsvyAJZ0LnA= From: Paul Cercueil To: David Airlie , Daniel Vetter Subject: [PATCH v2 2/3] drm/ingenic: ipu: Remove YUV422 from supported formats on JZ4725B Date: Thu, 30 Jul 2020 16:48:29 +0200 Message-Id: <20200730144830.10479-3-paul@crapouillou.net> In-Reply-To: <20200730144830.10479-1-paul@crapouillou.net> References: <20200730144830.10479-1-paul@crapouillou.net> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 31 Jul 2020 07:36:08 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Cercueil , od@zcrc.me, Sam Ravnborg , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" When configuring the IPU for packed YUV 4:2:2, depending on the scaling ratios given by the source and destination resolutions, it is possible to crash the IPU block, to the point where a software reset of the IP does not fix it. This can happen anytime, in the first few frames, or after dozens of minutes. The same crash also happens when the IPU is fully controlled by the LCD controller (in that case no HW register is written at any moment after startup), which points towards a hardware bug. Thanksfully multiplanar YUV is not affected. Until this bug is fixed or worked around, address this issue by removing support for YUV 4:2:2 on the IPU of the JZ4725B. v2: Update commit message (remove the "crash beyond repair" bit) Signed-off-by: Paul Cercueil --- drivers/gpu/drm/ingenic/ingenic-ipu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c index 7eae56fa92ea..7dd2a6ae4994 100644 --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c @@ -795,10 +795,16 @@ static int ingenic_ipu_remove(struct platform_device *pdev) } static const u32 jz4725b_ipu_formats[] = { + /* + * While officially supported, packed YUV 4:2:2 formats can cause + * random hardware crashes on JZ4725B under certain circumstances. + * It seems to happen with some specific resize ratios. + * Until a proper workaround or fix is found, disable these formats. DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, + */ DRM_FORMAT_YUV411, DRM_FORMAT_YUV420, DRM_FORMAT_YUV422, From patchwork Thu Jul 30 14:48:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11694261 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 08EA61392 for ; Fri, 31 Jul 2020 07:36:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DBA4B2067D for ; Fri, 31 Jul 2020 07:36:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="AgDmNK7p" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DBA4B2067D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9724F6E9F3; Fri, 31 Jul 2020 07:36:29 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from crapouillou.net (crapouillou.net [89.234.176.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 21E3B6E915 for ; Thu, 30 Jul 2020 14:48:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1596120517; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gUVHf7pjz79eBEh+tIPCA/D+2iQEziFi0FluLsYiEGI=; b=AgDmNK7pSkDHnwXR8XpeuDJHMGJSudAOPqXg2CXYQx/zOnMu1XCLRuqBRO9PZO3jo80Kih KZSCOkmALkQLuBC1pFH3zKTFICr2HVJrQX9OolHS7tGGdxhuRfWK+59l/8IUfr74UaSBCb jpqzVu9Bh6Tvw9HW4KoDNqFaulo+F2Y= From: Paul Cercueil To: David Airlie , Daniel Vetter Subject: [PATCH v2 3/3] drm/ingenic: ipu: Only enable clock when needed Date: Thu, 30 Jul 2020 16:48:30 +0200 Message-Id: <20200730144830.10479-4-paul@crapouillou.net> In-Reply-To: <20200730144830.10479-1-paul@crapouillou.net> References: <20200730144830.10479-1-paul@crapouillou.net> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 31 Jul 2020 07:36:08 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Cercueil , od@zcrc.me, Sam Ravnborg , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Instead of keeping the IPU clock enabled constantly, enable and disable it on demand, when the IPU plane is used. That way, we won't use any extra power when the IPU is not used. v2: Explain the reason of this patch Signed-off-by: Paul Cercueil --- drivers/gpu/drm/ingenic/ingenic-ipu.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c index 7dd2a6ae4994..fc8c6e970ee3 100644 --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c @@ -49,6 +49,7 @@ struct ingenic_ipu { struct regmap *map; struct clk *clk; const struct soc_info *soc_info; + bool clk_enabled; unsigned int num_w, num_h, denom_w, denom_h; @@ -288,12 +289,23 @@ static void ingenic_ipu_plane_atomic_update(struct drm_plane *plane, const struct drm_format_info *finfo; u32 ctrl, stride = 0, coef_index = 0, format = 0; bool needs_modeset, upscaling_w, upscaling_h; + int err; if (!state || !state->fb) return; finfo = drm_format_info(state->fb->format->format); + if (!ipu->clk_enabled) { + err = clk_enable(ipu->clk); + if (err) { + dev_err(ipu->dev, "Unable to enable clock: %d\n", err); + return; + } + + ipu->clk_enabled = true; + } + /* Reset all the registers if needed */ needs_modeset = drm_atomic_crtc_needs_modeset(state->crtc->state); if (needs_modeset) { @@ -578,6 +590,11 @@ static void ingenic_ipu_plane_atomic_disable(struct drm_plane *plane, regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN); ingenic_drm_plane_disable(ipu->master, plane); + + if (ipu->clk_enabled) { + clk_disable(ipu->clk); + ipu->clk_enabled = false; + } } static const struct drm_plane_helper_funcs ingenic_ipu_plane_helper_funcs = { @@ -761,9 +778,9 @@ static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d) drm_object_attach_property(&plane->base, ipu->sharpness_prop, ipu->sharpness); - err = clk_prepare_enable(ipu->clk); + err = clk_prepare(ipu->clk); if (err) { - dev_err(dev, "Unable to enable clock\n"); + dev_err(dev, "Unable to prepare clock\n"); return err; } @@ -775,7 +792,7 @@ static void ingenic_ipu_unbind(struct device *dev, { struct ingenic_ipu *ipu = dev_get_drvdata(dev); - clk_disable_unprepare(ipu->clk); + clk_unprepare(ipu->clk); } static const struct component_ops ingenic_ipu_ops = {