From patchwork Fri Jul 31 16:26:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 11695187 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B970C6C1 for ; Fri, 31 Jul 2020 16:26:04 +0000 (UTC) Received: by mail.kernel.org (Postfix) id ABBBD22B40; Fri, 31 Jul 2020 16:26:04 +0000 (UTC) Delivered-To: soc@kernel.org Received: from localhost.localdomain (cpe-70-114-128-244.austin.res.rr.com [70.114.128.244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3C1F6206FA; Fri, 31 Jul 2020 16:26:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1596212764; bh=HubzLvYxR6wzJ3ooAIBSqKNMWmE+iqX5gXBJJjV9j5w=; h=From:List-Id:To:Cc:Subject:Date:From; b=LEEVTESZ0l9RYfhPGMbnYwy4PRbEuIbaojR3j3f02sKdgjdWKATwOr3renzyLpSVn G4EvM1TO8JWCucB9Oj7YBO3aK9W8Hbe+OVnTfOtB/LKc8cvT+RQTFxNTbiGn42xx3F BxqV+BnihzNCTjKv/xkCwbchgfpTEO/vJ/icn3wg= From: Dinh Nguyen List-Id: To: arm@kernel.org, soc@kernel.org Cc: dinguyen@kernel.org Subject: [GIT PULL] SoCFPGA DTS fix for v5.8, version 3 Date: Fri, 31 Jul 2020 11:26:03 -0500 Message-Id: <20200731162603.9203-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.17.1 Hi Arnd, Kevin, and Olof: Please pull in this final SoCFPGA DTS fix for v5.8. Thanks, Dinh The following changes since commit 681a5c71fb829fc2193e3bb524af41525477f5c3: arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema (2020-07-15 14:13:00 -0500) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git socfpga_dts_fix_for_v5.8_v3 for you to fetch changes up to dc2f6ce76fe2a4d34b40d79591b6a4706d4ba7f7: ARM: dts: socfpga: fix register entry for timer3 on Arria10 (2020-07-31 11:06:16 -0500) ---------------------------------------------------------------- Dinh Nguyen (1): ARM: dts: socfpga: fix register entry for timer3 on Arria10 arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)