From patchwork Mon Aug 10 11:20:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707315 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C02D13B1 for ; Mon, 10 Aug 2020 11:22:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 20FF520729 for ; Mon, 10 Aug 2020 11:22:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="EHoMCY46" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726462AbgHJLWW (ORCPT ); Mon, 10 Aug 2020 07:22:22 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:24913 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726465AbgHJLVl (ORCPT ); Mon, 10 Aug 2020 07:21:41 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597058500; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=xHYEdUgnHp0JS97AmayvKH+aTXL2WxGTLHvNm3560lA=; b=EHoMCY46F3OG4AgXTQCY9BoM3BRPAY2kiQKJjzU9EgoiO1U8/BqxDfb7qZmC8qOvQSp1bfm4 jvjXT+SwAHluOtokehmck2E9CkeZkgXkNnUFm4MJItjNP6QW26uX7uKrQcpVzxs5rpJxQG8k qDWF4E78G6U5yS0h6KaZxSd+a1s= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n19.prod.us-west-2.postgun.com with SMTP id 5f312db32f4952907d7e0bc2 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 10 Aug 2020 11:21:23 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id C7767C433AD; Mon, 10 Aug 2020 11:21:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 82918C433CB; Mon, 10 Aug 2020 11:21:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 82918C433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 1/7] pinctrl: qcom: Add msmgpio irqchip flags Date: Mon, 10 Aug 2020 16:50:54 +0530 Message-Id: <1597058460-16211-2-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during suspend and mask before setting irq type. Masking before changing type should make sure any spurious interrupt is not detected during this operation. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Acked-by: Linus Walleij Signed-off-by: Maulik Shah Reviewed-by: Douglas Anderson --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index a2567e7..90edf61 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1243,6 +1243,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND + | IRQCHIP_SET_TYPE_MASKED; np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); if (np) { From patchwork Mon Aug 10 11:20:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707313 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D85B5109A for ; Mon, 10 Aug 2020 11:21:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BBF44206E9 for ; Mon, 10 Aug 2020 11:21:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Wcm8R9YD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726550AbgHJLVk (ORCPT ); Mon, 10 Aug 2020 07:21:40 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:54320 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726033AbgHJLVa (ORCPT ); Mon, 10 Aug 2020 07:21:30 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597058490; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=nSw+Pg8Z1Q0+b6j30X83U/b/ZGs9U90ugvFFeCgAirE=; b=Wcm8R9YDwaofGFLJ1/G176wam+0pjZ1FYRL+04hzD+jyQkAlhxmFZtaL26a37lM9mYZNT8c1 OFb+UD8vvd77achHIwkBAotZW9VwyD+Rx/98O8QBRzi5SyDPd75x4G3GbY6/8G9+gVOfcYph P1pfosDNwLEfr3lCpgwEhlKVOWc= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 5f312db81e4d3989d44ee31d (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 10 Aug 2020 11:21:28 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E8FE2C433CA; Mon, 10 Aug 2020 11:21:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id BC1A4C433A0; Mon, 10 Aug 2020 11:21:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BC1A4C433A0 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 2/7] pinctrl: qcom: Use return value from irq_set_wake call Date: Mon, 10 Aug 2020 16:50:55 +0530 Message-Id: <1597058460-16211-3-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org msmgpio irqchip is not using return value of irq_set_wake call. Start using it. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Signed-off-by: Maulik Shah Reviewed-by: Douglas Anderson Reviewed-by: Stephen Boyd Reviewed-by: Linus Walleij --- drivers/pinctrl/qcom/pinctrl-msm.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 90edf61..c264561 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1077,12 +1077,10 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) * when TLMM is powered on. To allow that, enable the GPIO * summary line to be wakeup capable at GIC. */ - if (d->parent_data) - irq_chip_set_wake_parent(d, on); - - irq_set_irq_wake(pctrl->irq, on); + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) + return irq_chip_set_wake_parent(d, on); - return 0; + return irq_set_irq_wake(pctrl->irq, on); } static int msm_gpio_irq_reqres(struct irq_data *d) From patchwork Mon Aug 10 11:20:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707337 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E1BF109A for ; Mon, 10 Aug 2020 11:24:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F3AB02070B for ; Mon, 10 Aug 2020 11:24:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="hA8355Ky" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726615AbgHJLXw (ORCPT ); Mon, 10 Aug 2020 07:23:52 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:60523 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726452AbgHJLVm (ORCPT ); Mon, 10 Aug 2020 07:21:42 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597058500; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=N7UD2Mvt7iBQIpHCuSnZLXwyg7B5AmY3wCQNnHXQzbs=; b=hA8355Kyv/6OI3aWz0ESOF1m7b7EE3AKd3yCatf01aCKEbH/blHidvOY8OidhAlEaRNwLRxZ JcFUOewwA1S7R9AlXJZYrBfc2cQBsCPrCpDvcHIgPbKkJ2GSy4KkwZ51Gz2hm51Ppiy3q5Kd SZBsJNV+E6nLeLzjalA1f7+3stk= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n18.prod.us-west-2.postgun.com with SMTP id 5f312dbd2f4952907d7e21b4 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 10 Aug 2020 11:21:33 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 2378CC433C9; Mon, 10 Aug 2020 11:21:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 00C52C4339C; Mon, 10 Aug 2020 11:21:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 00C52C4339C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 3/7] genirq: Introduce irq_suspend_one() and irq_resume_one() callbacks Date: Mon, 10 Aug 2020 16:50:56 +0530 Message-Id: <1597058460-16211-4-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Douglas Anderson The "struct irq_chip" has two callbacks in it: irq_suspend() and irq_resume(). These two callbacks are interesting because sometimes an irq chip needs to know about suspend/resume, but they are a bit awkward because: 1. They are called once for the whole irq_chip, not once per IRQ. It's passed data for one of the IRQs enabled on that chip. That means it's up to the irq_chip driver to aggregate. 2. They are only called if you're using "generic-chip", which not everyone is. 3. The implementation uses syscore ops, which apparently have problems with s2idle. Probably the old irq_suspend() and irq_resume() callbacks should be deprecated. Let's introcuce a nicer API that works for all irq_chip devices. This will be called by the core and is called once per IRQ. The core will call the suspend callback after doing its normal suspend operations and the resume before its normal resume operations. Signed-off-by: Douglas Anderson Signed-off-by: Maulik Shah --- include/linux/irq.h | 13 +++++++++++-- kernel/irq/chip.c | 16 ++++++++++++++++ kernel/irq/internals.h | 2 ++ kernel/irq/pm.c | 15 ++++++++++++--- 4 files changed, 41 insertions(+), 5 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index 1b7f4df..8d37b32 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -468,10 +468,16 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips * @irq_cpu_online: configure an interrupt source for a secondary CPU * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU + * @irq_suspend_one: called on an every irq to suspend it; called even if + * this IRQ is configured for wakeup + * @irq_resume_one: called on an every irq to resume it; called even if + * this IRQ is configured for wakeup * @irq_suspend: function called from core code on suspend once per - * chip, when one or more interrupts are installed + * chip, when one or more interrupts are installed; + * only works if using irq/generic-chip * @irq_resume: function called from core code on resume once per chip, - * when one ore more interrupts are installed + * when one ore more interrupts are installed; + * only works if using irq/generic-chip * @irq_pm_shutdown: function called from core code on shutdown once per chip * @irq_calc_mask: Optional function to set irq_data.mask for special cases * @irq_print_chip: optional to print special chip info in show_interrupts @@ -515,6 +521,9 @@ struct irq_chip { void (*irq_cpu_online)(struct irq_data *data); void (*irq_cpu_offline)(struct irq_data *data); + void (*irq_suspend_one)(struct irq_data *data); + void (*irq_resume_one)(struct irq_data *data); + void (*irq_suspend)(struct irq_data *data); void (*irq_resume)(struct irq_data *data); void (*irq_pm_shutdown)(struct irq_data *data); diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 857f5f4..caf80c1 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -447,6 +447,22 @@ void unmask_threaded_irq(struct irq_desc *desc) unmask_irq(desc); } +void suspend_one_irq(struct irq_desc *desc) +{ + struct irq_chip *chip = desc->irq_data.chip; + + if (chip->irq_suspend_one) + chip->irq_suspend_one(&desc->irq_data); +} + +void resume_one_irq(struct irq_desc *desc) +{ + struct irq_chip *chip = desc->irq_data.chip; + + if (chip->irq_resume_one) + chip->irq_resume_one(&desc->irq_data); +} + /* * handle_nested_irq - Handle a nested irq from a irq thread * @irq: the interrupt number diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 7db284b..11c2dac 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -90,6 +90,8 @@ extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); extern void mask_irq(struct irq_desc *desc); extern void unmask_irq(struct irq_desc *desc); extern void unmask_threaded_irq(struct irq_desc *desc); +extern void suspend_one_irq(struct irq_desc *desc); +extern void resume_one_irq(struct irq_desc *desc); #ifdef CONFIG_SPARSE_IRQ static inline void irq_mark_irq(unsigned int irq) { } diff --git a/kernel/irq/pm.c b/kernel/irq/pm.c index 8f557fa..b9e5338 100644 --- a/kernel/irq/pm.c +++ b/kernel/irq/pm.c @@ -69,19 +69,23 @@ void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action) static bool suspend_device_irq(struct irq_desc *desc) { + bool sync = false; + if (!desc->action || irq_desc_is_chained(desc) || desc->no_suspend_depth) - return false; + goto exit; if (irqd_is_wakeup_set(&desc->irq_data)) { irqd_set(&desc->irq_data, IRQD_WAKEUP_ARMED); + /* * We return true here to force the caller to issue * synchronize_irq(). We need to make sure that the * IRQD_WAKEUP_ARMED is visible before we return from * suspend_device_irqs(). */ - return true; + sync = true; + goto exit; } desc->istate |= IRQS_SUSPENDED; @@ -95,7 +99,10 @@ static bool suspend_device_irq(struct irq_desc *desc) */ if (irq_desc_get_chip(desc)->flags & IRQCHIP_MASK_ON_SUSPEND) mask_irq(desc); - return true; + +exit: + suspend_one_irq(desc); + return sync; } /** @@ -137,6 +144,8 @@ EXPORT_SYMBOL_GPL(suspend_device_irqs); static void resume_irq(struct irq_desc *desc) { + resume_one_irq(desc); + irqd_clear(&desc->irq_data, IRQD_WAKEUP_ARMED); if (desc->istate & IRQS_SUSPENDED) From patchwork Mon Aug 10 11:20:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707335 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 08C3B13B1 for ; Mon, 10 Aug 2020 11:23:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E4AFF2073A for ; Mon, 10 Aug 2020 11:23:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="ZuJiY8YY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726641AbgHJLXC (ORCPT ); Mon, 10 Aug 2020 07:23:02 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:57707 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726584AbgHJLVu (ORCPT ); Mon, 10 Aug 2020 07:21:50 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597058510; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=AxvoBcWG8EXvjruIo9s4TgmENSIrz3k6NXBlzZX8t80=; b=ZuJiY8YYwpFF1iv0rqsXq47iFrOF64jeFBcCKze4UsFu5Jdbu0HqDzBLjSBEEJp/OhSxjxAT 4t00yKiaOSRNzmH1+WihaHKKY+6pbrCtFLV0OTt55McoxjwCaW6zhJu30M/ID9OvKYglQxwH ngz9Sc7J2+SO8oDoNFApBeXkSGM= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-west-2.postgun.com with SMTP id 5f312dc3d96d28d61e00cb62 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 10 Aug 2020 11:21:39 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E2524C433CA; Mon, 10 Aug 2020 11:21:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3B33EC433C6; Mon, 10 Aug 2020 11:21:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3B33EC433C6 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 4/7] genirq: introduce irq_suspend_parent() and irq_resume_parent() Date: Mon, 10 Aug 2020 16:50:57 +0530 Message-Id: <1597058460-16211-5-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Douglas Anderson This goes with the new irq_suspend_one() and irq_resume_one() callbacks and allow us to easily pass things up to our parent. Signed-off-by: Douglas Anderson Signed-off-by: Maulik Shah --- include/linux/irq.h | 2 ++ kernel/irq/chip.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/include/linux/irq.h b/include/linux/irq.h index 8d37b32..4188f50 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -679,6 +679,8 @@ extern int irq_chip_set_affinity_parent(struct irq_data *data, const struct cpumask *dest, bool force); extern int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on); +extern void irq_chip_suspend_one_parent(struct irq_data *data); +extern void irq_chip_resume_one_parent(struct irq_data *data); extern int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info); extern int irq_chip_set_type_parent(struct irq_data *data, unsigned int type); diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index caf80c1..5039311 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -1519,6 +1519,34 @@ int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on) EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent); /** + * irq_chip_suspend_one_parent - Call irq_suspend_one() on our parent. + * @data: Pointer to interrupt specific data + * + * Conditional, as the underlying parent chip might not implement it. + */ +void irq_chip_suspend_one_parent(struct irq_data *data) +{ + data = data->parent_data; + if (data->chip->irq_suspend_one) + data->chip->irq_suspend_one(data); +} +EXPORT_SYMBOL_GPL(irq_chip_suspend_one_parent); + +/** + * irq_chip_resume_one_parent - Call irq_resume_one() on our parent. + * @data: Pointer to interrupt specific data + * + * Conditional, as the underlying parent chip might not implement it. + */ +void irq_chip_resume_one_parent(struct irq_data *data) +{ + data = data->parent_data; + if (data->chip->irq_resume_one) + data->chip->irq_resume_one(data); +} +EXPORT_SYMBOL_GPL(irq_chip_resume_one_parent); + +/** * irq_chip_request_resources_parent - Request resources on the parent interrupt * @data: Pointer to interrupt specific data */ From patchwork Mon Aug 10 11:20:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707333 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7BFDF14E3 for ; Mon, 10 Aug 2020 11:23:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 64A8F2078D for ; Mon, 10 Aug 2020 11:23:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="hv0jzyri" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726606AbgHJLW4 (ORCPT ); Mon, 10 Aug 2020 07:22:56 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:30563 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726585AbgHJLVv (ORCPT ); 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Mon, 10 Aug 2020 11:21:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 75A96C433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 5/7] pinctrl: qcom: Call our parent for irq_suspend_one / irq_resume_one Date: Mon, 10 Aug 2020 16:50:58 +0530 Message-Id: <1597058460-16211-6-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Douglas Anderson The parent (PDC) needs to handle this. Call it. Signed-off-by: Douglas Anderson Signed-off-by: Maulik Shah --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index c264561..eaad229 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1237,6 +1237,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type; pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; + pctrl->irq_chip.irq_suspend_one = irq_chip_suspend_one_parent; + pctrl->irq_chip.irq_resume_one = irq_chip_resume_one_parent; pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; From patchwork Mon Aug 10 11:20:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707331 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5BBB7109A for ; Mon, 10 Aug 2020 11:23:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40F61206E9 for ; Mon, 10 Aug 2020 11:23:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="nxaGG8Y4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726630AbgHJLW4 (ORCPT ); Mon, 10 Aug 2020 07:22:56 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:44288 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726587AbgHJLVu (ORCPT ); Mon, 10 Aug 2020 07:21:50 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597058509; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=KHtJaMwqw4OFU9lDgwQ9JJ7ac4zj7luu1qJVM1mOZyY=; b=nxaGG8Y4W0CV+jl1rHquj8KaXcpREJuVwZhIbefF7VW45ZF8xmUMA59kYl4KgQ/RxRoRc1eN nfog7ljsnYbQVOT8e5/iE8P5FelU4n6+R1VCL83FeUn9D+WMoSYQ0QoF6kKPgrMnEaHKxYrF Y5ectvD+KwaOVQ3D4cPU+z4cJbI= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n15.prod.us-west-2.postgun.com with SMTP id 5f312dcdc85a1092b00bb4d1 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 10 Aug 2020 11:21:49 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 584D7C433AD; Mon, 10 Aug 2020 11:21:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id B0A0AC43395; Mon, 10 Aug 2020 11:21:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B0A0AC43395 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 6/7] irqchip: qcom-pdc: Unmask wake up irqs during suspend Date: Mon, 10 Aug 2020 16:50:59 +0530 Message-Id: <1597058460-16211-7-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Douglas Anderson An interrupt that is masked but set for wakeup still needs to be able to wake up the system. Use the new irq_suspend_one() and irq_resume_one() callback to handle this by unmasking at the hardware level at suspend time and putting things back at resume time. Signed-off-by: Douglas Anderson Signed-off-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index c1c5dfa..dfcdfc5 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -3,6 +3,7 @@ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -38,6 +39,9 @@ struct pdc_pin_region { u32 cnt; }; +static DECLARE_BITMAP(pdc_wake_irqs, PDC_MAX_IRQS); +static DECLARE_BITMAP(pdc_disabled_irqs, PDC_MAX_IRQS); + static DEFINE_RAW_SPINLOCK(pdc_lock); static void __iomem *pdc_base; static struct pdc_pin_region *pdc_region; @@ -89,11 +93,51 @@ static void pdc_enable_intr(struct irq_data *d, bool on) raw_spin_unlock(&pdc_lock); } +static void qcom_pdc_irq_suspend_one(struct irq_data *d) +{ + if (d->hwirq == GPIO_NO_WAKE_IRQ) + return; + + if (test_bit(d->hwirq, pdc_wake_irqs) && + test_bit(d->hwirq, pdc_disabled_irqs)) { + /* + * Disabled interrupts that have wake enabled need to be able + * to wake us up from suspend. Unmask them now to enable + * this. + */ + pdc_enable_intr(d, true); + irq_chip_unmask_parent(d); + } +} + +static void qcom_pdc_irq_resume_one(struct irq_data *d) +{ + if (d->hwirq == GPIO_NO_WAKE_IRQ) + return; + + if (test_bit(d->hwirq, pdc_wake_irqs) && + test_bit(d->hwirq, pdc_disabled_irqs)) { + irq_chip_mask_parent(d); + pdc_enable_intr(d, false); + } +} + +static int qcom_pdc_gic_set_wake(struct irq_data *d, unsigned int on) +{ + if (on) + set_bit(d->hwirq, pdc_wake_irqs); + else + clear_bit(d->hwirq, pdc_wake_irqs); + + return irq_chip_set_wake_parent(d, on); +} + static void qcom_pdc_gic_disable(struct irq_data *d) { if (d->hwirq == GPIO_NO_WAKE_IRQ) return; + set_bit(d->hwirq, pdc_disabled_irqs); pdc_enable_intr(d, false); irq_chip_disable_parent(d); } @@ -103,6 +147,7 @@ static void qcom_pdc_gic_enable(struct irq_data *d) if (d->hwirq == GPIO_NO_WAKE_IRQ) return; + clear_bit(d->hwirq, pdc_disabled_irqs); pdc_enable_intr(d, true); irq_chip_enable_parent(d); } @@ -201,13 +246,15 @@ static struct irq_chip qcom_pdc_gic_chip = { .irq_unmask = qcom_pdc_gic_unmask, .irq_disable = qcom_pdc_gic_disable, .irq_enable = qcom_pdc_gic_enable, + .irq_set_wake = qcom_pdc_gic_set_wake, + .irq_suspend_one = qcom_pdc_irq_suspend_one, + .irq_resume_one = qcom_pdc_irq_resume_one, .irq_get_irqchip_state = qcom_pdc_gic_get_irqchip_state, .irq_set_irqchip_state = qcom_pdc_gic_set_irqchip_state, .irq_retrigger = irq_chip_retrigger_hierarchy, .irq_set_type = qcom_pdc_gic_set_type, .flags = IRQCHIP_MASK_ON_SUSPEND | - IRQCHIP_SET_TYPE_MASKED | - IRQCHIP_SKIP_SET_WAKE, + IRQCHIP_SET_TYPE_MASKED, .irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent, .irq_set_affinity = irq_chip_set_affinity_parent, }; From patchwork Mon Aug 10 11:21:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11707317 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6D6D6109A for ; Mon, 10 Aug 2020 11:22:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 55398206E9 for ; Mon, 10 Aug 2020 11:22:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Job7S8LU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726146AbgHJLWY (ORCPT ); Mon, 10 Aug 2020 07:22:24 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:45147 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726609AbgHJLVz (ORCPT ); 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Mon, 10 Aug 2020 11:21:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org ECA6DC433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init Date: Mon, 10 Aug 2020 16:51:00 +0530 Message-Id: <1597058460-16211-8-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Clear previous kernel's configuration during init by resetting interrupts in enable bank to zero. Suggested-by: Stephen Boyd Signed-off-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index dfcdfc5..80e0dfb 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -389,7 +389,8 @@ static const struct irq_domain_ops qcom_pdc_gpio_ops = { static int pdc_setup_pin_mapping(struct device_node *np) { - int ret, n; + int ret, n, i; + u32 irq_index, reg_index, val; n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); if (n <= 0 || n % 3) @@ -418,6 +419,15 @@ static int pdc_setup_pin_mapping(struct device_node *np) &pdc_region[n].cnt); if (ret) return ret; + + for (i = pdc_region[n].pin_base; i < pdc_region[n].pin_base + + pdc_region[n].cnt; i++) { + reg_index = i / 32; + irq_index = i % 32; + val = pdc_reg_read(IRQ_ENABLE_BANK, reg_index); + val &= ~BIT(irq_index); + pdc_reg_write(IRQ_ENABLE_BANK, reg_index, val); + } } return 0;