From patchwork Tue Aug 11 15:12:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11709329 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5DAC6159A for ; Tue, 11 Aug 2020 15:13:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45C862078E for ; Tue, 11 Aug 2020 15:13:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="kIG1M8fO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728859AbgHKPND (ORCPT ); Tue, 11 Aug 2020 11:13:03 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:48831 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728845AbgHKPNC (ORCPT ); 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Tue, 11 Aug 2020 16:12:59 +0100 (BST) Received: from eusmtrp1.samsung.com (unknown [182.198.249.138]) by eucas1p1.samsung.com (KnoxPortal) with ESMTPA id 20200811151259eucas1p19d1f6a21e46ac9382a89cd3d3cb0b6c8~qP3KS6FBt3049230492eucas1p1_; Tue, 11 Aug 2020 15:12:59 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20200811151259eusmtrp14d9a5a366111308363f3e66fd4d9324f~qP3KSPGBv0657606576eusmtrp1S; Tue, 11 Aug 2020 15:12:59 +0000 (GMT) X-AuditID: cbfec7f4-677ff7000000176d-42-5f32b57b63f7 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 75.F0.06314.B75B23F5; Tue, 11 Aug 2020 16:12:59 +0100 (BST) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20200811151258eusmtip1b8a1ea51e78d8003e6696c8f72839ad4~qP3JwOT_l3252832528eusmtip1t; Tue, 11 Aug 2020 15:12:58 +0000 (GMT) From: Sylwester Nawrocki To: linux-clk@vger.kernel.org Cc: tomasz.figa@gmail.com, cw00.choi@samsung.com, sboyd@kernel.org, mturquette@baylibre.com, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 1/2] clk: samsung: exynos5420: Add definition of clock ID for mout_sw_aclk_g3d Date: Tue, 11 Aug 2020 17:12:50 +0200 Message-Id: <20200811151251.31613-1-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLIsWRmVeSWpSXmKPExsWy7djP87rVW43iDRadl7TYOGM9q8X1L89Z LT723GO1uLxrDpvFjPP7mCzWHrnLbnHxlKvF4TftrBb/rm1ksVi16w+jA5fH+xut7B47Z91l 99i0qpPNo2/LKkaPz5vkAlijuGxSUnMyy1KL9O0SuDIm3znAXHCMreLSp5IGxlOsXYycHBIC JhJdX98B2VwcQgIrGCXOTNrCBOF8YZS49PccC4TzmVHi2uu7jDAtF242QbUsZ5SY1PWEDa7l y/l5TCBVbAKGEr1H+8A6RARkJW4d+wlWxCzQzCTxub+JBSQhLJAscb+1A6yBRUBV4umXZ2wg Nq+AtcSmHVfYIdbJS6zecIAZwn7PJnFmVwaE7SKxb/4kJghbWOLV8S1Q9TISpyf3gN0tIdDM KNGz+zY7hDOBUeL+8QVQT1hL3Dn3C2gbB9BJmhLrd+lDhB0ltl66xwoSlhDgk7jxVhAkzAxk Tto2nRkizCvR0SYEUa0i8XvVdKgTpCS6n/xngbA9JNr2rwOzhQRiJR5Ne8w4gVFuFsKuBYyM qxjFU0uLc9NTi43yUsv1ihNzi0vz0vWS83M3MQITxel/x7/sYNz1J+kQowAHoxIP74KJRvFC rIllxZW5hxglOJiVRHidzp6OE+JNSaysSi3Kjy8qzUktPsQozcGiJM5rvOhlrJBAemJJanZq akFqEUyWiYNTqoFRdfsxG/0dkw5cnrpY1/KuR8pbdtvF00zbl3LUNja8O62359Wui+fNDk5t +hf84WiTU3+Iscyrsis7/ru/fvLe0ayQ32lG0uqlV87kC1Y4R7IHvXuh//LFw68fU7O5Va+p n1U+cjVcTqVC7Ub2LL5qvvju1HPcJ2cW/zFjdHR9MN1NuXehS+d9JZbijERDLeai4kQAZP2x vhADAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsVy+t/xu7rVW43iDXZ/ZrXYOGM9q8X1L89Z LT723GO1uLxrDpvFjPP7mCzWHrnLbnHxlKvF4TftrBb/rm1ksVi16w+jA5fH+xut7B47Z91l 99i0qpPNo2/LKkaPz5vkAlij9GyK8ktLUhUy8otLbJWiDS2M9AwtLfSMTCz1DI3NY62MTJX0 7WxSUnMyy1KL9O0S9DIm3znAXHCMreLSp5IGxlOsXYycHBICJhIXbjYB2VwcQgJLGSU2bf7C 3MXIAZSQkpjfogRRIyzx51oXG4gtJPCJUWLBaVUQm03AUKL3aB8jiC0iICtx69hPNpA5zAK9 TBLt37ewgCSEBRIlFrW2MIHYLAKqEk+/PAMbxCtgLbFpxxV2iAXyEqs3HGCewMizgJFhFaNI amlxbnpusaFecWJucWleul5yfu4mRmBwbjv2c/MOxksbgw8xCnAwKvHwLphoFC/EmlhWXJl7 iFGCg1lJhNfp7Ok4Id6UxMqq1KL8+KLSnNTiQ4ymQMsnMkuJJucDIyevJN7Q1NDcwtLQ3Njc 2MxCSZy3Q+BgjJBAemJJanZqakFqEUwfEwenVAPj5LlJ/Ec8j0s63zm57rCviEHlodXbF0Zt jiz/Jrln4QuZBNezda89uWc/fCKauPrRRMPAT9uuG/FYPF9b9H+BqNXy/bWLnb3NJt69N2nS V9bLx06qHHt9dH0hC/8cAwHRzYGFxxo7BWtmiL1YydD7SXhX+5Nb67dczl/kXcEb/qLgFNeT 4z/77ZRYijMSDbWYi4oTAef0sixkAgAA X-CMS-MailID: 20200811151259eucas1p19d1f6a21e46ac9382a89cd3d3cb0b6c8 X-Msg-Generator: CA X-RootMTR: 20200811151259eucas1p19d1f6a21e46ac9382a89cd3d3cb0b6c8 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200811151259eucas1p19d1f6a21e46ac9382a89cd3d3cb0b6c8 References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds ID for the mout_sw_aclk_g3d (SW_CLKMUX_ACLK_G3D) clock, mostly for internal use in the CMU driver. It will allow to avoid the __clk_lookup() call when setting up the clock during the clock provider initialization. Signed-off-by: Sylwester Nawrocki --- include/dt-bindings/clock/exynos5420.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 02d5ac4..ff917c8 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -230,6 +230,7 @@ #define CLK_MOUT_USER_MAU_EPLL 659 #define CLK_MOUT_SCLK_SPLL 660 #define CLK_MOUT_MX_MSPLL_CCORE_PHY 661 +#define CLK_MOUT_SW_ACLK_G3D 662 /* divider clocks */ #define CLK_DOUT_PIXEL 768 From patchwork Tue Aug 11 15:12:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11709333 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97D9C618 for ; Tue, 11 Aug 2020 15:13:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7E29920782 for ; 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bh=Qz+hV2GCRttQ2uizAY0tcxIPtMSHzsO775+uHnq3Kxk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F2j4W9yx2PCx9pLnbCoh6Lh2p8+qaddJIEqNdrX3jIikZGBJCpJMnOrm2r/Bfp3jg yawaoHEHoEAGbmMMwgu+mT43hYuwFKMLQhV2o53HfkG6U7n8ECBpLV9UJ36i4PY0Mc fUq54ND3+CVvzP8+AkVx7BTsg+z0ci8JZjeBT8KY= Received: from eusmges2new.samsung.com (unknown [203.254.199.244]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20200811151304eucas1p23950b7066be8aaed351107cf59a74cff~qP3PRrdzY0245302453eucas1p2H; Tue, 11 Aug 2020 15:13:04 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges2new.samsung.com (EUCPMTA) with SMTP id 0F.47.05997.085B23F5; Tue, 11 Aug 2020 16:13:04 +0100 (BST) Received: from eusmtrp1.samsung.com (unknown [182.198.249.138]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20200811151304eucas1p2c113097f89229b51bb55329c38990830~qP3OzmPIu2075420754eucas1p2w; Tue, 11 Aug 2020 15:13:04 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20200811151304eusmtrp1142d935c6c7ee63f0371c2c7a19af72c~qP3Oy6Mad0657606576eusmtrp1j; Tue, 11 Aug 2020 15:13:04 +0000 (GMT) X-AuditID: cbfec7f4-65dff7000000176d-51-5f32b580f61d Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 38.F0.06314.F75B23F5; Tue, 11 Aug 2020 16:13:03 +0100 (BST) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20200811151303eusmtip1684539202febbc9b0d0e9e3862df5b7b~qP3OUuQod3160231602eusmtip1G; Tue, 11 Aug 2020 15:13:03 +0000 (GMT) From: Sylwester Nawrocki To: linux-clk@vger.kernel.org Cc: tomasz.figa@gmail.com, cw00.choi@samsung.com, sboyd@kernel.org, mturquette@baylibre.com, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 2/2] clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocks Date: Tue, 11 Aug 2020 17:12:51 +0200 Message-Id: <20200811151251.31613-2-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811151251.31613-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupileLIzCtJLcpLzFFi42LZduznOd2GrUbxBs+vyVhsnLGe1eL6l+es Fh977rFaXN41h81ixvl9TBZrj9xlt7h4ytXi8Jt2Vot/1zayWKza9YfRgcvj/Y1Wdo+ds+6y e2xa1cnm0bdlFaPH501yAaxRXDYpqTmZZalF+nYJXBld3UvYC24JVXyY/pOlgXE7fxcjJ4eE gInE8VsNjF2MXBxCAisYJdZNWscK4XxhlHj8ci4zhPOZUeJO+2VGmJZL9ycwQSSWM0r8X7qf Da7lzoP9rCBVbAKGEr1H+8A6RARkJW4d+wlWxCzQzCTxub+JpYuRg0NYIFniz29XkBoWAVWJ i0efM4PYvALWErs67rBDbJOXWL3hAFicU8BG4szfm2DHSgi0s0u8/X2dGaLIReLsjGWsELaw xKvjW6CaZSROT+5hgWhoZpTo2X2bHcKZwChx//gCqIesJe6c+8UGchGzgKbE+l36EGFHiUuT 37KChCUE+CRuvBUECTMDmZO2TWeGCPNKdLQJQVSrSPxeNZ0JwpaS6H7ynwWixEPi1zJPSPj0 M0rs6HvLPIFRfhbCrgWMjKsYxVNLi3PTU4uN8lLL9YoTc4tL89L1kvNzNzECU8jpf8e/7GDc 9SfpEKMAB6MSD++CiUbxQqyJZcWVuYcYJTiYlUR4nc6ejhPiTUmsrEotyo8vKs1JLT7EKM3B oiTOa7zoZayQQHpiSWp2ampBahFMlomDU6qBsVbx7lr/q792qPFej9Od0L3eau2LzXN2Gsh1 e/zfc2D7Co4Kq2OF/793mamHba6zzzyRXuz80cPXQfWSuyWHos2fJRHC/k4ii78Z1tbtl0s/ 4aZnuzu0dpZa8dmFVXu5Rdutt/x/KiQX7CTFqz3xTWHV+v5lzO6dKx7wlok7Mtb/fiZ55OwC JZbijERDLeai4kQA6mouPx0DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsVy+t/xu7r1W43iDbquW1lsnLGe1eL6l+es Fh977rFaXN41h81ixvl9TBZrj9xlt7h4ytXi8Jt2Vot/1zayWKza9YfRgcvj/Y1Wdo+ds+6y e2xa1cnm0bdlFaPH501yAaxRejZF+aUlqQoZ+cUltkrRhhZGeoaWFnpGJpZ6hsbmsVZGpkr6 djYpqTmZZalF+nYJehld3UvYC24JVXyY/pOlgXE7fxcjJ4eEgInEpfsTmLoYuTiEBJYySmw4 0sfaxcgBlJCSmN+iBFEjLPHnWhcbRM0nRomfG46zgiTYBAwleo/2MYLYIgKyEreO/QQrYhbo ZZJo/76FBSQhLJAocfdEB5jNIqAqcfHoc2YQm1fAWmJXxx12iA3yEqs3HACLcwrYSJz5exNs qBBQzczeU+wTGPkWMDKsYhRJLS3OTc8tNtQrTswtLs1L10vOz93ECAzobcd+bt7BeGlj8CFG AQ5GJR7eBRON4oVYE8uKK3MPMUpwMCuJ8DqdPR0nxJuSWFmVWpQfX1Sak1p8iNEU6KiJzFKi yfnAaMsriTc0NTS3sDQ0NzY3NrNQEuftEDgYIySQnliSmp2aWpBaBNPHxMEp1cA42YzL/ujj WbaBpq94dKcLsoUys29b4vH+zRK7Z3InLvzsuF4qOt1Y/47NZbO2lI6V9z4eLvnQK7T+MYd/ xtOX/4UORf6b5MR+imP6OUM+M/8MAc21yxdqe2s85qsTuXe+2I5TsnFKwC//nE1/Qx0kbX2q ugX2cr+7ecuU+9zZ6NoKx5Q3OcJKLMUZiYZazEXFiQBh8deXfgIAAA== X-CMS-MailID: 20200811151304eucas1p2c113097f89229b51bb55329c38990830 X-Msg-Generator: CA X-RootMTR: 20200811151304eucas1p2c113097f89229b51bb55329c38990830 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200811151304eucas1p2c113097f89229b51bb55329c38990830 References: <20200811151251.31613-1-s.nawrocki@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds a clk ID to the mout_sw_aclk_g3d clk definition so related clk pointer gets cached in the driver's private data and can be used later instead of a __clk_lookup() call. With that we have all clocks used in the clk_prepare_enable() calls in the clk provider init callback cached in clk_data.hws[] and we can reference the clk pointers directly rather than using __clk_lookup() with global names. Signed-off-by: Sylwester Nawrocki Reported-by: Marek Szyprowski Signed-off-by: Sylwester Nawrocki --- Changes for v2: - added missing part of the patch lost during rebase of the previous version --- drivers/clk/samsung/clk-exynos5420.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index bd62087..f76ebd6 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -712,8 +712,8 @@ static const struct samsung_mux_clock exynos5x_mux_clks[] __initconst = { SRC_TOP12, 8, 1), MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p, SRC_TOP12, 12, 1), - MUX_F(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1, - CLK_SET_RATE_PARENT, 0), + MUX_F(CLK_MOUT_SW_ACLK_G3D, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, + SRC_TOP12, 16, 1, CLK_SET_RATE_PARENT, 0), MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p, SRC_TOP12, 20, 1), MUX(CLK_MOUT_SW_ACLK300, "mout_sw_aclk300_disp1", @@ -1560,6 +1560,7 @@ static void __init exynos5x_clk_init(struct device_node *np, enum exynos5x_soc soc) { struct samsung_clk_provider *ctx; + struct clk_hw **hws; if (np) { reg_base = of_iomap(np, 0); @@ -1649,17 +1650,18 @@ static void __init exynos5x_clk_init(struct device_node *np, exynos5x_subcmus); } + hws = ctx->clk_data.hws; /* * Keep top part of G3D clock path enabled permanently to ensure * that the internal busses get their clock regardless of the * main G3D clock enablement status. */ - clk_prepare_enable(__clk_lookup("mout_sw_aclk_g3d")); + clk_prepare_enable(hws[CLK_MOUT_SW_ACLK_G3D]->clk); /* * Keep top BPLL mux enabled permanently to ensure that DRAM operates * properly. */ - clk_prepare_enable(__clk_lookup("mout_bpll")); + clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk); samsung_clk_of_add_provider(np, ctx); }