From patchwork Fri Oct 19 17:20:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 10649875 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BB4E112B for ; Fri, 19 Oct 2018 17:20:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1222E2851D for ; Fri, 19 Oct 2018 17:20:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1039D28524; Fri, 19 Oct 2018 17:20:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9C6A22852B for ; Fri, 19 Oct 2018 17:20:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D06B893C9; Fri, 19 Oct 2018 17:20:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 43F79893C9 for ; Fri, 19 Oct 2018 17:20:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Oct 2018 10:20:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,400,1534834800"; d="scan'208";a="82840703" Received: from rdvivi-vienna.jf.intel.com ([10.7.196.56]) by orsmga008.jf.intel.com with ESMTP; 19 Oct 2018 10:20:45 -0700 From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 19 Oct 2018 10:20:42 -0700 Message-Id: <20181019172042.12939-1-rodrigo.vivi@intel.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Simplify has_sagv X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Lucas De Marchi , Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Let's add a platform has_sagv instead of having a full function that handle platform by platform. The specially case for SKL for not controlled sagv is already taken care inside intel_enable_sagv, so there's no need to duplicate the check here. v2: Go one step further and remove skl special case. (Jani) Cc: Jani Nikula Cc: Lucas De Marchi Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 20 +++----------------- 4 files changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3017ef037fed..8eab6bdff8a4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2650,6 +2650,8 @@ intel_info(const struct drm_i915_private *dev_priv) #define HAS_DDI(dev_priv) ((dev_priv)->info.has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) ((dev_priv)->info.has_fpga_dbg) #define HAS_PSR(dev_priv) ((dev_priv)->info.has_psr) +#define HAS_SAGV(dev_priv) ((dev_priv)->info.has_sagv && \ + dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED) #define HAS_RC6(dev_priv) ((dev_priv)->info.has_rc6) #define HAS_RC6p(dev_priv) ((dev_priv)->info.has_rc6p) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 0a05cc7ace14..21ca9917b86e 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -465,6 +465,7 @@ static const struct intel_device_info intel_cherryview_info = { .has_csr = 1, \ .has_guc = 1, \ .has_ipc = 1, \ + .has_sagv = 1, \ .ddb_size = 896 #define SKL_PLATFORM \ diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index af7002640cdf..e77c8b62783f 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -117,6 +117,7 @@ enum intel_ppgtt { func(hws_needs_physical); \ func(overlay_needs_physical); \ func(supports_tv); \ + func(has_sagv); \ func(has_ipc); #define GEN_MAX_SLICES (6) /* CNL upper bound */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 67a4d0735291..09c21f6151fd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3609,20 +3609,6 @@ static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state) return false; } -static bool -intel_has_sagv(struct drm_i915_private *dev_priv) -{ - if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || - IS_CANNONLAKE(dev_priv) || IS_ICELAKE(dev_priv)) - return true; - - if (IS_SKYLAKE(dev_priv) && - dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED) - return true; - - return false; -} - /* * SAGV dynamically adjusts the system agent voltage and clock frequencies * depending on power and performance requirements. The display engine access @@ -3639,7 +3625,7 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) { int ret; - if (!intel_has_sagv(dev_priv)) + if (!HAS_SAGV(dev_priv)) return 0; if (dev_priv->sagv_status == I915_SAGV_ENABLED) @@ -3676,7 +3662,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) { int ret; - if (!intel_has_sagv(dev_priv)) + if (!HAS_SAGV(dev_priv)) return 0; if (dev_priv->sagv_status == I915_SAGV_DISABLED) @@ -3721,7 +3707,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state) int level, latency; int sagv_block_time_us; - if (!intel_has_sagv(dev_priv)) + if (!HAS_SAGV(dev_priv)) return false; if (IS_GEN9(dev_priv))