From patchwork Fri Aug 14 13:41:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714611 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BADD4739 for ; Fri, 14 Aug 2020 13:42:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A39FB20838 for ; Fri, 14 Aug 2020 13:42:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WFnQ7f8g" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728094AbgHNNmL (ORCPT ); Fri, 14 Aug 2020 09:42:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726593AbgHNNmI (ORCPT ); Fri, 14 Aug 2020 09:42:08 -0400 Received: from mail-ej1-x644.google.com (mail-ej1-x644.google.com [IPv6:2a00:1450:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C52E5C061384; Fri, 14 Aug 2020 06:42:07 -0700 (PDT) Received: by mail-ej1-x644.google.com with SMTP id a26so9996207ejc.2; Fri, 14 Aug 2020 06:42:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xh728BF/eYFLr8qT6FFw5npDjKdJyvTy3InaLGSMaVo=; b=WFnQ7f8gIKGQFFMYBNfchwpC7MnYBe4OE7NDeZ+dKvCoYAiVynrCr7CwfbmfaJUXkp TfzGfnUAneDOlZbVgnOtSgmwH489FdElTxWDbTmWA47YlGw1p/Hr60mST86drPvqO0kK 6cI7kKjg+3yXEPETjq9e18Qlf+97Kcr9Wia0SV6SJhAECM1qwSvuk+JwIcSV40XmxoCQ DUcAyiUUnS5LO/e5fSyTRl5cEVYw0V9FmQel4WZja1D2qumGRP/ySLjvU55jOjKbpOHm P9+1bi5CfhSVKYDdD995ABrZ9Mz6SRH5hVrg0bmcQDzQP3Tjn3d6scBtiKexDN0/Fzeb Z3jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xh728BF/eYFLr8qT6FFw5npDjKdJyvTy3InaLGSMaVo=; b=toxHWG878YoCqBrE84Ezq3mwMMMBWC6TkO/JELJpzNqplJW+zmwf2IEmN+iK0AO/g4 ekHAfSNU5NgDCkJo+Zjlf4d5FrTO8dmiMWqZ2/b6DJHLBtqBBFkrFbeD9UcUoqOxk2+2 8dzmBcOVB7H2flDu90h3FIW1bvvZnSvgVJ/QLVZU0svIAjQZ7nCXRxIGSwfnDI8MvWvH IXMV5fjocUQhrJKN1B/pK7MPD6fvR2ihcBkzLbqozMu4JgKU/29GX5WQZqm1ic7/Wrh6 cZLnlQtmBW31TIcMwDLOIWafps+yzM0E2eLOPqhGqDA8VMSyBs3OxyCSI5PaUIl9mnge 2R+w== X-Gm-Message-State: AOAM532HtiaBTR+OTMEF9xjk/WtV+rDO+VWY2x94TYqf6RxzwDRRG9TA LvdZEjUNRM4OT2rqmRJSXh4= X-Google-Smtp-Source: ABdhPJysV33cH4agZBarQgQREVnggrouAFSA9tLnaRmEbLAq8W3Fqry1fWlMNSBYFMWuh1GL60/gtw== X-Received: by 2002:a17:906:8286:: with SMTP id h6mr2369540ejx.341.1597412526421; Fri, 14 Aug 2020 06:42:06 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:05 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 1/8] drivers: thermal: tsens: use get_temp for tsens_valid Date: Fri, 14 Aug 2020 15:41:15 +0200 Message-Id: <20200814134123.14566-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use the driver get_temp function instead of force to use the generic get temp function. This is needed as tsens v0 version use a custom function to get the real temperature. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 9af6f71ab640..9fe9a2b26705 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -580,7 +580,6 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { struct tsens_priv *priv = s->priv; int hw_id = s->hw_id; - u32 temp_idx = LAST_TEMP_0 + hw_id; u32 valid_idx = VALID_0 + hw_id; u32 valid; int ret; @@ -600,9 +599,9 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) } /* Valid bit is set, OK to read the temperature */ - *temp = tsens_hw_to_mC(s, temp_idx); + ret = priv->ops->get_temp(s, temp); - return 0; + return ret; } int get_temp_common(const struct tsens_sensor *s, int *temp) From patchwork Fri Aug 14 13:41:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714613 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36756618 for ; Fri, 14 Aug 2020 13:42:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 195AC208B3 for ; Fri, 14 Aug 2020 13:42:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Mib0AldJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728132AbgHNNmR (ORCPT ); Fri, 14 Aug 2020 09:42:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728101AbgHNNmM (ORCPT ); Fri, 14 Aug 2020 09:42:12 -0400 Received: from mail-ej1-x643.google.com (mail-ej1-x643.google.com [IPv6:2a00:1450:4864:20::643]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D09BC061384; Fri, 14 Aug 2020 06:42:11 -0700 (PDT) Received: by mail-ej1-x643.google.com with SMTP id t10so9965325ejs.8; Fri, 14 Aug 2020 06:42:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5h+RCIRVJpQHfbahCZeVcIadWa9PrkkZS82RzJ9FbQs=; b=Mib0AldJ7qsLE5e88f0cpzE2Rf1+uWt6LtZgvjAQNZmZuXZ1YVwKfD+BzqUV7n1caE JdtHzzIK94gulTCui7Np5JBpf962ZLQKUSgxIZSlNYVR5iuGAGlYLA9hv+07bTFWqtQK 84QQUu6B1HO64SgkqY53qJdSxEYxwabgs3Luh0bQa2gCYInUgBA85yEQQ0YeVzjatUoB ArBB5NQ12Gw9Wmp9Gnj+RYnLBHStNs3iN02SgoGAXp5RZdTlESduOzt+uxFve7r2jGF4 zRhxNylAMfiJepbuq7cGzjEor3UNxOnkYA9VOZXf2y1LEsewnSXWAD8sPZp5J5MC/u90 xYaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5h+RCIRVJpQHfbahCZeVcIadWa9PrkkZS82RzJ9FbQs=; b=oixcQD9bZwD6latVmfbXdepBl68Jx7nQTGlEimYmDSxwBdvjIm5ul1eNlON7LqjGO/ GMttqOJWZ+nOSOkwAHEz71QCFtYERsahUKQYBzvIw98GWXJ6E3lee7ZZi+H3F3Q02r9K 1gU2OqZhnI0jyonD+FUlkI8rjAxR8nJNVd8rsb3yo0ZS7C6ojM6fp6qxfxBJrc2Fwkn0 j94KN7BFK1C8IqiUVOk2cHN3i+0l/ii3HYzOji739OeQTKnGKICKRLMmHO5C5Yu+UwXj UdyomHTEhVh5ghqE6w9N65SGpsPXa1Yvhbx0PesSbBJDg9RHof7mP2qQACQLYTPRDJ0P GMjQ== X-Gm-Message-State: AOAM533Gj7hrRhPG7xhUU4BB+DJwpwamDdBRxgjaUkFRkumRFXDd9jwa q6wQIiMmOaY1LOcRz0p81mE= X-Google-Smtp-Source: ABdhPJz78nZAwLSIYCaf8ulAm9IC0gKR/R4HmxfmWNPCtx8/ln1kSlQQSgu2wGrkyAJog8XHfPeaOw== X-Received: by 2002:a17:906:ae12:: with SMTP id le18mr2492237ejb.38.1597412530124; Fri, 14 Aug 2020 06:42:10 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:09 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 2/8] drivers: thermal: tsens: Add VER_0 tsens version Date: Fri, 14 Aug 2020 15:41:16 +0200 Message-Id: <20200814134123.14566-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org VER_0 is used to describe device based on tsens version before v0.1. These device are devices based on msm8960 for example apq8064 or ipq806x. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens.c | 122 +++++++++++++++++++++++++++++++---- drivers/thermal/qcom/tsens.h | 7 +- 2 files changed, 114 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 9fe9a2b26705..965c4799918a 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -516,6 +516,15 @@ static irqreturn_t tsens_irq_thread(int irq, void *data) dev_dbg(priv->dev, "[%u] %s: no violation: %d\n", hw_id, __func__, temp); } + + if (tsens_version(priv) < VER_0_1) { + /* Constraint: There is only 1 interrupt control register for all + * 11 temperature sensor. So monitoring more than 1 sensor based + * on interrupts will yield inconsistent result. To overcome this + * issue we will monitor only sensor 0 which is the master sensor. + */ + break; + } } return IRQ_HANDLED; @@ -531,6 +540,13 @@ static int tsens_set_trips(void *_sensor, int low, int high) int high_val, low_val, cl_high, cl_low; u32 hw_id = s->hw_id; + if (tsens_version(priv) < VER_0_1) { + /* Pre v0.1 IP had a single register for each type of interrupt + * and thresholds + */ + hw_id = 0; + } + dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n", hw_id, __func__, low, high); @@ -584,18 +600,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) u32 valid; int ret; - ret = regmap_field_read(priv->rf[valid_idx], &valid); - if (ret) - return ret; - while (!valid) { - /* Valid bit is 0 for 6 AHB clock cycles. - * At 19.2MHz, 1 AHB clock is ~60ns. - * We should enter this loop very, very rarely. - */ - ndelay(400); + /* VER_0 doesn't have VALID bit */ + if (tsens_version(priv) >= VER_0_1) { ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; + while (!valid) { + /* Valid bit is 0 for 6 AHB clock cycles. + * At 19.2MHz, 1 AHB clock is ~60ns. + * We should enter this loop very, very rarely. + */ + ndelay(400); + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; + } } /* Valid bit is set, OK to read the temperature */ @@ -763,6 +782,10 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } + /* VER_0 have only tm_map */ + if (!priv->srot_map) + priv->srot_map = priv->tm_map; + if (tsens_version(priv) > VER_0_1) { for (i = VER_MAJOR; i <= VER_STEP; i++) { priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map, @@ -781,6 +804,10 @@ int __init init_common(struct tsens_priv *priv) ret = PTR_ERR(priv->rf[TSENS_EN]); goto err_put_device; } + /* in VER_0 TSENS need to be explicitly enabled */ + if (tsens_version(priv) == VER_0) + regmap_field_write(priv->rf[TSENS_EN], 1); + ret = regmap_field_read(priv->rf[TSENS_EN], &enabled); if (ret) goto err_put_device; @@ -803,6 +830,61 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } + priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->tm_map, + priv->fields[TSENS_EN]); + if (IS_ERR(priv->rf[TSENS_EN])) { + ret = PTR_ERR(priv->rf[TSENS_EN]); + goto err_put_device; + } + + priv->rf[TSENS_SW_RST] = devm_regmap_field_alloc( + dev, priv->tm_map, priv->fields[TSENS_EN]); + if (IS_ERR(priv->rf[TSENS_EN])) { + ret = PTR_ERR(priv->rf[TSENS_EN]); + goto err_put_device; + } + + priv->rf[LOW_INT_CLEAR_0] = devm_regmap_field_alloc( + dev, priv->tm_map, priv->fields[LOW_INT_CLEAR_0]); + if (IS_ERR(priv->rf[LOW_INT_CLEAR_0])) { + ret = PTR_ERR(priv->rf[LOW_INT_CLEAR_0]); + goto err_put_device; + } + + priv->rf[UP_INT_CLEAR_0] = devm_regmap_field_alloc( + dev, priv->tm_map, priv->fields[UP_INT_CLEAR_0]); + if (IS_ERR(priv->rf[UP_INT_CLEAR_0])) { + ret = PTR_ERR(priv->rf[UP_INT_CLEAR_0]); + goto err_put_device; + } + + /* VER_0 require to set MIN and MAX THRESH */ + if (tsens_version(priv) < VER_0_1) { + priv->rf[MIN_THRESH_0] = devm_regmap_field_alloc( + dev, priv->tm_map, priv->fields[MIN_THRESH_0]); + if (IS_ERR(priv->rf[MIN_THRESH_0])) { + ret = PTR_ERR(priv->rf[MIN_THRESH_0]); + goto err_put_device; + } + + priv->rf[MAX_THRESH_0] = devm_regmap_field_alloc( + dev, priv->tm_map, priv->fields[MAX_THRESH_0]); + if (IS_ERR(priv->rf[MAX_THRESH_0])) { + ret = PTR_ERR(priv->rf[MAX_THRESH_0]); + goto err_put_device; + } + + regmap_field_write(priv->rf[MIN_THRESH_0], 0); + regmap_field_write(priv->rf[MAX_THRESH_0], 120000); + } + + priv->rf[TRDY] = + devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]); + if (IS_ERR(priv->rf[TRDY])) { + ret = PTR_ERR(priv->rf[TRDY]); + goto err_put_device; + } + /* This loop might need changes if enum regfield_ids is reordered */ for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) { for (i = 0; i < priv->feat->max_sensors; i++) { @@ -856,7 +938,11 @@ int __init init_common(struct tsens_priv *priv) } spin_lock_init(&priv->ul_lock); - tsens_enable_irq(priv); + + /* VER_0 interrupt doesn't need to be enabled */ + if (tsens_version(priv) >= VER_0_1) + tsens_enable_irq(priv); + tsens_debug_init(op); err_put_device: @@ -952,10 +1038,18 @@ static int tsens_register_irq(struct tsens_priv *priv, char *irqname, if (irq == -ENXIO) ret = 0; } else { - ret = devm_request_threaded_irq(&pdev->dev, irq, - NULL, thread_fn, - IRQF_ONESHOT, - dev_name(&pdev->dev), priv); + /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */ + if (tsens_version(priv) > VER_0) + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + thread_fn, IRQF_ONESHOT, + dev_name(&pdev->dev), + priv); + else + ret = devm_request_threaded_irq(&pdev->dev, irq, + thread_fn, NULL, + IRQF_TRIGGER_RISING, + dev_name(&pdev->dev), + priv); if (ret) dev_err(&pdev->dev, "%s: failed to get irq\n", __func__); diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 59d01162c66a..f1120791737c 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -25,7 +25,8 @@ struct tsens_priv; /* IP version numbers in ascending order */ enum tsens_ver { - VER_0_1 = 0, + VER_0 = 0, + VER_0_1, VER_1_X, VER_2_X, }; @@ -441,6 +442,10 @@ enum regfield_ids { CRIT_THRESH_14, CRIT_THRESH_15, + /* VER_0 MIN MAX THRESH */ + MIN_THRESH_0, + MAX_THRESH_0, + /* WATCHDOG */ WDOG_BARK_STATUS, WDOG_BARK_CLEAR, From patchwork Fri Aug 14 13:41:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714641 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25DAA138C for ; Fri, 14 Aug 2020 13:43:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0DDBB208B3 for ; Fri, 14 Aug 2020 13:43:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="M/+CI6Qz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726196AbgHNNnm (ORCPT ); Fri, 14 Aug 2020 09:43:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728121AbgHNNmQ (ORCPT ); Fri, 14 Aug 2020 09:42:16 -0400 Received: from mail-ej1-x643.google.com (mail-ej1-x643.google.com [IPv6:2a00:1450:4864:20::643]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23D55C061384; Fri, 14 Aug 2020 06:42:14 -0700 (PDT) Received: by mail-ej1-x643.google.com with SMTP id f24so9974793ejx.6; Fri, 14 Aug 2020 06:42:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y5LsTNwKCh6Al0zyRb/0ncxD6eVljVyNGABrxdC37vw=; b=M/+CI6Qz8KQWTsd+kGT/uM1Ni+vtIOUtSD0VzLrUy7jhmcmBF6vc3Im9cEhKAmwrAr TOz6CQ0fs3eE52vbtQAbhVLy+evGIdQvb7KWHdhPKInJzG6B5sdSiQy2JBPhlRLrleFR Ny4ur+eKD+UwVj+laCYLqG7ZjeikH2c+GtjKOHLKMLOy24BtvxNKRA9kv2lcsNbd01qQ CeCGgX/vkEfK1lP9Sj7hnwmtfV/2F3y/z2rTpM9m0ROQBXq44eEBNcPTklNcZ3WTMOyl R9G3wHJGj9RChHKYfhYuxUaBHoc91H/0XvdJktKOaajr6maohGp8jhhzH2APDclbesd6 dtkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y5LsTNwKCh6Al0zyRb/0ncxD6eVljVyNGABrxdC37vw=; b=W0d4jLQLGUZNGaxXWvrZQrK6+yLwa7i/VIOmvcKD8Swajgx0JMwnhKlmwvMZ0hJuRk SwVuwDTjGpGbDlfVYm2Fa8/9BcIqjzXzbsb9HcjpoiiUHb90PT0CLtzTnlFvzXVIOpQw qRcFZGzGnWb3kpcTwCirvkpDpqjvSamXO5mOSNUQHWlRL7JHnCrjy+clqdu+G50ARCdc Zr4pGIg/c6mlY6KWchcsZNKyAAMXwv2RVRrRoPD7S644GQiQDj+Cq6Nx/XdC5G/L6Hcx Ed7zSy2sf6Nrt70hJABNWSm1Hx7ZPvOhFejNpu+1OwybyVMvMvg7vN1uzY3tVz0jZAdO sgDA== X-Gm-Message-State: AOAM531RqhnLv1CtkNYch/3z2t/AP9KRQW9XrxOf9cpbac1mo8Gbze2O e+2J7ifCGf0DSuCP1mMF5Jk= X-Google-Smtp-Source: ABdhPJxfIBt9ouygjbXVOpv+/kkXwUijBEc/K2LJ1qUFsegGnfsEs0g0AG+c5H+KdeEoY4UrAF3vuA== X-Received: by 2002:a17:906:cb8c:: with SMTP id mf12mr2456605ejb.3.1597412533495; Fri, 14 Aug 2020 06:42:13 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:12 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Amit Kucheria , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 3/8] drivers: thermal: tsens: Convert msm8960 to reg_field Date: Fri, 14 Aug 2020 15:41:17 +0200 Message-Id: <20200814134123.14566-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert msm9860 driver to reg_field to use the init_common function. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens-8960.c | 74 +++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 2a28a5af209e..cb3611299e8f 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -56,6 +56,18 @@ #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 +#define S0_STATUS_OFF 0x3628 +#define S1_STATUS_OFF 0x362c +#define S2_STATUS_OFF 0x3630 +#define S3_STATUS_OFF 0x3634 +#define S4_STATUS_OFF 0x3638 +#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */ +#define S6_STATUS_OFF 0x3668 +#define S7_STATUS_OFF 0x366c +#define S8_STATUS_OFF 0x3670 +#define S9_STATUS_OFF 0x3674 +#define S10_STATUS_OFF 0x3678 + static int suspend_8960(struct tsens_priv *priv) { int ret; @@ -269,6 +281,66 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp) return -ETIMEDOUT; } +static struct tsens_features tsens_8960_feat = { + .ver_major = VER_0, + .crit_int = 0, + .adc = 1, + .srot_split = 0, + .max_sensors = 11, +}; + +static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* No VERSION information */ + + /* CNTL */ + [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0), + [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1), + /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */ + [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + /* NO INTERRUPT ENABLE */ + + /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */ + [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7), + [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15), + [MIN_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 16, 23), + [MAX_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31), + + /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */ + /* 1 == clear, 0 == normal operation */ + [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9), + [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10), + + /* NO CRITICAL INTERRUPT SUPPORT on 8960 */ + + /* Sn_STATUS */ + [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7), + [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7), + [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7), + [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7), + [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7), + [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7), + [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7), + [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7), + [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7), + [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7), + [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7), + + /* No VALID field on 8960 */ + /* TSENS_INT_STATUS bits: 1 == threshold violated */ + [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0), + [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1), + [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2), + /* No CRITICAL field on 8960 */ + [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7), +}; + static const struct tsens_ops ops_8960 = { .init = init_8960, .calibrate = calibrate_8960, @@ -282,4 +354,6 @@ static const struct tsens_ops ops_8960 = { struct tsens_plat_data data_8960 = { .num_sensors = 11, .ops = &ops_8960, + .feat = &tsens_8960_feat, + .fields = tsens_8960_regfields, }; From patchwork Fri Aug 14 13:41:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714617 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 98D05739 for ; Fri, 14 Aug 2020 13:42:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 804652068E for ; Fri, 14 Aug 2020 13:42:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="XT7UNxnp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728226AbgHNNmY (ORCPT ); Fri, 14 Aug 2020 09:42:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728134AbgHNNmS (ORCPT ); Fri, 14 Aug 2020 09:42:18 -0400 Received: from mail-ed1-x541.google.com (mail-ed1-x541.google.com [IPv6:2a00:1450:4864:20::541]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECB19C061385; Fri, 14 Aug 2020 06:42:17 -0700 (PDT) Received: by mail-ed1-x541.google.com with SMTP id w17so6832536edt.8; Fri, 14 Aug 2020 06:42:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=m3u8FPkwBGURpUG4O0zZuD07e039HFT1NOBLzc7aW0Q=; b=XT7UNxnptaTC/K8xFgYOZWfHk+VNHPEYxDwcltkdNAbm9yPW2vbNsN720H1e4lyTT5 tgkmWc5luW0PuFYYCknIEFVYZ9DVo+BkCaaDzJFuXAq6qBKPj9mSzlrNcG0t2nNWXCIw pQpfWe2vY/tdar2GIwtBNI4udSjN48rpxNL0im8w1PcHl4zvZj/Dslf4gJsNKQDVxe1X 0qNSNfSWdLF2L6YWo5yl3AW8qzNzojxCL1ez9CAn9X46NuAlkp/0C24nzXyhuZI0zv19 N5vr0SladiuWqgIKKl3PCZIUZr2RLJfNjxLVRfWDQt8DKMwrpcz+I+WZrxXhymvvl/AV gw4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m3u8FPkwBGURpUG4O0zZuD07e039HFT1NOBLzc7aW0Q=; b=OV1zlFQV0QxJlSv+/oWj6KdOFCD6DkrtO7uBQ6UApW5OnKnwam78XWwPGieZVS1NpL R7UidkRKQNSrlV6rAPKa7yXttwpDc8XaF8uUMehdYFsk3jWWF0RrNdhi7k08DYazjlfP 5wF/eeqIsr40CxSD/vdaL0mdH0af43CeQV1cstfOdCvQx5D2UQEsoNUDCZ4Oe7Cz206u 5aXwZTJHO4dIiMLqnDMCer9BcIi97jgZBNAV84JiA0EjzSREGl+VgHjeVTrx/K/m8JBY ciCfJGnocq++h8jqEd5YZ5uX6oABRlHJVzzUYU7ZDcAaD3Lm22sgkkkTbwzegTEVzFZc R1hg== X-Gm-Message-State: AOAM530e2zdCRk/IjT+cqn+SsZd0uPdcsnRzbcoCyNMbTAPkrf/3H6Y3 NJbHLW6t3leJly2gbxKuRfA= X-Google-Smtp-Source: ABdhPJzCxN+M3JUOZzxAWCy1ld3QQQoeWBPnLMKHQeg8te0L31GcGdbv44028s3dAt97Yy2/KJYKBw== X-Received: by 2002:a50:d74b:: with SMTP id i11mr2406394edj.136.1597412536669; Fri, 14 Aug 2020 06:42:16 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:16 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Amit Kucheria , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 4/8] drivers: thermal: tsens: Use init_common for msm8960 Date: Fri, 14 Aug 2020 15:41:18 +0200 Message-Id: <20200814134123.14566-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use init_common and drop custom init for msm8960. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens-8960.c | 53 +------------------------------ 1 file changed, 1 insertion(+), 52 deletions(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index cb3611299e8f..93d2c6c7d1bd 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -51,7 +51,6 @@ #define MIN_LIMIT_TH 0x0 #define MAX_LIMIT_TH 0xff -#define S0_STATUS_ADDR 0x3628 #define INT_STATUS_ADDR 0x363c #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 @@ -174,56 +173,6 @@ static void disable_8960(struct tsens_priv *priv) regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); } -static int init_8960(struct tsens_priv *priv) -{ - int ret, i; - u32 reg_cntl; - - priv->tm_map = dev_get_regmap(priv->dev, NULL); - if (!priv->tm_map) - return -ENODEV; - - /* - * The status registers for each sensor are discontiguous - * because some SoCs have 5 sensors while others have more - * but the control registers stay in the same place, i.e - * directly after the first 5 status registers. - */ - for (i = 0; i < priv->num_sensors; i++) { - if (i >= 5) - priv->sensor[i].status = S0_STATUS_ADDR + 40; - priv->sensor[i].status += i * 4; - } - - reg_cntl = SW_RST; - ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); - if (ret) - return ret; - - if (priv->num_sensors > 1) { - reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); - reg_cntl &= ~SW_RST; - ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, - CONFIG_MASK, CONFIG); - } else { - reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); - reg_cntl &= ~CONFIG_MASK_8660; - reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; - } - - reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; - ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); - if (ret) - return ret; - - reg_cntl |= EN; - ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); - if (ret) - return ret; - - return 0; -} - static int calibrate_8960(struct tsens_priv *priv) { int i; @@ -342,7 +291,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = { }; static const struct tsens_ops ops_8960 = { - .init = init_8960, + .init = init_common, .calibrate = calibrate_8960, .get_temp = get_temp_8960, .enable = enable_8960, From patchwork Fri Aug 14 13:41:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714635 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 672A0138C for ; Fri, 14 Aug 2020 13:43:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 429B020838 for ; Fri, 14 Aug 2020 13:43:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KJL39l7i" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728154AbgHNNmX (ORCPT ); Fri, 14 Aug 2020 09:42:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728137AbgHNNmX (ORCPT ); Fri, 14 Aug 2020 09:42:23 -0400 Received: from mail-ej1-x644.google.com (mail-ej1-x644.google.com [IPv6:2a00:1450:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77269C061384; Fri, 14 Aug 2020 06:42:22 -0700 (PDT) Received: by mail-ej1-x644.google.com with SMTP id o18so9970722eje.7; Fri, 14 Aug 2020 06:42:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6C8BvSP4USym3ZWGwZolFOiU9vS+iiX1kKb6Zh8Be9I=; b=KJL39l7iiLLAHTs44tuWFhWW8lq+YUqBR3Zs4v7imsXOg2TJA2WHI0H5t5wwVbAv+4 p6wOdObNNiskDkBnZDBRovV/9hIIwPHY9iQ7qrw5S2kCPipfUG6n36osIsjBWy4jHTLO 4VH4UiqqzvH8A3EioerRDPjIQBy2jJXk/1gMVDUBBdfgpJOu/1FZmGF7/MvEPmeMDrOs lEUWJKUn6OJQEOOaz85MxELpPm4cR5OzX0SvaCMsiYxCKK72xJMetHzpe5T13sbSfKA8 AIQJBU2OzGqI2v/7vmzOX16nooh35EBFnJs/rjdWrJFwHdcgZwza5WtMKJKCCISYQdI5 9H7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6C8BvSP4USym3ZWGwZolFOiU9vS+iiX1kKb6Zh8Be9I=; b=IWm3aadfFPjB44E1mEkYSQDBiWgmxJXjYOcqxzP17wMUX2BFiYlfkWHbelwVnNNIC1 +WuBjZ1K740SfmW0utTujxjwRDohUYOP9dsfMI/M8w99yQLueAVhpO11/Ep0Op4oGRvH 4KjAeORyXwdhTLDf7oesAWD8CgHC9MU5SwkdAoPor+aYNt9s1Gris09e7VQKgluJIarF ibvg/LSxYIDRwH3C1q8rF8Z06r0YZMn+MONPgn728VapFhbNj8bwZVYuUv5r0PrYPQiN ejnTW5xuXay2Dzu07zfYmke2cw4GUB6kIkGFl03VCJwIZCNIowAivAXCatdutX1oK3uw AIDA== X-Gm-Message-State: AOAM531SDvWxuto9BtwARy/bJr71ksG4k1J9tnb0efwppwVDCxdLbNEL ZndKXF26EYLI6qNCBAGES2w= X-Google-Smtp-Source: ABdhPJxlN5eoLhcFX7QLuXxFQPmiYh7z5UmvgDAlEeihFYH7LapVxl6crihwIPWkYLiiqM+wGeMV3Q== X-Received: by 2002:a17:906:3b91:: with SMTP id u17mr2402895ejf.305.1597412541111; Fri, 14 Aug 2020 06:42:21 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:20 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 5/8] drivers: thermal: tsens: Fix wrong get_temp for msm8960 Date: Fri, 14 Aug 2020 15:41:19 +0200 Message-Id: <20200814134123.14566-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org msm8960 based tsens have an hardcoded slope. Fix the calibrate function with the new added slope, change code_to_mdegC to use slope and conver get_temp to use reg_field. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens-8960.c | 43 +++++++++++++++++++++++-------- 1 file changed, 32 insertions(+), 11 deletions(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 93d2c6c7d1bd..ca83c7f838a5 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -67,6 +67,14 @@ #define S9_STATUS_OFF 0x3674 #define S10_STATUS_OFF 0x3678 +#define TSENS_FACTOR 1 + +u32 tsens_msm8960_slope[] = { + 1176, 1176, 1154, 1176, + 1111, 1132, 1132, 1199, + 1132, 1199, 1132 + }; + static int suspend_8960(struct tsens_priv *priv) { int ret; @@ -187,8 +195,10 @@ static int calibrate_8960(struct tsens_priv *priv) if (IS_ERR(data)) return PTR_ERR(data); - for (i = 0; i < num_read; i++, s++) - s->offset = data[i]; + for (i = 0; i < num_read; i++, s++) { + s->slope = tsens_msm8960_slope[i]; + s->offset = CAL_MDEGC - (data[i] * s->slope); + } kfree(data); @@ -198,32 +208,43 @@ static int calibrate_8960(struct tsens_priv *priv) /* Temperature on y axis and ADC-code on x-axis */ static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) { - int slope, offset; + int num, degc; + + num = (adc_code * s->slope) + s->offset; - slope = thermal_zone_get_slope(s->tzd); - offset = CAL_MDEGC - slope * s->offset; + if (num == 0) + degc = num; + else if (num > 0) + degc = (num + TSENS_FACTOR / 2) + / TSENS_FACTOR; + else + degc = (num - TSENS_FACTOR / 2) + / TSENS_FACTOR; - return adc_code * slope + offset; + return degc; } static int get_temp_8960(const struct tsens_sensor *s, int *temp) { int ret; - u32 code, trdy; + u32 last_temp = 0, trdy; struct tsens_priv *priv = s->priv; unsigned long timeout; timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); do { - ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); + ret = regmap_field_read(priv->rf[TRDY], &trdy); if (ret) return ret; - if (!(trdy & TRDY_MASK)) + if (!trdy) continue; - ret = regmap_read(priv->tm_map, s->status, &code); + + ret = regmap_field_read(priv->rf[LAST_TEMP_0 + s->hw_id], &last_temp); if (ret) return ret; - *temp = code_to_mdegC(code, s); + + *temp = code_to_mdegC(last_temp, s); + return 0; } while (time_before(jiffies, timeout)); From patchwork Fri Aug 14 13:41:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714629 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4291D618 for ; Fri, 14 Aug 2020 13:43:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 293B920838 for ; Fri, 14 Aug 2020 13:43:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="g+SB0f0T" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728180AbgHNNm1 (ORCPT ); Fri, 14 Aug 2020 09:42:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728261AbgHNNm1 (ORCPT ); Fri, 14 Aug 2020 09:42:27 -0400 Received: from mail-ej1-x644.google.com (mail-ej1-x644.google.com [IPv6:2a00:1450:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A647C061384; Fri, 14 Aug 2020 06:42:26 -0700 (PDT) Received: by mail-ej1-x644.google.com with SMTP id d6so9973061ejr.5; Fri, 14 Aug 2020 06:42:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0ea8aqWQ03A+LTiarGv9IDwr9wAWoEp4rehXTFeQjn4=; b=g+SB0f0TPX12oxfdzGHhzA8P76UZsMAdpd7j48g9GUESskc1VmnOPcruldrvgjo7Yr o8PZiHBw2FyGFNIrtkoJdM1kzd145t52VQTHNwhBKwLhRZeNt2heZXb/6Z5V7t+Kob5m KPOj1b2jKR61Kmi0KtRg6wrj2FX3NG6FQqdJiF7LihoLPwvkJ1E1rwAjy2iwbNY7UoCe SQCqlZJGgnJdmjsa3QpXW6Nb9jMmjmLpst25vGeaNHyx32NBV8OWdMBcRDlvm6o0/qyI xzXnSkf24PkuCdYOnfy/MZpJ1RlCZZMP7qnx68Jw3UGq47mq5A21oYApVTUXSnw8Vte6 +ffw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0ea8aqWQ03A+LTiarGv9IDwr9wAWoEp4rehXTFeQjn4=; b=sIRoulmoW0SshhsYJBOhDmRfjk8muVQQSJloctNKBjzKEYCYp3xMrxvUFG89wbPfAe oAz1Rln17Lkawx0jowHBNsP3ANH1RcJ97ghd5NeJ1M8JlY1r1nGR0Lx8ztspUqcXu9P5 kRo44OAwtN2CbIc8Xu/2qLeOxn0oyjpY1RkznkWRV2/ZzA1BSwQYnytHUPoENDs3uJ/h P5/ZA57CX33in15f2h1PXZ0Lstrq/206ZhnZe8BLcDIMGeaTlpEBhWRgOeDuq9xPK/EA s0qLDJpuhPhGWWWj7Jy4WtM3mfHvUnosYMoJAdP8UoGeRcdAq7BdTTEG7mPdhS2SxWJc iMQA== X-Gm-Message-State: AOAM530Tz9MCmWfr/BMFLFlbcb1Wcs3HEP260vgCgz+xLw9TIpnXkOxr JmnFK5KYoy72uou62ON3b70= X-Google-Smtp-Source: ABdhPJxOR9deuuaATcWM1zfhd3dzycAnv3BLjx6ASgIC+UpiV/kr2Q/cC9YCV/tEiESc0uNlm6TmhA== X-Received: by 2002:a17:906:1cd4:: with SMTP id i20mr2408850ejh.480.1597412545226; Fri, 14 Aug 2020 06:42:25 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:24 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 6/8] drivers: thermal: tsens: Change calib_backup name for msm8960 Date: Fri, 14 Aug 2020 15:41:20 +0200 Message-Id: <20200814134123.14566-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Follow standard naming for calib secondary rom and change calib_backup to tsens_calsel. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens-8960.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index ca83c7f838a5..a8c85bd6c71f 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -191,7 +191,7 @@ static int calibrate_8960(struct tsens_priv *priv) data = qfprom_read(priv->dev, "calib"); if (IS_ERR(data)) - data = qfprom_read(priv->dev, "calib_backup"); + data = qfprom_read(priv->dev, "calib_sel"); if (IS_ERR(data)) return PTR_ERR(data); From patchwork Fri Aug 14 13:41:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714621 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A7B0739 for ; Fri, 14 Aug 2020 13:42:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 122DD2068E for ; Fri, 14 Aug 2020 13:42:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aqZaWTjW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728390AbgHNNmd (ORCPT ); Fri, 14 Aug 2020 09:42:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728347AbgHNNma (ORCPT ); Fri, 14 Aug 2020 09:42:30 -0400 Received: from mail-ej1-x642.google.com (mail-ej1-x642.google.com [IPv6:2a00:1450:4864:20::642]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BD60C061385; Fri, 14 Aug 2020 06:42:30 -0700 (PDT) Received: by mail-ej1-x642.google.com with SMTP id t10so9966286ejs.8; Fri, 14 Aug 2020 06:42:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2bs0AcB7qbmfQNprig5SI2Kb6XQbYlIr4AXzloSOjX4=; b=aqZaWTjWfIK9QTifJNdS3EEbrKib8Tk9ULRvZ2JOg8nGjp/Ofc1mAPrEiN+89U3mnA hyGCMiPomiX3VgVxOTsCIBxn8Uozr6XEhVZVnWS8o8hQbMd00X8PbEEbPvAJSe+JxWdX Q+NKNZiwqWG5jTBUCGN4Q8wnutL9NThYDh1Vy2cMbuupz8Lmgl+Aw0ga5gy1Ns3bRACn qrhHAKI/9LBUSMsC6nv1wqRN2tDjpTEi2yHLZxqvoLBQ8MZ0KuUbx4Dm8xo6M/FCFdnO N+tIXT/jL3tQU4hHGE+GRvc/+M3RrDxTVYEOZlYOoHb6xT7qeK9GNSK7H8d82+97Ocd7 TnxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2bs0AcB7qbmfQNprig5SI2Kb6XQbYlIr4AXzloSOjX4=; b=sjZYRrYIQBLAZeiXZR24rVPoKJjbJzJhDkmrh05WTwlxtasfnUWqIoMTMgZPnBOArO 0SBhsoSACQm/K9Z6vnwACENCvOgyufMTcFL9kOgdrYXURMDl5uAk/fY1U9ZBCZrjKqKF qDKS4qwKiqUKaMheWXVy2rLNP3CdzUne8cZnte5SVI3eLQkziOXpmmY1uuVKH98z8WJP QiyUeZb5RA7dE/klUyIdizLOD/5ApGgTyfKN4wdo+gnu1Uh0pfvxWrTCPZv4I7r626xE AWA0GuNJmAZ/kUPx6iGzmTSHirGipabAJx1e/IBeQDPhewbo8hNql00S0UHiGzQHjKzy Nf8Q== X-Gm-Message-State: AOAM531eLEvmWKe6HkUW5lOjVyEHAfNkccTj01Lo7Zdr225Q+uNnocUB O5xn90nk549Y+9mP2Oc6+/Q= X-Google-Smtp-Source: ABdhPJyirA/O2w/YoO9JLlrGxROtlWU2Xa5iYgGRxnr64pnEqZMbI/JTXTpgXkhoKBlv7dvZC3UgvA== X-Received: by 2002:a17:906:b294:: with SMTP id q20mr2376743ejz.223.1597412548969; Fri, 14 Aug 2020 06:42:28 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:28 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Amit Kucheria , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 7/8] drivers: thermal: tsens: Add support for ipq8064-tsens Date: Fri, 14 Aug 2020 15:41:21 +0200 Message-Id: <20200814134123.14566-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for tsens present in ipq806x SoCs based on generic msm8960 tsens driver. Signed-off-by: Ansuel Smith --- drivers/thermal/qcom/tsens.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 965c4799918a..d571a6ddd914 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -993,6 +993,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume); static const struct of_device_id tsens_table[] = { { + .compatible = "qcom,ipq8064-tsens", + .data = &data_8960, + }, { .compatible = "qcom,msm8916-tsens", .data = &data_8916, }, { From patchwork Fri Aug 14 13:41:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 11714623 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AFE23739 for ; Fri, 14 Aug 2020 13:42:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 976A9214F1 for ; Fri, 14 Aug 2020 13:42:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="As6zWn+l" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728562AbgHNNmk (ORCPT ); Fri, 14 Aug 2020 09:42:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728518AbgHNNmf (ORCPT ); Fri, 14 Aug 2020 09:42:35 -0400 Received: from mail-ed1-x543.google.com (mail-ed1-x543.google.com [IPv6:2a00:1450:4864:20::543]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 61736C061384; Fri, 14 Aug 2020 06:42:35 -0700 (PDT) Received: by mail-ed1-x543.google.com with SMTP id bs17so6854768edb.1; Fri, 14 Aug 2020 06:42:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I1za5GysOPtWQWJ7AUT6812STRUOq3UcNXr5lCeanqY=; b=As6zWn+lPgGK3H5ouPqVtJISYiJHkGaSP0kZgo2tzD2ckwBRA2wjKeTRD8SWHFvsBq au/4tzWcqFBOdux4Iph663HiXld6/YRFz8RhqUYVy2d2E6KAG0fm5ivr0kP/EDyWV6Kh xcKO7z0auD2OY97WcYgqHeo+69uSmppRswCeFWD9JMwCvvr0Dc9xx4oR3qy/yLFJxY// 6K/jnolLRKdQr7WkluFA+BzAZfLzYvVWcpgZnWSezeXxPnKXclHMqJfsyutSggLXDLla 0Z2jzQMyilnVjH/BAGAEYkdjMYrRax9URc1ZDotI7VziKPPEf9wbHgzVOSFBbYYIvF1w QJHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I1za5GysOPtWQWJ7AUT6812STRUOq3UcNXr5lCeanqY=; b=l9GcM05NsA0HSFVlLlNcPRJgM1KRYvJzzOGWeTTl5MjKfP9T6fJ28vidcN9SrVpD0e IK3LnKKXkZVeHv1mVNwevFa+0/ICYsag2NchNdKf6KScijax0CCYCrQ2fgotHOnT4t5K X4ZjmC9h6B+TlogtUoCDPkcvJ8wNOu6n5S75J8sjEy9TPrBvzlRHD2+YZyQFiOvW27tN WIMY0H025Z6PJ1EepH5bSBEDOcdOCikHBrMek1he1IRO5HIonZ7sUovZpqx6vOUXEXAz f9c1u/0jq8YbGkMtMWksC+NQxFZAA6ZRALHa8ZlwbRwWXMTBUREGXtQgUtIh8C+1e647 qfag== X-Gm-Message-State: AOAM532osppnIWGaFwr53VPzdi4Zqq8BpzEX9RduTb0WPG76CkR/ELC/ RyfWa8TeRxvgw6xybqGhPDA= X-Google-Smtp-Source: ABdhPJx2k4MG7iEdVDeslT347UjBp7bBF1b+NBY5vchoCRwvt/GaIrHGb9TuxYB1CjKzALDpeMrufw== X-Received: by 2002:a50:ee0a:: with SMTP id g10mr2172023eds.289.1597412554058; Fri, 14 Aug 2020 06:42:34 -0700 (PDT) Received: from Ansuel-XPS.localdomain (host-87-0-192-118.retail.telecomitalia.it. [87.0.192.118]) by smtp.googlemail.com with ESMTPSA id s2sm6767118ejd.17.2020.08.14.06.42.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:42:33 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Rob Herring , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v6 8/8] dt-bindings: thermal: tsens: Document ipq8064 bindings Date: Fri, 14 Aug 2020 15:41:22 +0200 Message-Id: <20200814134123.14566-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814134123.14566-1-ansuelsmth@gmail.com> References: <20200814134123.14566-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the use of bindings used for msm8960 tsens based devices. msm8960 use the same gcc regs and is set as a child of the qcom gcc. Signed-off-by: Ansuel Smith Reviewed-by: Rob Herring --- .../bindings/thermal/qcom-tsens.yaml | 50 ++++++++++++++++--- 1 file changed, 43 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index d7be931b42d2..9d480e3943a2 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -19,6 +19,11 @@ description: | properties: compatible: oneOf: + - description: msm9860 TSENS based + items: + - enum: + - qcom,ipq8064-tsens + - description: v0.1 of TSENS items: - enum: @@ -85,12 +90,18 @@ properties: Number of cells required to uniquely identify the thermal sensors. Since we have multiple sensors this is set to 1 +required: + - compatible + - interrupts + - "#thermal-sensor-cells" + allOf: - if: properties: compatible: contains: enum: + - qcom,ipq8064-tsens - qcom,msm8916-tsens - qcom,msm8974-tsens - qcom,msm8976-tsens @@ -111,17 +122,42 @@ allOf: interrupt-names: minItems: 2 -required: - - compatible - - reg - - "#qcom,sensors" - - interrupts - - interrupt-names - - "#thermal-sensor-cells" + - if: + properties: + compatible: + contains: + enum: + - qcom,tsens-v0_1 + - qcom,tsens-v1 + - qcom,tsens-v2 + + then: + required: + - reg + - interrupt-names + - "#qcom,sensors" additionalProperties: false examples: + - | + #include + // Example msm9860 based SoC (ipq8064): + gcc: clock-controller { + + /* ... */ + + tsens: thermal-sensor { + compatible = "qcom,ipq8064-tsens"; + + nvmem-cells = <&tsens_calib>, <&tsens_calsel>; + nvmem-cell-names = "calib", "calib_sel"; + interrupts = ; + + #thermal-sensor-cells = <1>; + }; + }; + - | #include // Example 1 (legacy: for pre v1 IP):