From patchwork Mon Aug 17 04:46:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 11716451 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 811A5138C for ; Mon, 17 Aug 2020 04:46:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 71E932075B for ; Mon, 17 Aug 2020 04:46:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726114AbgHQEq1 (ORCPT ); Mon, 17 Aug 2020 00:46:27 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:34176 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725983AbgHQEq0 (ORCPT ); Mon, 17 Aug 2020 00:46:26 -0400 Date: 17 Aug 2020 13:46:25 +0900 X-IronPort-AV: E=Sophos;i="5.76,322,1592838000"; d="scan'208";a="54520375" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 17 Aug 2020 13:46:25 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 7869D40065A7; Mon, 17 Aug 2020 13:46:25 +0900 (JST) Message-ID: <87pn7phofb.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v2 1/3] pinctrl: sh-pfc: collect Renesas related CONFIGs in one place User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") To: Linus Walleij , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org In-Reply-To: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> References: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kuninori Morimoto Renesas related pinctrl CONFIGs are located many places, and it is confusable. This patch collects these into same place, and group into "Renesas pinctrl drivers" menu. Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/Kconfig | 32 ------------------------------ drivers/pinctrl/sh-pfc/Kconfig | 36 ++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+), 32 deletions(-) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8828613c4e0e..f63c5a04a3f7 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -213,38 +213,6 @@ config PINCTRL_ROCKCHIP select GENERIC_IRQ_CHIP select MFD_SYSCON -config PINCTRL_RZA1 - bool "Renesas RZ/A1 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S72100 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/A1 platforms. - -config PINCTRL_RZA2 - bool "Renesas RZ/A2 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S9210 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. - -config PINCTRL_RZN1 - bool "Renesas RZ/N1 pinctrl driver" - depends on OF - depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/N1 devices. - config PINCTRL_SINGLE tristate "One-register-per-pin type device tree based pinctrl driver" depends on OF diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index c461a2f1927a..a16393e6b9c2 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -3,6 +3,8 @@ # Renesas SH and SH Mobile PINCTRL drivers # +menu "Renesas pinctrl drivers" + config PINCTRL_SH_PFC bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH) default y if ARCH_RENESAS || SUPERH @@ -52,6 +54,38 @@ config PINCTRL_SH_PFC help This enables pin control drivers for Renesas SuperH and ARM platforms +config PINCTRL_RZA1 + bool "RZ/A1 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S72100 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/A1 platforms. + +config PINCTRL_RZA2 + bool "RZ/A2 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S9210 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. + +config PINCTRL_RZN1 + bool "RZ/N1 pinctrl driver" + depends on OF + depends on ARCH_RZN1 || COMPILE_TEST + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/N1 devices. + config PINCTRL_SH_PFC_GPIO select GPIOLIB bool @@ -199,3 +233,5 @@ config PINCTRL_PFC_SH7786 config PINCTRL_PFC_SHX3 bool "SH-X3 pin control support" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO + +endmenu From patchwork Mon Aug 17 04:46:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 11716453 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E24C138C for ; Mon, 17 Aug 2020 04:46:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7B773206FA for ; Mon, 17 Aug 2020 04:46:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726185AbgHQEqj (ORCPT ); Mon, 17 Aug 2020 00:46:39 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:22353 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725983AbgHQEqi (ORCPT ); Mon, 17 Aug 2020 00:46:38 -0400 Date: 17 Aug 2020 13:46:37 +0900 X-IronPort-AV: E=Sophos;i="5.76,322,1592838000"; d="scan'208";a="54734754" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 17 Aug 2020 13:46:37 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 8725640065A7; Mon, 17 Aug 2020 13:46:37 +0900 (JST) Message-ID: <87o8n9hoez.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v2 2/3] pinctrl: sh-pfc: align driver description title User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") To: Linus Walleij , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org In-Reply-To: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> References: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kuninori Morimoto Now, Renesas Pin Control drivers are under menu, but current description are not aligned. This patch align these. - Emma Mobile AV2 pin control support - R-Mobile APE6 pin control support - R-Mobile A1 pin control support - RZ/N1 pin control support - RZ/G1H pin control support - RZ/G1M pin control support + pin control support for Emma Mobile AV2 + pin control support for R-Mobile APE6 + pin control support for R-Mobile A1 + pin control support for RZ/N1 + pin control support for RZ/G1H + pin control support for RZ/G1M Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 86 +++++++++++++++++----------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index a16393e6b9c2..ed53ae4627ec 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -55,7 +55,7 @@ config PINCTRL_SH_PFC This enables pin control drivers for Renesas SuperH and ARM platforms config PINCTRL_RZA1 - bool "RZ/A1 gpio and pinctrl driver" + bool "gpio and pinctrl driver for RZ/A1" depends on OF depends on ARCH_R7S72100 || COMPILE_TEST select GPIOLIB @@ -66,7 +66,7 @@ config PINCTRL_RZA1 This selects pinctrl driver for Renesas RZ/A1 platforms. config PINCTRL_RZA2 - bool "RZ/A2 gpio and pinctrl driver" + bool "gpio and pinctrl driver for RZ/A2" depends on OF depends on ARCH_R7S9210 || COMPILE_TEST select GPIOLIB @@ -77,7 +77,7 @@ config PINCTRL_RZA2 This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. config PINCTRL_RZN1 - bool "RZ/N1 pinctrl driver" + bool "pin control support for RZ/N1" depends on OF depends on ARCH_RZN1 || COMPILE_TEST select GENERIC_PINCTRL_GROUPS @@ -99,139 +99,139 @@ config PINCTRL_SH_FUNC_GPIO This enables legacy function GPIOs for SH platforms config PINCTRL_PFC_EMEV2 - bool "Emma Mobile AV2 pin control support" if COMPILE_TEST + bool "pin control support for Emma Mobile AV2" if COMPILE_TEST config PINCTRL_PFC_R8A73A4 - bool "R-Mobile APE6 pin control support" if COMPILE_TEST + bool "pin control support for R-Mobile APE6" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7740 - bool "R-Mobile A1 pin control support" if COMPILE_TEST + bool "pin control support for R-Mobile A1" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7742 - bool "RZ/G1H pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1H" if COMPILE_TEST config PINCTRL_PFC_R8A7743 - bool "RZ/G1M pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1M" if COMPILE_TEST config PINCTRL_PFC_R8A7744 - bool "RZ/G1N pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1N" if COMPILE_TEST config PINCTRL_PFC_R8A7745 - bool "RZ/G1E pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1E" if COMPILE_TEST config PINCTRL_PFC_R8A77470 - bool "RZ/G1C pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1C" if COMPILE_TEST config PINCTRL_PFC_R8A774A1 - bool "RZ/G2M pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2M" if COMPILE_TEST config PINCTRL_PFC_R8A774B1 - bool "RZ/G2N pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2N" if COMPILE_TEST config PINCTRL_PFC_R8A774C0 - bool "RZ/G2E pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2E" if COMPILE_TEST config PINCTRL_PFC_R8A7778 - bool "R-Car M1A pin control support" if COMPILE_TEST + bool "pin control support for R-Car M1A" if COMPILE_TEST config PINCTRL_PFC_R8A7779 - bool "R-Car H1 pin control support" if COMPILE_TEST + bool "pin control support for R-Car H1" if COMPILE_TEST config PINCTRL_PFC_R8A7790 - bool "R-Car H2 pin control support" if COMPILE_TEST + bool "pin control support for R-Car H2" if COMPILE_TEST config PINCTRL_PFC_R8A7791 - bool "R-Car M2-W pin control support" if COMPILE_TEST + bool "pin control support for R-Car M2-W" if COMPILE_TEST config PINCTRL_PFC_R8A7792 - bool "R-Car V2H pin control support" if COMPILE_TEST + bool "pin control support for R-Car V2H" if COMPILE_TEST config PINCTRL_PFC_R8A7793 - bool "R-Car M2-N pin control support" if COMPILE_TEST + bool "pin control support for R-Car M2-N" if COMPILE_TEST config PINCTRL_PFC_R8A7794 - bool "R-Car E2 pin control support" if COMPILE_TEST + bool "pin control support for R-Car E2" if COMPILE_TEST config PINCTRL_PFC_R8A77950 - bool "R-Car H3 ES1.x pin control support" if COMPILE_TEST + bool "pin control support for R-Car H3 ES1.x" if COMPILE_TEST config PINCTRL_PFC_R8A77951 - bool "R-Car H3 ES2.0+ pin control support" if COMPILE_TEST + bool "pin control support for R-Car H3 ES2.0+" if COMPILE_TEST config PINCTRL_PFC_R8A77960 - bool "R-Car M3-W pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-W" if COMPILE_TEST config PINCTRL_PFC_R8A77961 - bool "R-Car M3-W+ pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-W+" if COMPILE_TEST config PINCTRL_PFC_R8A77965 - bool "R-Car M3-N pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-N" if COMPILE_TEST config PINCTRL_PFC_R8A77970 - bool "R-Car V3M pin control support" if COMPILE_TEST + bool "pin control support for R-Car V3M" if COMPILE_TEST config PINCTRL_PFC_R8A77980 - bool "R-Car V3H pin control support" if COMPILE_TEST + bool "pin control support for R-Car V3H" if COMPILE_TEST config PINCTRL_PFC_R8A77990 - bool "R-Car E3 pin control support" if COMPILE_TEST + bool "pin control support for R-Car E3" if COMPILE_TEST config PINCTRL_PFC_R8A77995 - bool "R-Car D3 pin control support" if COMPILE_TEST + bool "pin control support for R-Car D3" if COMPILE_TEST config PINCTRL_PFC_SH7203 - bool "SH7203 pin control support" if COMPILE_TEST + bool "pin control support for SH7203" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7264 - bool "SH7264 pin control support" if COMPILE_TEST + bool "pin control support for SH7264" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7269 - bool "SH7269 pin control support" if COMPILE_TEST + bool "pin control support for SH7269" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH73A0 - bool "SH-Mobile AG5 pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile AG5" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO select REGULATOR config PINCTRL_PFC_SH7720 - bool "SH7720 pin control support" if COMPILE_TEST + bool "pin control support for SH7720" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7722 - bool "SH7722 pin control support" if COMPILE_TEST + bool "pin control support for SH7722" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7723 - bool "SH-Mobile R2 pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile R2" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7724 - bool "SH-Mobile R2R pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile R2R" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7734 - bool "SH7734 pin control support" if COMPILE_TEST + bool "pin control support for SH7734" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7757 - bool "SH7757 pin control support" if COMPILE_TEST + bool "pin control support for SH7757" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7785 - bool "SH7785 pin control support" if COMPILE_TEST + bool "pin control support for SH7785" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7786 - bool "SH7786 pin control support" if COMPILE_TEST + bool "pin control support for SH7786" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SHX3 - bool "SH-X3 pin control support" if COMPILE_TEST + bool "pin control support for SH-X3" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO endmenu From patchwork Mon Aug 17 04:46:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 11716455 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C1BA138C for ; Mon, 17 Aug 2020 04:46:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5EB212075B for ; Mon, 17 Aug 2020 04:46:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726185AbgHQEqr (ORCPT ); Mon, 17 Aug 2020 00:46:47 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:37811 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725983AbgHQEqr (ORCPT ); Mon, 17 Aug 2020 00:46:47 -0400 Date: 17 Aug 2020 13:46:46 +0900 X-IronPort-AV: E=Sophos;i="5.76,322,1592838000"; d="scan'208";a="54734763" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 17 Aug 2020 13:46:46 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 1439741BB77F; Mon, 17 Aug 2020 13:46:46 +0900 (JST) Message-ID: <87mu2thoeq.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v2 3/3] pinctrl: sh-pfc: sort driver description title User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") To: Linus Walleij , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org In-Reply-To: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> References: <87r1s5hoht.wl-kuninori.morimoto.gx@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kuninori Morimoto Some Renesas drivers are not organized, or organized by Chip number. Because of it, menu table is not readable. This patch sort these. This patch do - Collect RZ/xx in one place - Collect SH-Mobile xx in one place Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 46 +++++++++++++++++----------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index ed53ae4627ec..f5b3f8854c7b 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -76,16 +76,6 @@ config PINCTRL_RZA2 help This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. -config PINCTRL_RZN1 - bool "pin control support for RZ/N1" - depends on OF - depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/N1 devices. - config PINCTRL_SH_PFC_GPIO select GPIOLIB bool @@ -109,6 +99,16 @@ config PINCTRL_PFC_R8A7740 bool "pin control support for R-Mobile A1" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO +config PINCTRL_RZN1 + bool "pin control support for RZ/N1" + depends on OF + depends on ARCH_RZN1 || COMPILE_TEST + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/N1 devices. + config PINCTRL_PFC_R8A7742 bool "pin control support for RZ/G1H" if COMPILE_TEST @@ -193,11 +193,6 @@ config PINCTRL_PFC_SH7269 bool "pin control support for SH7269" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO -config PINCTRL_PFC_SH73A0 - bool "pin control support for SH-Mobile AG5" if COMPILE_TEST - select PINCTRL_SH_PFC_GPIO - select REGULATOR - config PINCTRL_PFC_SH7720 bool "pin control support for SH7720" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO @@ -206,14 +201,6 @@ config PINCTRL_PFC_SH7722 bool "pin control support for SH7722" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO -config PINCTRL_PFC_SH7723 - bool "pin control support for SH-Mobile R2" if COMPILE_TEST - select PINCTRL_SH_FUNC_GPIO - -config PINCTRL_PFC_SH7724 - bool "pin control support for SH-Mobile R2R" if COMPILE_TEST - select PINCTRL_SH_FUNC_GPIO - config PINCTRL_PFC_SH7734 bool "pin control support for SH7734" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO @@ -230,6 +217,19 @@ config PINCTRL_PFC_SH7786 bool "pin control support for SH7786" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO +config PINCTRL_PFC_SH73A0 + bool "pin control support for SH-Mobile AG5" if COMPILE_TEST + select PINCTRL_SH_PFC_GPIO + select REGULATOR + +config PINCTRL_PFC_SH7723 + bool "pin control support for SH-Mobile R2" if COMPILE_TEST + select PINCTRL_SH_FUNC_GPIO + +config PINCTRL_PFC_SH7724 + bool "pin control support for SH-Mobile R2R" if COMPILE_TEST + select PINCTRL_SH_FUNC_GPIO + config PINCTRL_PFC_SHX3 bool "pin control support for SH-X3" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO