From patchwork Fri Aug 14 00:05:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716541 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8B762138C for ; Mon, 17 Aug 2020 07:06:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 69D532072D for ; Mon, 17 Aug 2020 07:06:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="otxEOoeP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 69D532072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F8F36E426; Mon, 17 Aug 2020 07:06:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 994006EABF for ; Fri, 14 Aug 2020 00:07:03 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id m22so8090598ljj.5 for ; Thu, 13 Aug 2020 17:07:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9G5w7c/hIvGiVCDrZTknQQZfa/cldECq9uSATZxh3c4=; b=otxEOoePlNJwWzSvhtqw8dV7okkDaXfkHFp6nD3FsIzs4ZEU1R6d8+gxFI8ZYiTOkp C0qBppnBBwCBUZeNmxY83awYyFy/mhxtD99Of9G23/KMnQLBGH+PaMoLVSgR4ZkOLdZQ 8qMVQH4Yg9CFb/FTgoMJgRTRmTDv3I96TTqIJU+jjLT1mfgrJq8E5IvAuAuPa7fyY1ws 310KCnzBMNJzlnQ7jHP1bV+0mB20ODMm54GZlx3pYn/CLbKMWg73wrX/TVosHglZdO27 kTSgg+Zb675q5H9ox0zGBI56MqeL1XSJ7KlL0I+53ti2GayBrOdSsvzk2EtRJswiAQ94 GG/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9G5w7c/hIvGiVCDrZTknQQZfa/cldECq9uSATZxh3c4=; b=nT5fpMc96UJXlnSlROraND92eIlVXlIyQqUXffdZ7wyzq3JTroWE6bbKbJ/fNQktyd 7nN0JCsdmxD7D+5wf7lBdCgjMpJZ84MZo2hZU6YrTJwWGM6o52zCdHVFdSOrVUF3c3Z/ VIoiKXKcgXj9BzrgyT3jcwnjmW7nCBPMNCVTY74JW1Z5vjFd2r382zDnUYleovMLc6Jv ZCMuUdFW68Edu1PKDhvPAgyhWZ5T8zHmfajZf2jsryfmcJE2GIxOhhZBKC5xEZnjB4qT 7bCUBQZQDZ385PeRyb5F28JjhKhT6wYeyxYpaFE1NdFGnstK7kQnBKkL5OL52csDNlem 3XWA== X-Gm-Message-State: AOAM530HkDNLNhzEWBijL2V8r8cYR+XpvRHWcOwvhG44qR62wbAg3fwu SUkFbmTqUUthAhxVsjQ+kG8= X-Google-Smtp-Source: ABdhPJz4FEc4x+4JcBBa0eyimwEiNT6FBFi7MpO0vixFhxFCJuQWpOqfcbh3HRTEGm17m7Imhl4bKQ== X-Received: by 2002:a2e:9d17:: with SMTP id t23mr105543lji.456.1597363622032; Thu, 13 Aug 2020 17:07:02 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:01 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 01/36] clk: Export clk_hw_reparent() Date: Fri, 14 Aug 2020 03:05:46 +0300 Message-Id: <20200814000621.8415-2-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We're going to turn Tegra124 Memory Controller driver into a loadable kernel module. The driver uses clk_hw_reparent(), which isn't an exported kernel symbol. Let's export that function in order to allow modularization of the Tegra driver. Signed-off-by: Dmitry Osipenko --- drivers/clk/clk.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 0a9261a099bd..2cbaede80fe5 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2448,6 +2448,7 @@ void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); } +EXPORT_SYMBOL_GPL(clk_hw_reparent); /** * clk_has_parent - check if a clock is a possible parent for another From patchwork Fri Aug 14 00:05:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716581 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2461713A4 for ; Mon, 17 Aug 2020 07:07:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 033E42072D for ; Mon, 17 Aug 2020 07:07:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="vW8RyoKX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 033E42072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC45C6E4CD; Mon, 17 Aug 2020 07:06:53 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by gabe.freedesktop.org (Postfix) with ESMTPS id D8D726EABF for ; Fri, 14 Aug 2020 00:07:04 +0000 (UTC) Received: by mail-lf1-x143.google.com with SMTP id k13so3961942lfo.0 for ; Thu, 13 Aug 2020 17:07:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GzwPBWKoPZ93pmT563Pm8pvnNRCDr3XhtwSAAffNp+g=; b=vW8RyoKXC5N6mmAV8wm0TZ8yPsu/Ji7O2Cn13Bd79Cd42Pb5GaNBLUjJmyc6waWyzc WazNsjrYQQwh6Zxn9fuMfDsIoixjwivKaTv+9Grqarjo4WpmNZHX/sJgxqpZtvPKZhju lzlD8dkqJaUA5Tmm3q2mWvRg2plL3Pge0W20QBJCUc3AsZ44Yv6owL1CZmziVOdpkAh8 BnFXQ4/nhwNwSOS0aN3cIsQtrs9S3F6sp57UTuCX0ZE+ohNxhsUTSgxCUzDfrXSs4xo9 Fn80+b2XW/Wg0Nh1Gcqgr01NUljvYVRy2AxyZnTDSIreIwxQ8SoYZYBnpe2TrObBw42u 9eLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GzwPBWKoPZ93pmT563Pm8pvnNRCDr3XhtwSAAffNp+g=; b=GVvsOfX7hs9+zWRLbnpTPE5ruKCYfHBoy0Su546pqZOaRfPTL3PuljHU7U0fr03Rbu ConkvpmPQCd6tYRL2w1ghf14YzwmS1C/0SQFarnGg1HhDJZ4EdJnrMsilv6/rkM81UoX XCXGiXb/9vaJqUcclaDur0TkN7tlMd77+WkHi7tVGfTOKnGJl4alAsgT/OwF0DU9sH1S vDvZseB8h4i/XbAJTvMKPdxLl+BlPk8kHCdLCCFFy8CwzpaAwgk5Xf+ooBIK4Hf1hWUH xKxk8ZhBspwv/OHHQAlJDYQ/Re32Sitl/+LuQ528qOp+pHMaxIqweFzGfkOAjPihX9gd meDQ== X-Gm-Message-State: AOAM530lUsTZox+MxQb15Q5A2qq5ExsiCGlSfLv7J6DkyaVIwpuQRkAD nXrR6tdsiUA4N3KhYO2AGEg= X-Google-Smtp-Source: ABdhPJyzug7TO+hMI9vCnuMuqXozGMwz0dka1d8pWNh3nWAb7JbR6TfWED153vnUZj7rM65tQ/DdRw== X-Received: by 2002:a19:8295:: with SMTP id e143mr425088lfd.95.1597363623205; Thu, 13 Aug 2020 17:07:03 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:02 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 02/36] clk: tegra: Remove Memory Controller lock Date: Fri, 14 Aug 2020 03:05:47 +0300 Message-Id: <20200814000621.8415-3-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The shared Memory Controller lock isn't needed since the time when Memory Clock was made read-only. The lock could be removed safely now. Hence let's remove it, this will help a tad to make further patches cleaner. Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-divider.c | 4 ++-- drivers/clk/tegra/clk-tegra114.c | 6 ++---- drivers/clk/tegra/clk-tegra124.c | 7 ++----- drivers/clk/tegra/clk-tegra20.c | 3 +-- drivers/clk/tegra/clk-tegra30.c | 3 +-- drivers/clk/tegra/clk.h | 2 +- 6 files changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 38daf483ddf1..56adb01638cc 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -177,10 +177,10 @@ static const struct clk_div_table mc_div_table[] = { }; struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, - void __iomem *reg, spinlock_t *lock) + void __iomem *reg) { return clk_register_divider_table(NULL, name, parent_name, CLK_IS_CRITICAL, reg, 16, 1, CLK_DIVIDER_READ_ONLY, - mc_div_table, lock); + mc_div_table, NULL); } diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index bc9e47a4cb60..ca8d9737d301 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -134,7 +134,6 @@ static DEFINE_SPINLOCK(pll_d_lock); static DEFINE_SPINLOCK(pll_d2_lock); static DEFINE_SPINLOCK(pll_u_lock); static DEFINE_SPINLOCK(pll_re_lock); -static DEFINE_SPINLOCK(emc_lock); static struct div_nmp pllxc_nmp = { .divm_shift = 0, @@ -1050,10 +1049,9 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base, ARRAY_SIZE(mux_pllmcp_clkm), CLK_SET_RATE_NO_REPARENT, clk_base + CLK_SOURCE_EMC, - 29, 3, 0, &emc_lock); + 29, 3, 0, NULL); - clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, - &emc_lock); + clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC); clks[TEGRA114_CLK_MC] = clk; clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base, diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index e931319dcc9d..0c956e14b9ca 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -126,7 +126,6 @@ static DEFINE_SPINLOCK(pll_d_lock); static DEFINE_SPINLOCK(pll_e_lock); static DEFINE_SPINLOCK(pll_re_lock); static DEFINE_SPINLOCK(pll_u_lock); -static DEFINE_SPINLOCK(emc_lock); static DEFINE_SPINLOCK(sor0_lock); /* possible OSC frequencies in Hz */ @@ -1050,8 +1049,7 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base, periph_clk_enb_refcnt); clks[TEGRA124_CLK_DSIB] = clk; - clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - &emc_lock); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA124_CLK_MC] = clk; /* cml0 */ @@ -1518,8 +1516,7 @@ static void __init tegra124_132_clock_init_post(struct device_node *np) tegra124_reset_deassert); tegra_add_of_provider(np, of_clk_src_onecell_get); - clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, - &emc_lock); + clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, NULL); tegra_register_devclks(devclks, ARRAY_SIZE(devclks)); diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 3efc651b42e3..2f8b6de4198f 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -802,8 +802,7 @@ static void __init tegra20_periph_clk_init(void) clks[TEGRA20_CLK_EMC] = clk; - clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - NULL); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA20_CLK_MC] = clk; /* dsi */ diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 37244a7e68c2..88e8c485f8ae 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1042,8 +1042,7 @@ static void __init tegra30_periph_clk_init(void) clks[TEGRA30_CLK_EMC] = clk; - clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - NULL); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA30_CLK_MC] = clk; /* cml0 */ diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 6b565f6b5f66..5ed8b95d331c 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -136,7 +136,7 @@ struct clk *tegra_clk_register_divider(const char *name, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock); struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, - void __iomem *reg, spinlock_t *lock); + void __iomem *reg); /* * Tegra PLL: From patchwork Fri Aug 14 00:05:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 68C1B722 for ; Mon, 17 Aug 2020 07:07:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 465692072D for ; Mon, 17 Aug 2020 07:07:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ReKpF9Nh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 465692072D Authentication-Results: mail.kernel.org; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:03 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 03/36] clk: tegra: Export Tegra20 EMC kernel symbols Date: Fri, 14 Aug 2020 03:05:48 +0300 Message-Id: <20200814000621.8415-4-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We're going to modularize Tegra EMC drivers and some of the EMC clk driver symbols need to be exported, let's export them. Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-tegra20-emc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/tegra/clk-tegra20-emc.c b/drivers/clk/tegra/clk-tegra20-emc.c index 03bf0009a33c..dd74b8543bf1 100644 --- a/drivers/clk/tegra/clk-tegra20-emc.c +++ b/drivers/clk/tegra/clk-tegra20-emc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -235,6 +236,7 @@ void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb, emc->cb_arg = cb_arg; } } +EXPORT_SYMBOL_GPL(tegra20_clk_set_emc_round_callback); bool tegra20_clk_emc_driver_available(struct clk_hw *emc_hw) { @@ -291,3 +293,4 @@ int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same) return 0; } +EXPORT_SYMBOL_GPL(tegra20_clk_prepare_emc_mc_same_freq); From patchwork Fri Aug 14 00:05:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716655 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9642D722 for ; Mon, 17 Aug 2020 07:09:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 744A02072D for ; Mon, 17 Aug 2020 07:09:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DnpQAdbh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 744A02072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D69EB6E4FF; Mon, 17 Aug 2020 07:07:57 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id E59396EAC0 for ; Fri, 14 Aug 2020 00:07:06 +0000 (UTC) Received: by mail-lj1-x242.google.com with SMTP id v9so8114236ljk.6 for ; Thu, 13 Aug 2020 17:07:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AzqqsKlTIsKI+WxT+RXsQygXtSVSAqLrYwZmJLTNE94=; b=DnpQAdbhKIQvhGCJUiMtzMLFsEUCVFYhDtyao0O8CmRNuiU8bgqOEqx20RaCLZROe+ pWNi/QlnMELpem+aW1gE2k5UAuHvyhQiH3II3NwlscixFJlAehP5xK913dQiLT5Iorab 8Q/zVOccqKYZF57qdynjJXyH/bxaz5fTQhOwF+yKvVIkh46Z3FYRSaDLVG1VjAA79NRJ XTy40YEbsHZjpoHajJJc5dF0x6ZLi5xNa8dsJw3pT4+PQ1eg2yueLpZ5ASL44fYWnc4q h83f7bcmG4fft+0l2STGANN5VZzXUAP/lkjOjI/7NJgpcq6JIM0x/z4bp2JGYyEUepyt CQ0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AzqqsKlTIsKI+WxT+RXsQygXtSVSAqLrYwZmJLTNE94=; b=GRb9HLMlygqE+OlfoTZfpmtDRxD55yo5OybNku65tnw4cGt7xcbvML3RDmKfXnRxNh eWp9wIISmzSL8mER1jIdADBHePbAD/L7kp0TwlMD2xDiGbeAG1Ua/DWTxKmJ7b0rqZl7 vk6Gktsaj/aRrKSAEXNMkq+9ir3w3StZwZwmmQpl9QPWrq0nBvl3bVVij/NEJ7u4WHiY GafcDTrezfVUCAtnGb/jVXV/v7DNjbgVW4o/tkeX4MDpuZ5ZE/DjPpK1GH0Oe2YY5u+V EBZ8kGFkGNtkWnJQ75Ayzy6Of5/4lR2yEbv3M1Vm+wZF7HLEXtpqbdB5xVl0USlRr7by 7//A== X-Gm-Message-State: AOAM531mHCm03hwgy9rNqUAkL3T+8cz536vPAvfBc6S2BkQHbKkTHXkp DDIFFP8FORmg9QkXE+ZnilxK6GYQ X-Google-Smtp-Source: ABdhPJzjuZl+OgyrslWSF80X9s+m6CSaS1bXPxfLfgeKRWPgF2w9Ngkp8C82e1mbxQc8a6Oy46OLDw== X-Received: by 2002:a2e:a370:: with SMTP id i16mr125608ljn.22.1597363625363; Thu, 13 Aug 2020 17:07:05 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:04 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 04/36] memory: tegra20-emc: Make driver modular Date: Fri, 14 Aug 2020 03:05:49 +0300 Message-Id: <20200814000621.8415-5-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch adds modularization support to the Tegra20 EMC driver. Driver now can be compiled as a loadable kernel module. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/Kconfig | 2 +- drivers/memory/tegra/tegra20-emc.c | 17 ++++++++++++----- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index 9f0a96bf9ccc..7e0e1ef87763 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -8,7 +8,7 @@ config TEGRA_MC NVIDIA Tegra SoCs. config TEGRA20_EMC - bool "NVIDIA Tegra20 External Memory Controller driver" + tristate "NVIDIA Tegra20 External Memory Controller driver" default y depends on ARCH_TEGRA_2x_SOC help diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index 83ca46345aba..5aa3a1da2975 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -724,6 +724,13 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + /* + * Don't allow the kernel module to be unloaded. Unloading adds some + * extra complexity which doesn't really worth the effort in a case of + * this driver. + */ + try_module_get(THIS_MODULE); + return 0; unset_cb: @@ -736,6 +743,7 @@ static const struct of_device_id tegra_emc_of_match[] = { { .compatible = "nvidia,tegra20-emc", }, {}, }; +MODULE_DEVICE_TABLE(of, tegra_emc_of_match); static struct platform_driver tegra_emc_driver = { .probe = tegra_emc_probe, @@ -745,9 +753,8 @@ static struct platform_driver tegra_emc_driver = { .suppress_bind_attrs = true, }, }; +module_platform_driver(tegra_emc_driver); -static int __init tegra_emc_init(void) -{ - return platform_driver_register(&tegra_emc_driver); -} -subsys_initcall(tegra_emc_init); +MODULE_AUTHOR("Dmitry Osipenko "); +MODULE_DESCRIPTION("NVIDIA Tegra20 EMC driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri Aug 14 00:05:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D279722 for ; Mon, 17 Aug 2020 07:07:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6B5AD2072D for ; Mon, 17 Aug 2020 07:07:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LbtCfTO2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6B5AD2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3CF546E451; Mon, 17 Aug 2020 07:06:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id F2FFC6EAC2 for ; Fri, 14 Aug 2020 00:07:07 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id v4so8141935ljd.0 for ; Thu, 13 Aug 2020 17:07:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vIrGwjD1iHBjbgO0XtrpSwX/BLmgL9dZfCne4W2SiCk=; b=LbtCfTO27eokMwsq2DXckd5k0TxggqW33ku8u/msDCQTtqigGb+PKkahJ7BkG7H3Rr tMG9CtBMyGYm9JDDgPZYtf84O1xlXVQvbJiu+sy5emWf5sU9I1SF0PNZlSzIkbcRTbim CMmEjTpVYOzx/YY65/BxCw4dOrqi1sRxqNI5LALUsAqRCOoeSs6xYimLqipJhqlzv44r UBOizpQ8+bTHavLZcqiTgx6/5IEm2sanrwV+FPdUx3m6BDadbTrnXMD6dx6L55iS2j4g wPKKFEu1KMztU0sIRd2XQAtDBtg4RSV5u2UuJTqyDk1pX9dFTbI5VveE25HFAC+ouQtZ pE+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vIrGwjD1iHBjbgO0XtrpSwX/BLmgL9dZfCne4W2SiCk=; b=kur2fxJwxT5fTbaxSZqMVrg9Vir2ita+ykbhop2rL1fkSx4qVNgvxnH+SvX+OY7YO7 f4VtrUEMGNNNu9I2cWLI5e9EPVXDROWwgTJ3IBdZHm2mkztfgaomPzqdetcpBNhpWcyZ RoajcmaT2XWAFLIGn+rCL56xDmNYifU3azym9juBzHTjwhpxMTZ55uGKtg27zT8xABkP bCRX5FrdkbJYJ9YxxcqRFuk8TJ7pn56dxxUJiDR97buEocUDzu/xKk0/YN2nNt/cFf2N hNNwII2eCKkQYF1Pvvsg4PieZQZjmwNWRp/++m+ug6UJv/wIc9fhM8pkZImO12rWV5AI 5bAg== X-Gm-Message-State: AOAM530ujUQPK6Pi98khg2zIX5OkkcKNS1E8g3jRACVcmB0HlyQ7q/EO /X+KtFthCSrSV1Nr+gCK+30= X-Google-Smtp-Source: ABdhPJwsGNdqaiG3qjnWpdDDeJLZEKD9805FDw+vSZ0mlkZ69bjVXOmKffJdaqnZ2xEYkCRC/euxdA== X-Received: by 2002:a2e:9f4e:: with SMTP id v14mr128407ljk.72.1597363626437; Thu, 13 Aug 2020 17:07:06 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:05 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 05/36] memory: tegra30-emc: Make driver modular Date: Fri, 14 Aug 2020 03:05:50 +0300 Message-Id: <20200814000621.8415-6-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch adds modularization support to the Tegra30 EMC driver. Driver now can be compiled as a loadable kernel module. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/Kconfig | 2 +- drivers/memory/tegra/mc.c | 3 +++ drivers/memory/tegra/tegra30-emc.c | 17 ++++++++++++----- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index 7e0e1ef87763..bd453de9d446 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -18,7 +18,7 @@ config TEGRA20_EMC external memory. config TEGRA30_EMC - bool "NVIDIA Tegra30 External Memory Controller driver" + tristate "NVIDIA Tegra30 External Memory Controller driver" default y depends on TEGRA_MC && ARCH_TEGRA_3x_SOC help diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index ec8403557ed4..772aa021b5f6 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -298,6 +299,7 @@ int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate) return 0; } +EXPORT_SYMBOL_GPL(tegra_mc_write_emem_configuration); unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc) { @@ -309,6 +311,7 @@ unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc) return dram_count; } +EXPORT_SYMBOL_GPL(tegra_mc_get_emem_device_count); static int load_one_timing(struct tegra_mc *mc, struct tegra_mc_timing *timing, diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index e448a55cb812..f3082964cfb6 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -1343,6 +1343,13 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + /* + * Don't allow the kernel module to be unloaded. Unloading adds some + * extra complexity which doesn't really worth the effort in a case of + * this driver. + */ + try_module_get(THIS_MODULE); + return 0; unset_cb: @@ -1393,6 +1400,7 @@ static const struct of_device_id tegra_emc_of_match[] = { { .compatible = "nvidia,tegra30-emc", }, {}, }; +MODULE_DEVICE_TABLE(of, tegra_emc_of_match); static struct platform_driver tegra_emc_driver = { .probe = tegra_emc_probe, @@ -1403,9 +1411,8 @@ static struct platform_driver tegra_emc_driver = { .suppress_bind_attrs = true, }, }; +module_platform_driver(tegra_emc_driver); -static int __init tegra_emc_init(void) -{ - return platform_driver_register(&tegra_emc_driver); -} -subsys_initcall(tegra_emc_init); +MODULE_AUTHOR("Dmitry Osipenko "); +MODULE_DESCRIPTION("NVIDIA Tegra30 EMC driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri Aug 14 00:05:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716643 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7391713A4 for ; Mon, 17 Aug 2020 07:08:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 520A82072D for ; Mon, 17 Aug 2020 07:08:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="o+19FqVX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 520A82072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AADE26E4CA; Mon, 17 Aug 2020 07:07:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 47E326EAC3 for ; Fri, 14 Aug 2020 00:07:09 +0000 (UTC) Received: by mail-lj1-x242.google.com with SMTP id f26so8080407ljc.8 for ; Thu, 13 Aug 2020 17:07:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mULjTgrbTLgfZ5MoiHNecmaHTzpXiIZe1zf78JY7URg=; b=o+19FqVXYvbcYZ684K9NCFa1QAfuiE08TBHXm+5rez4i814XADinYFGqPXa1hR+9hS EMnzCTI7Rzpe//oOqHtGJg1GVrBHWqugoya3YIv4hb6OaapKWaOoZuvj32+n//asVsOO 0zf3JxGbvCGLSyCHFrcLLZdHiUprP9S4i8dbbexa1w2F+hsZx/oxIUwAq3t28l9jhOX9 Q4i5qn7ap7ybYtjTpW566ptDp7C+9tfp9JkQJwuMB+f3Jcyju9+Y0idpn/on67HtcPuZ +hO1H9rSfdsYwDjAJ0OKgEViJRWJS94cmANbt//3BRA4uO5gM89WNiDV1qWOurgSUDHH Mg9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mULjTgrbTLgfZ5MoiHNecmaHTzpXiIZe1zf78JY7URg=; b=aXZfEJ6Txa6qSickE3rgGDJYXljZrQ6ymQtmkBaWQzUCjTiyKx4qoAJM7kPY2krHBn aTMgLa5urWOc8/qhY1w5BpFaq8MREQTmNhIYR/SWHMG+p+Er6yLK01mN2bfr7xgDzycj g+x1XKknKqo24UwcY3LcBW9f/Z1/r0UpcUT5B+Qa5nArrhc7/KvIkwMT8o73xvwtu7bf kx6dnY/XLsqGSkwddTWCmTmLfP/CCkEyM3+ofLyMrjhHCuWvpqbKaSMB/zGF1a0RHVgR 0aa4LdbsFSIz8h1f94wZMqpbvb+XMhDeXPEvvue5f0V1UHqpuPoUDJZwbzy2Zt0VPl/B jxDA== X-Gm-Message-State: AOAM533AFsxdy3AdccHMfBTflLs5GwKeIjgEUF1wCP/AJ3/3RIBqIgO5 FXwLL0b7vpWbBdJL2q9gEKE= X-Google-Smtp-Source: ABdhPJx0FslkMU1IzYRi2sdubJu7EjBk55Kc6rqrw8GSA9GfyeAYCOdj1R2C3mK5qo1WFpRLQZWhNA== X-Received: by 2002:a2e:96d9:: with SMTP id d25mr101379ljj.376.1597363627499; Thu, 13 Aug 2020 17:07:07 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:07 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 06/36] memory: tegra124-emc: Make driver modular Date: Fri, 14 Aug 2020 03:05:51 +0300 Message-Id: <20200814000621.8415-7-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch adds modularization support to the Tegra124 EMC driver. Driver now can be compiled as a loadable kernel module. Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-tegra124-emc.c | 63 +++++++++++++++++----------- drivers/clk/tegra/clk-tegra124.c | 3 +- drivers/clk/tegra/clk.h | 12 ------ drivers/memory/tegra/Kconfig | 2 +- drivers/memory/tegra/tegra124-emc.c | 32 +++++++++----- include/linux/clk/tegra.h | 11 +++++ include/soc/tegra/emc.h | 16 ------- 7 files changed, 73 insertions(+), 66 deletions(-) delete mode 100644 include/soc/tegra/emc.h diff --git a/drivers/clk/tegra/clk-tegra124-emc.c b/drivers/clk/tegra/clk-tegra124-emc.c index 745f9faa98d8..4d8b8f1ba7cd 100644 --- a/drivers/clk/tegra/clk-tegra124-emc.c +++ b/drivers/clk/tegra/clk-tegra124-emc.c @@ -11,7 +11,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -21,10 +23,10 @@ #include #include -#include #include "clk.h" +#define CLK_BASE 0x60006000 #define CLK_SOURCE_EMC 0x19c #define CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_SHIFT 0 @@ -79,7 +81,9 @@ struct tegra_clk_emc { int num_timings; struct emc_timing *timings; - spinlock_t *lock; + + tegra124_emc_prepare_timing_change_cb *prepare_timing_change; + tegra124_emc_complete_timing_change_cb *complete_timing_change; }; /* Common clock framework callback implementations */ @@ -98,7 +102,7 @@ static unsigned long emc_recalc_rate(struct clk_hw *hw, */ parent_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); - val = readl(tegra->clk_regs + CLK_SOURCE_EMC); + val = readl(tegra->clk_regs); div = val & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK; return parent_rate / (div + 2) * 2; @@ -163,7 +167,7 @@ static u8 emc_get_parent(struct clk_hw *hw) tegra = container_of(hw, struct tegra_clk_emc, hw); - val = readl(tegra->clk_regs + CLK_SOURCE_EMC); + val = readl(tegra->clk_regs); return (val >> CLK_SOURCE_EMC_EMC_2X_CLK_SRC_SHIFT) & CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK; @@ -204,7 +208,6 @@ static int emc_set_timing(struct tegra_clk_emc *tegra, int err; u8 div; u32 car_value; - unsigned long flags = 0; struct tegra_emc *emc = emc_ensure_emc_driver(tegra); if (!emc) @@ -241,13 +244,11 @@ static int emc_set_timing(struct tegra_clk_emc *tegra, div = timing->parent_rate / (timing->rate / 2) - 2; - err = tegra_emc_prepare_timing_change(emc, timing->rate); + err = tegra->prepare_timing_change(emc, timing->rate); if (err) return err; - spin_lock_irqsave(tegra->lock, flags); - - car_value = readl(tegra->clk_regs + CLK_SOURCE_EMC); + car_value = readl(tegra->clk_regs); car_value &= ~CLK_SOURCE_EMC_EMC_2X_CLK_SRC(~0); car_value |= CLK_SOURCE_EMC_EMC_2X_CLK_SRC(timing->parent_index); @@ -255,11 +256,9 @@ static int emc_set_timing(struct tegra_clk_emc *tegra, car_value &= ~CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(~0); car_value |= CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(div); - writel(car_value, tegra->clk_regs + CLK_SOURCE_EMC); - - spin_unlock_irqrestore(tegra->lock, flags); + writel(car_value, tegra->clk_regs); - tegra_emc_complete_timing_change(emc, timing->rate); + tegra->complete_timing_change(emc, timing->rate); clk_hw_reparent(&tegra->hw, __clk_get_hw(timing->parent)); clk_disable_unprepare(tegra->prev_parent); @@ -473,12 +472,15 @@ static const struct clk_ops tegra_clk_emc_ops = { .get_parent = emc_get_parent, }; -struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, - spinlock_t *lock) +struct clk * +tegra124_clk_register_emc(struct device_node *emc_np, + tegra124_emc_prepare_timing_change_cb *prep_cb, + tegra124_emc_complete_timing_change_cb *complete_cb) { struct tegra_clk_emc *tegra; struct clk_init_data init; struct device_node *node; + struct resource res; u32 node_ram_code; struct clk *clk; int err; @@ -487,12 +489,21 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, if (!tegra) return ERR_PTR(-ENOMEM); - tegra->clk_regs = base; - tegra->lock = lock; + res.start = CLK_BASE + CLK_SOURCE_EMC; + res.end = res.start + 3; + res.flags = IORESOURCE_MEM; - tegra->num_timings = 0; + tegra->clk_regs = ioremap(res.start, resource_size(&res)); + if (!tegra->clk_regs) { + pr_err("failed to map CLK_SOURCE_EMC\n"); + return ERR_PTR(-EINVAL); + } + + tegra->emc_node = emc_np; + tegra->prepare_timing_change = prep_cb; + tegra->complete_timing_change = complete_cb; - for_each_child_of_node(np, node) { + for_each_child_of_node(emc_np, node) { err = of_property_read_u32(node, "nvidia,ram-code", &node_ram_code); if (err) @@ -512,11 +523,6 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, if (tegra->num_timings == 0) pr_warn("%s: no memory timings registered\n", __func__); - tegra->emc_node = of_parse_phandle(np, - "nvidia,external-memory-controller", 0); - if (!tegra->emc_node) - pr_warn("%s: couldn't find node for EMC driver\n", __func__); - init.name = "emc"; init.ops = &tegra_clk_emc_ops; init.flags = CLK_IS_CRITICAL; @@ -536,5 +542,12 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, /* Allow debugging tools to see the EMC clock */ clk_register_clkdev(clk, "emc", "tegra-clk-debug"); + /* + * Don't allow the kernel module to be unloaded, unloading is not + * supported by the EMC driver. + */ + try_module_get(THIS_MODULE); + return clk; -}; +} +EXPORT_SYMBOL_GPL(tegra124_clk_register_emc); diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 0c956e14b9ca..228d87367ac6 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -928,6 +928,7 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = { [tegra_clk_audio4_mux] = { .dt_id = TEGRA124_CLK_AUDIO4_MUX, .present = true }, [tegra_clk_spdif_mux] = { .dt_id = TEGRA124_CLK_SPDIF_MUX, .present = true }, [tegra_clk_cec] = { .dt_id = TEGRA124_CLK_CEC, .present = true }, + [tegra_clk_emc] = { .dt_id = TEGRA124_CLK_EMC, .present = false }, }; static struct tegra_devclk devclks[] __initdata = { @@ -1516,8 +1517,6 @@ static void __init tegra124_132_clock_init_post(struct device_node *np) tegra124_reset_deassert); tegra_add_of_provider(np, of_clk_src_onecell_get); - clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, NULL); - tegra_register_devclks(devclks, ARRAY_SIZE(devclks)); tegra_cpu_car_ops = &tegra124_cpu_car_ops; diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 5ed8b95d331c..11a8bbe650c5 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -881,18 +881,6 @@ void tegra_super_clk_gen5_init(void __iomem *clk_base, void __iomem *pmc_base, struct tegra_clk *tegra_clks, struct tegra_clk_pll_params *pll_params); -#ifdef CONFIG_TEGRA124_EMC -struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, - spinlock_t *lock); -#else -static inline struct clk *tegra_clk_register_emc(void __iomem *base, - struct device_node *np, - spinlock_t *lock) -{ - return NULL; -} -#endif - void tegra114_clock_tune_cpu_trimmers_high(void); void tegra114_clock_tune_cpu_trimmers_low(void); void tegra114_clock_tune_cpu_trimmers_init(void); diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index bd453de9d446..c1cad4ce6251 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -28,7 +28,7 @@ config TEGRA30_EMC external memory. config TEGRA124_EMC - bool "NVIDIA Tegra124 External Memory Controller driver" + tristate "NVIDIA Tegra124 External Memory Controller driver" default y depends on TEGRA_MC && ARCH_TEGRA_124_SOC help diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index a98de2c943d1..93e9835e9761 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -9,16 +9,17 @@ #include #include #include +#include #include #include #include +#include #include #include #include #include #include -#include #include #include @@ -562,8 +563,8 @@ static struct emc_timing *tegra_emc_find_timing(struct tegra_emc *emc, return timing; } -int tegra_emc_prepare_timing_change(struct tegra_emc *emc, - unsigned long rate) +static int tegra_emc_prepare_timing_change(struct tegra_emc *emc, + unsigned long rate) { struct emc_timing *timing = tegra_emc_find_timing(emc, rate); struct emc_timing *last = &emc->last_timing; @@ -790,8 +791,8 @@ int tegra_emc_prepare_timing_change(struct tegra_emc *emc, return 0; } -void tegra_emc_complete_timing_change(struct tegra_emc *emc, - unsigned long rate) +static void tegra_emc_complete_timing_change(struct tegra_emc *emc, + unsigned long rate) { struct emc_timing *timing = tegra_emc_find_timing(emc, rate); struct emc_timing *last = &emc->last_timing; @@ -987,6 +988,7 @@ static const struct of_device_id tegra_emc_of_match[] = { { .compatible = "nvidia,tegra132-emc" }, {} }; +MODULE_DEVICE_TABLE(of, tegra_emc_of_match); static struct device_node * tegra_emc_find_node_by_ram_code(struct device_node *node, u32 ram_code) @@ -1252,9 +1254,20 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); + tegra124_clk_register_emc(pdev->dev.of_node, + tegra_emc_prepare_timing_change, + tegra_emc_complete_timing_change); + if (IS_ENABLED(CONFIG_DEBUG_FS)) emc_debugfs_init(&pdev->dev, emc); + /* + * Don't allow the kernel module to be unloaded. Unloading adds some + * extra complexity which doesn't really worth the effort in a case of + * this driver. + */ + try_module_get(THIS_MODULE); + return 0; }; @@ -1266,9 +1279,8 @@ static struct platform_driver tegra_emc_driver = { .suppress_bind_attrs = true, }, }; +module_platform_driver(tegra_emc_driver); -static int tegra_emc_init(void) -{ - return platform_driver_register(&tegra_emc_driver); -} -subsys_initcall(tegra_emc_init); +MODULE_AUTHOR("Mikko Perttunen "); +MODULE_DESCRIPTION("NVIDIA Tegra124 EMC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index 3f01d43f0598..797b8bde18de 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -136,6 +136,8 @@ extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); extern void tegra210_clk_emc_update_setting(u32 emc_src_value); struct clk; +struct device_node; +struct tegra_emc; typedef long (tegra20_clk_emc_round_cb)(unsigned long rate, unsigned long min_rate, @@ -146,6 +148,15 @@ void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb, void *cb_arg); int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same); +typedef int (tegra124_emc_prepare_timing_change_cb)(struct tegra_emc *emc, + unsigned long rate); +typedef void (tegra124_emc_complete_timing_change_cb)(struct tegra_emc *emc, + unsigned long rate); +struct clk * +tegra124_clk_register_emc(struct device_node *emc_np, + tegra124_emc_prepare_timing_change_cb *prep_cb, + tegra124_emc_complete_timing_change_cb *complete_cb); + struct tegra210_clk_emc_config { unsigned long rate; bool same_freq; diff --git a/include/soc/tegra/emc.h b/include/soc/tegra/emc.h deleted file mode 100644 index 05199a97ccf4..000000000000 --- a/include/soc/tegra/emc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2014 NVIDIA Corporation. All rights reserved. - */ - -#ifndef __SOC_TEGRA_EMC_H__ -#define __SOC_TEGRA_EMC_H__ - -struct tegra_emc; - -int tegra_emc_prepare_timing_change(struct tegra_emc *emc, - unsigned long rate); -void tegra_emc_complete_timing_change(struct tegra_emc *emc, - unsigned long rate); - -#endif /* __SOC_TEGRA_EMC_H__ */ From patchwork Fri Aug 14 00:05:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE85F722 for ; Mon, 17 Aug 2020 07:08:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D28E2072D for ; Mon, 17 Aug 2020 07:08:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Zz0wAqtS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D28E2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7DEF86E49D; Mon, 17 Aug 2020 07:06:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 615AC6EAC3 for ; Fri, 14 Aug 2020 00:07:10 +0000 (UTC) Received: by mail-lj1-x241.google.com with SMTP id i10so8121779ljn.2 for ; Thu, 13 Aug 2020 17:07:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PWeHmMe/ryLDZxWCOth5wddRP8FFmI3RUHaspfVKI8Y=; b=Zz0wAqtSlkr9O05GGrzY90VWvI1zhGc7XuNqBbwNY3C7PZ0D8SIXKFA60E7vyPXamM DW1n/aSkt3IIsi25DO1aAbyfbgUs+nhyfM22ZdxEPyeIITiwzqpMSapNyXAG67i6Fiuo chxoyipOD21Y7FMjEMTm/DdRn7R8dTesfuKeFEAS05VTQ3DzBZDHZ6h7swcCozHG4sUD ZH/YjSTjGIRJk6bpar1X0nxxNYw0Qj5py4llbRnAMf5rFBaxoGq4XenpiLMTovcqKJVH prEfkJeZIOUEd5sS1RAwWMvY3mrnfqdpnl7B0LWeEXNk027jps5/sTLRZXs0Q9sN9LDW nidA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PWeHmMe/ryLDZxWCOth5wddRP8FFmI3RUHaspfVKI8Y=; b=FPoMFQOFgyL9ngnvN7FjrJ0zH73Lz+5lI03go331svy9xwiSXUuNxpWDcWIXKf2h3q Q0qXPYI4JSLGLvJEn4p5YdLDb5xrJPp2tjaLR341zYYV4ZuY+RIGbgWlUaQyCdij0bkQ Y9Q1OIIVHbF0gsvl1a0ciaMrNN2XCiON7Ang+MxUJV2G3qqnY0qTuQIMG3qM3QDqvCX2 kjlzBbRmIKImSHbcHjPkeIG/bEMAZHxVivazS3/+BQ+k48kmJHtjYs7XifMDj7WvlIoi OTxyYwyJKBHEd8TWx9tjZFT2+jatsmFY56tJRbGeWDAkz7MbFWYrGotML55Dzj8K2v11 jw+g== X-Gm-Message-State: AOAM5306AtEukJR/HM70Nl1/4N0XdKDSVQFMpNHeypWnDSP2aLujkkka iO+YQy2NzhyqiMAX7ELYNf0= X-Google-Smtp-Source: ABdhPJyUPne+A9YG43mcnvypj+/+sED/3AV1gDnow59UIVAb7F2oJ5XCQ4ocDI5zrbmwimksMrj8sg== X-Received: by 2002:a2e:7615:: with SMTP id r21mr87723ljc.371.1597363628835; Thu, 13 Aug 2020 17:07:08 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:08 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 07/36] memory: tegra124-emc: Use devm_platform_ioremap_resource Date: Fri, 14 Aug 2020 03:05:52 +0300 Message-Id: <20200814000621.8415-8-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Utilize that relatively new helper which makes code a bit cleaner. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra124-emc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 93e9835e9761..8d7fc3fb00bb 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -1194,7 +1194,6 @@ static int tegra_emc_probe(struct platform_device *pdev) struct platform_device *mc; struct device_node *np; struct tegra_emc *emc; - struct resource *res; u32 ram_code; int err; @@ -1204,8 +1203,7 @@ static int tegra_emc_probe(struct platform_device *pdev) emc->dev = &pdev->dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - emc->regs = devm_ioremap_resource(&pdev->dev, res); + emc->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(emc->regs)) return PTR_ERR(emc->regs); From patchwork Fri Aug 14 00:05:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44FC016B1 for ; Mon, 17 Aug 2020 07:06:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23A122072D for ; Mon, 17 Aug 2020 07:06:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nH8/nuDX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 23A122072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C96FD6E421; Mon, 17 Aug 2020 07:06:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 805DB6EAC6 for ; Fri, 14 Aug 2020 00:07:11 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id w14so8109856ljj.4 for ; Thu, 13 Aug 2020 17:07:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Pct9NC8VO0a8nghXwi5ctazbfo4aqrjWxTsK8RkybFc=; b=nH8/nuDXiy+4Qdh4ChCGp+9h4XJ/9orptXrVOfCGXo8g+bGPVp+4G6DKAvwtXVNGcw 3DJBl33KCs4+QjqTqoZ/qQgzaXBlsIj3EIL6WnA7qEZsl4chs+w/DA5HaJ+hgepPgCFH JLZMbAQO86mgVlzXaZ/zvut7677+7DAwt34OYK8h2q6Azv+5UC1p5rjW1S2K8j+Xgm0y oNaD/QUFefOibo4csQeD6FlxP+oiNdtWiVSyLuViPMRiAf7A5cwwDMdCqsM8bSeNu/id 1N36EyGbl/SK/faEi5nfVZOvfGGtpvidQqg0ZX+6SksOzafnhQs1lXcXd4jT7QN0hB8E +lQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Pct9NC8VO0a8nghXwi5ctazbfo4aqrjWxTsK8RkybFc=; b=P85+VVTVUpJZ4ivgOq3aCEeD3jrF6DpDm9LH4qCX3yqild2RzEyl5ciDJAU+seaw6A 3YHt6uYcBfG7LlwQTedGWibPguZ+zTLTg+wQ2RjAxMV3GkAPtunbmnimdRZHzweOOlVF WUTHjFLEr2CtXA3CIExhjQjlLlmH74XOF8INRmexrTFyNPluzvmrhamqDT+5BL3COkQP FRdik5zvTvtbNvoB1ZcP1NqiXWNnORGmQO503VRIP+Kb3iOoEXjNrekCJ5redCYqpK5w p/hCebmejKbrZ+CWfaVYuXfRkQhl+j3L46qkbeezi8LRyxIk36mluiuSraDF3fQfCMMZ meBw== X-Gm-Message-State: AOAM530w5EqwTpEs9h0nHG4Q/3CEYSOFY29O+rBQPKgcFjraLxG9aYDQ cl4bqMtI6fEjwiUAgyjC7ulgF3Af X-Google-Smtp-Source: ABdhPJxPiJZrWxjd5umBuvDpZgsGH2/Uz9/ZQbEwecYHehDNeedDfyMunYNlTn8uBO3uFSmir3TMrQ== X-Received: by 2002:a2e:9d91:: with SMTP id c17mr102359ljj.131.1597363629992; Thu, 13 Aug 2020 17:07:09 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:09 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 08/36] soc/tegra: fuse: Export tegra_read_ram_code() Date: Fri, 14 Aug 2020 03:05:53 +0300 Message-Id: <20200814000621.8415-9-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The tegra_read_ram_code() is used by EMC drivers and we're going to make these driver modular, hence this function needs to be exported. Signed-off-by: Dmitry Osipenko --- drivers/soc/tegra/fuse/tegra-apbmisc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index 8e416ad91ee2..151eccb6069d 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -3,6 +3,7 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include @@ -65,6 +66,7 @@ u32 tegra_read_ram_code(void) return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT; } +EXPORT_SYMBOL_GPL(tegra_read_ram_code); static const struct of_device_id apbmisc_match[] __initconst = { { .compatible = "nvidia,tegra20-apbmisc", }, From patchwork Fri Aug 14 00:05:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716629 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A605D13A4 for ; Mon, 17 Aug 2020 07:08:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 84C7C2072D for ; Mon, 17 Aug 2020 07:08:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="r8XC1uLi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 84C7C2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C422389DA7; Mon, 17 Aug 2020 07:07:24 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id A51606EAC3 for ; Fri, 14 Aug 2020 00:07:12 +0000 (UTC) Received: by mail-lj1-x241.google.com with SMTP id m22so8090882ljj.5 for ; Thu, 13 Aug 2020 17:07:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lSEBi5t/1eWk9v8pfAjD69qdXwECFUtZk9QQF5NKtbc=; b=r8XC1uLiNnkeMxT5jfdRxcYhubnseQuxIrcuYOdPtmdaOUGD671s9Mfkp6A9wYGt5D Lrgab0YOqlQoRtsGSlOgD/03cOyUQdu8iLJjKBRDQlxedvv6/ViFhXTUpSDf7k31VFX4 ATne1xkPNOYwEco/qDU1ZTSJ9nGSmtumJZfdL4JuR2d7VowgvrLA+mVJVdtY0UEAh24N 2lO+5J2GxZIp1dQtjPmjchVvUtA8yn6jKV1VDyGxSSNvk0IeP6ef9Y/7TyhPx6hSIe7C FSKDdA6z/j+zdGwbFDG8ILynmXGFlYZ0adHS75Igpzskpbrk0nxMoiuZzKkT+AiE0ToW gW6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lSEBi5t/1eWk9v8pfAjD69qdXwECFUtZk9QQF5NKtbc=; b=PAACoyJzmN1FLDWTTjnD6Qq610Y131uufRhZDivhTxNoMi7i/qOZf5Ka8Kj6WLVLFA u4650E7MkXR5hFuL0nwkxsmPf3o8ygSdTBwduNxf1um6Ga7gs7VL6Nr7YVNOjabqtqVA S3LV81nFzFAhNafIlyAR2Zvg8Ays/jeHgGE+1usGlkvxzXwxw+LHGoTSUU6MmRdPV2lJ GgC0yU8nISHrol1onhXSiMua4UodaLoAYmsqJQ1cXD0u4pXavUbuLH4AWyXzNkp1bnS7 wnk9e8iFVkx6meV1KGC8JZ5HlePEX6wrIy5RbKNwyVyw8QrSSXO+EyoXbJ2GzyeLUOqQ c/yA== X-Gm-Message-State: AOAM530zuXNXiSaoCB0QFA6J946HLGBHwGM5ijoE2keXsjPQOQ0+3S4u rZDfaDWU12T2hzBKSHAnqGY= X-Google-Smtp-Source: ABdhPJwP6MWMSylZ6EWHBUyEkh77vK1pHLi32W8cHZCx+9E+VZjNPW94F78XIa1PEjLWMgxfDy10SQ== X-Received: by 2002:a2e:8084:: with SMTP id i4mr101890ljg.447.1597363631084; Thu, 13 Aug 2020 17:07:11 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:10 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 09/36] memory: tegra20-emc: Initialize MC timings Date: Fri, 14 Aug 2020 03:05:54 +0300 Message-Id: <20200814000621.8415-10-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We're going to add interconnect support to the EMC driver. Once this support will be added, the Tegra20 devfreq driver will no longer be able to use clk_round_rate(emc) for building up OPP table. It's quite handy that struct tegra_mc contains memory timings which could be used by the devfreq drivers instead of the clk rate-rounding. The tegra_mc timings are populated by the MC driver only for Tegra30+ SoCs, hence the Tegra20 EMC could populate timings by itself. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/Kconfig | 2 +- drivers/memory/tegra/tegra20-emc.c | 54 ++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index c1cad4ce6251..5bf75b316a2f 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -10,7 +10,7 @@ config TEGRA_MC config TEGRA20_EMC tristate "NVIDIA Tegra20 External Memory Controller driver" default y - depends on ARCH_TEGRA_2x_SOC + depends on TEGRA_MC && ARCH_TEGRA_2x_SOC help This driver is for the External Memory Controller (EMC) found on Tegra20 chips. The EMC controls the external DRAM on the board. diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index 5aa3a1da2975..a02ffc09c39e 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -15,12 +15,15 @@ #include #include #include +#include #include #include #include #include +#include "mc.h" + #define EMC_INTSTATUS 0x000 #define EMC_INTMASK 0x004 #define EMC_DBG 0x008 @@ -650,6 +653,45 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static int tegra_emc_init_mc_timings(struct tegra_emc *emc) +{ + struct tegra_mc_timing *timing; + struct platform_device *pdev; + struct device_node *np; + struct tegra_mc *mc; + unsigned int i; + + if (!emc->num_timings) + return 0; + + np = of_find_compatible_node(NULL, NULL, "nvidia,tegra20-mc-gart"); + if (!np) + return -ENOENT; + + pdev = of_find_device_by_node(np); + of_node_put(np); + if (!pdev) + return -ENOENT; + + mc = platform_get_drvdata(pdev); + if (!mc) + return -EPROBE_DEFER; + + /* shouldn't happen */ + WARN_ON(mc->num_timings); + WARN_ON(mc->timings); + + mc->timings = devm_kcalloc(emc->dev, emc->num_timings, sizeof(*timing), + GFP_KERNEL); + if (!mc->timings) + return -ENOMEM; + + for (i = 0; i < emc->num_timings; i++, mc->num_timings++) + mc->timings[i].rate = emc->timings[i].rate; + + return 0; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct device_node *np; @@ -721,6 +763,18 @@ static int tegra_emc_probe(struct platform_device *pdev) goto unset_cb; } + /* + * Only Tegra30+ SoCs are having Memory Controller timings initialized + * by the MC driver. For Tegra20 we need to populate the MC timings + * from here. The MC timings will be used by the Tegra20 devfreq driver. + */ + err = tegra_emc_init_mc_timings(emc); + if (err) { + dev_err(&pdev->dev, "failed to initialize mc timings: %d\n", + err); + goto unset_cb; + } + platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); From patchwork Fri Aug 14 00:05:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716577 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44AFD722 for ; Mon, 17 Aug 2020 07:07:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 203B72072D for ; Mon, 17 Aug 2020 07:07:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fT2X/WHG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 203B72072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 25F6D6E488; Mon, 17 Aug 2020 07:06:48 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id B8E316EAC3 for ; Fri, 14 Aug 2020 00:07:13 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id g6so8067784ljn.11 for ; Thu, 13 Aug 2020 17:07:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=enQXWXa7CxfwNeu1ctQcEFbFznRpVI/PIPqSe3dmn9s=; b=fT2X/WHGIWN9qFvv6TLNL4L+JH4lBV6w7Hw9xzB7m7YipcGaPXAe//qgx/6I/G0ner VOE80Q9FSV4cV6ccz6c3xU4CX35rsHAXuGvk1PbKEFX4oW2B6tieZ28GoBWH2rxj02xY QYA9pta3/aKbi16nYk+a4BpINAtv6LkZbhpI1Qfh6/Us3NH4WlLpBkqKiLsHMb4bPuGc +vBEMAM7Nde5Js1uzfDIt222+JPm9Ro8p6CJIX5aNhcar/SxNv4XnaQFVud97yueoSTG EeDEtHGhJOIh63/OV5uoq2eGYPWFfVKVupvYWFX9yWKa4jGKrkRtppVhpkNzDjd1ghwj dgsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=enQXWXa7CxfwNeu1ctQcEFbFznRpVI/PIPqSe3dmn9s=; b=MsnoQMfi+q78oVPPXodjqpjFEJo6gJ6CLY5EuoLXDitsfM8qQAU9C1362gN2OY5MFq C0YMeoezPRSEU7KB9zshQIRokMS5p1jm6AbH0xgjYsxXwj2Xt1ilPsLw3VgtAyX7PULL RHXHzuQXZE/y2FV/tpUddWiVnT2myFwA/taLKgnXSzelCCtj0ujGrxViyjUJV+WDGd/M osVC29Q/m9Rh6XExnYwixqieJkXmfb7xpUYn3XIU1yHiSsn50UFahBpVGTECnjG7DuGz 3rhxhhhHgvqVwlJd7B8TfFSosliTjrvw4dCbLduxTqi7g8TitRhjgzxUSsq/aMpy4ivq /4aA== X-Gm-Message-State: AOAM530zt5egYQj/DJTEMjUNLe/c0PARxgiyfkLAval7jhMIcIcMSxQI G8nTzmkODmD5qHQHKmFe34Y= X-Google-Smtp-Source: ABdhPJzfIHAKIWQU/LUL3hX6UDGeCUZOy/9fZTDOZx4s14uO/SyEtUjHIPep24IM1BlpBWm+N3r5ZQ== X-Received: by 2002:a2e:b165:: with SMTP id a5mr89666ljm.269.1597363632216; Thu, 13 Aug 2020 17:07:12 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:11 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 10/36] PM / devfreq: tegra20: Silence deferred probe error Date: Fri, 14 Aug 2020 03:05:55 +0300 Message-Id: <20200814000621.8415-11-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Tegra EMC driver was turned into a regular kernel driver, it also could be compiled as a loadable kernel module now. Hence EMC clock isn't guaranteed to be available and clk_get("emc") may return -EPROBE_DEFER and there is no good reason to spam KMSG with a error about missing EMC clock in this case, so let's silence the deferred probe error. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra20-devfreq.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c index ff82bac9ee4e..6469dc69c5e0 100644 --- a/drivers/devfreq/tegra20-devfreq.c +++ b/drivers/devfreq/tegra20-devfreq.c @@ -141,9 +141,11 @@ static int tegra_devfreq_probe(struct platform_device *pdev) /* EMC is a system-critical clock that is always enabled */ tegra->emc_clock = devm_clk_get(&pdev->dev, "emc"); - if (IS_ERR(tegra->emc_clock)) { - err = PTR_ERR(tegra->emc_clock); - dev_err(&pdev->dev, "failed to get emc clock: %d\n", err); + err = PTR_ERR_OR_ZERO(tegra->emc_clock); + if (err) { + if (err != -EPROBE_DEFER) + dev_err(&pdev->dev, "failed to get emc clock: %d\n", + err); return err; } From patchwork Fri Aug 14 00:05:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716651 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA018722 for ; Mon, 17 Aug 2020 07:08:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8A5C2072D for ; Mon, 17 Aug 2020 07:08:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YFCS2QrR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8A5C2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4C9C56E4C4; Mon, 17 Aug 2020 07:07:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id E1E656EAC3 for ; Fri, 14 Aug 2020 00:07:14 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id t23so8128167ljc.3 for ; Thu, 13 Aug 2020 17:07:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bjS15xtHXrUnM7iCNXL7EPsczHz2L3DzWOt0K6mcHE8=; b=YFCS2QrRp0FGtc1iVsHYn+sIReyd8H2Ajt6myMTgLXMJhH1urQnNvUnQcIUSCXG2g5 a7bN9akTMATX4xOuLot4+FTXmdwxXcQrw0Mfg93Nb88rhjkjCQE6455J/2X9KiPRU8kD iI4S3Ybf8by6MtqCE2e+Do/QLZZ867H6aK/+AZ8NMJD2s9zpTnyNk0MeYKK7gVH1H/KI rHTMIz3M19VYOu0OLusDkGC5LTTMXNaviuxP3tbndKhn4KOqCYGzDAyFSdCdaLS0e7Gs pfPjnJZLlT5iZr4wVJvG7RYVMhnq840cLcqZcBioEoKI3nChe6xluYlpcCdoi2taVEPG vkCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bjS15xtHXrUnM7iCNXL7EPsczHz2L3DzWOt0K6mcHE8=; b=Wr3MYEO+s0gtpGo6IN6yJT2jQ3AjgpFMPgbM60yujpkTWmP/Ut9ipBmwtp/359oeiC jb2Zn8skhu7dYM9wkTmE3yfdCKff6QF26+Ol0QR7tV1FwWcMc2RozOKtp/gqaLKS8nxI XRbCznZWJl5JmVF7i0r5m9sGKOFM89kVDYj/RoJwFaT6f8iI3LbZuVWxaSjtQpkGYg20 qa9kpqraYnl785Al87/35ppsed6esnL1jyFVJNkXHf9rFNBxHN/uIS6dyKj7L7zL1jXq w1JTs/fw1qAUc+gUawZ4OlIbp8SJ1ZvdOwthj7U0zdppTdNcAEAsi9+GxEnudmMuPhPt xofg== X-Gm-Message-State: AOAM530J3KmGSiVodTFIEZmMmDwhWW1TvmNNlgPdbB7COhPuqGd1mpZ7 jXFD2d/rfrm9uxFNO2f19EA= X-Google-Smtp-Source: ABdhPJwQDYHAtpZ5+gDAzMB2w7Bzd9T+Cz7ZuPoj+LPBOqaXO2G+ZzicL3WI8E8Tos3Spd/SPclalQ== X-Received: by 2002:a2e:d1a:: with SMTP id 26mr107967ljn.422.1597363633314; Thu, 13 Aug 2020 17:07:13 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:12 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 11/36] PM / devfreq: tegra30: Silence deferred probe error Date: Fri, 14 Aug 2020 03:05:56 +0300 Message-Id: <20200814000621.8415-12-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Tegra EMC driver was turned into a regular kernel driver, it also could be compiled as a loadable kernel module now. Hence EMC clock isn't guaranteed to be available and clk_get("emc") may return -EPROBE_DEFER and there is no good reason to spam KMSG with a error about missing EMC clock in this case, so let's silence the deferred probe error. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra30-devfreq.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c index e94a27804c20..423dd35c95b3 100644 --- a/drivers/devfreq/tegra30-devfreq.c +++ b/drivers/devfreq/tegra30-devfreq.c @@ -801,9 +801,12 @@ static int tegra_devfreq_probe(struct platform_device *pdev) } tegra->emc_clock = devm_clk_get(&pdev->dev, "emc"); - if (IS_ERR(tegra->emc_clock)) { - dev_err(&pdev->dev, "Failed to get emc clock\n"); - return PTR_ERR(tegra->emc_clock); + err = PTR_ERR_OR_ZERO(tegra->emc_clock); + if (err) { + if (err != -EPROBE_DEFER) + dev_err(&pdev->dev, "Failed to get emc clock: %d\n", + err); + return err; } err = platform_get_irq(pdev, 0); From patchwork Fri Aug 14 00:05:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716575 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 033F7722 for ; Mon, 17 Aug 2020 07:07:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D227B2072D for ; Mon, 17 Aug 2020 07:07:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="eRd1rHgY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D227B2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 927266E4C9; Mon, 17 Aug 2020 07:06:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 14DAD6EAC0 for ; Fri, 14 Aug 2020 00:07:16 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id v9so8114626ljk.6 for ; Thu, 13 Aug 2020 17:07:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FdFHEYH0SedaYmARghSCa7o+JjfWSMYBVfZijnGUEd0=; b=eRd1rHgYkncn22Ou0jtrzjuUMIhGYMHYufHy42pGDs51PAOtFx2BMutWIBqfSQZgeh D7/PQ6Xqbi4FxgeoJmMRNpZCjT8b2Uc+GUkG5ycvfAGH8nKeOCGifPVc+cSILE2DBkFq pwBsZhyi4RjC9JIaFLEoJceorJBvBa6rwT6J/Vn06MsajIMtPrlQeY1332O/NBjs8Zx7 cCQrW7fLJxr6U1pgQqocd06kUMG4un9wqz5hetkah8/G5Frrr2jypCwDGGW0dHIaqSvR tloMI9cMtsC2Ggb+rToMR8iWZ0fyc0Z/grWTZbiGH4awBP6befBtmj+oE8ZDYPmB+e+1 IXtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FdFHEYH0SedaYmARghSCa7o+JjfWSMYBVfZijnGUEd0=; b=Bvnax9RfJPDb+PnRjf6jcZjT68mDuwr2YsAgbQXK1b80MJATNvKbIHYLzorKLLGZeA aqJSqVvmZl8VLR4Kbjyt/8lfoz34Y2rokgzBHF9AcHUxQk9GJilcm0jH5HH/dUXWqwMO Y7zlgOzINg74fD/7NoCBiNYJKXLdcNJfMAUGKGcX9CXIz80hoSvgxAJBqkSDCjZIXakt pxUx7ZxyKP9MbsK3c+tE9J+ndOtkyrjXpxuBWpZf5U7sDoorQAhd7CixXmEEHxUBMHju +EVpVwGGMIIfo3Kxg7QqTYcY9sC6G+TfsFKF2pdRpNs3GNLa0dGWebiHwkqxZrDaL2s5 Q/Gw== X-Gm-Message-State: AOAM5313q0MWCwRYTMguwHqG1fskEhQ9NjoEL9CkIz3QqDhI+B9lxm9x hUUI2/hA8Q7+P3MPW7VrJhPBLKII X-Google-Smtp-Source: ABdhPJxL9BUYSKl5lC8jFL/iz/BrlYghtRVCp2vUSd1CIrGiHquNBYFpKfC60ekSidFAFA3FJT+PMw== X-Received: by 2002:a2e:b008:: with SMTP id y8mr81369ljk.421.1597363634483; Thu, 13 Aug 2020 17:07:14 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:13 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 12/36] PM / devfreq: tegra20: Use MC timings for building OPP table Date: Fri, 14 Aug 2020 03:05:57 +0300 Message-Id: <20200814000621.8415-13-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The clk_round_rate() won't be usable for building OPP table once interconnect support will be added to the EMC driver because that CLK API function limits the rounded rate based on the clk rate that is imposed by active clk-users, and thus, the rounding won't work as expected if interconnect will set the minimum EMC clock rate before devfreq driver is loaded. The struct tegra_mc contains memory timings which could be used by the devfreq driver for building up OPP table instead of rounding clock rate, this patch implements this idea. Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra20-devfreq.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c index 6469dc69c5e0..a985f24098f5 100644 --- a/drivers/devfreq/tegra20-devfreq.c +++ b/drivers/devfreq/tegra20-devfreq.c @@ -123,8 +123,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev) { struct tegra_devfreq *tegra; struct tegra_mc *mc; - unsigned long max_rate; - unsigned long rate; + unsigned int i; int err; mc = tegra_get_memory_controller(); @@ -135,6 +134,11 @@ static int tegra_devfreq_probe(struct platform_device *pdev) return err; } + if (!mc->num_timings) { + dev_info(&pdev->dev, "memory controller has no timings\n"); + return -ENODEV; + } + tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); if (!tegra) return -ENOMEM; @@ -151,12 +155,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev) tegra->regs = mc->regs; - max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX); - - for (rate = 0; rate <= max_rate; rate++) { - rate = clk_round_rate(tegra->emc_clock, rate); - - err = dev_pm_opp_add(&pdev->dev, rate, 0); + for (i = 0; i < mc->num_timings; i++) { + err = dev_pm_opp_add(&pdev->dev, mc->timings[i].rate, 0); if (err) { dev_err(&pdev->dev, "failed to add opp: %d\n", err); goto remove_opps; From patchwork Fri Aug 14 00:05:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6B6E2722 for ; Mon, 17 Aug 2020 07:07:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4A1842072D for ; Mon, 17 Aug 2020 07:07:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qOlCRW4Y" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4A1842072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E6F16E484; Mon, 17 Aug 2020 07:06:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D8296EAC2 for ; Fri, 14 Aug 2020 00:07:17 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id v12so8091945ljc.10 for ; Thu, 13 Aug 2020 17:07:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gc+aFeFcEEe0r2e6kfr4D7GHdjfoBcTEAztvWmEYKOI=; b=qOlCRW4YKq7eraL0D+nMuvdP0nKf2YB3LHLWujjF9N7fKZ+0dGAqCZoSrWQoCAfcaq IdEYT/DDOjsoiSPKIf0WcjKhGRDhRrzwEl+SgzCWmlr1dVWREpMLY4EL5pJLE5j+UiBQ 4gdN8mIcjCr7UrWGjezdIe0NFwKDcjXUyRMNJ0CaCwZMS/gUrxmx4zsbOFP84i+DDCSP kx3zLe2Tz184wiYgNxVB+sSVLbrQVZ8tGThnS6fzq+oQB+dFID3fxscp4hurFVrN+BaA we2TsVfxsyO3joDBk+dHXKxxvaDE5+GxxbDoh/0l9vcT9s5M7Nxk3xryypAAHts8vuIK 0OVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gc+aFeFcEEe0r2e6kfr4D7GHdjfoBcTEAztvWmEYKOI=; b=fsHgcMGnB45mKQQvJGX0bGh5APYI7HGUVDSevk5ro8W+25256nniYG/eqmTfhdCoJX tZCn/9GBeubYF3W7BVLLGiJQvNWb7/bls6HkCCOoAkuOqK1Oi5zqdegoul0E6R5GaOyv z7rTo/tNmZOCOMFSDStAr9tNtuMXsDv+UrhyOcG+/u+Ne4qW1Qi2EoWy2UBSr4hH9/W5 YM777O5qJynnHfwC3A1l6VzlChVy+6bgGcHvVoNOKzFqXvcJGLu8OIWbQKqmAK06AwKz Ukwbc9pN0cbeW5H5N2UtSAjQ5PaVi2rBYYtRl6zlat4o32rxD6Pf0OBXObWge9NYZaIy 7S+A== X-Gm-Message-State: AOAM533Emr3uwWdwHXu/LvNq9mWOn65a7oXiKCrGPkdKzz289a3m32w4 O4qawPZikGogWBx6lsysMEQ= X-Google-Smtp-Source: ABdhPJyLqxpWmF26iNvV15chMmfqVwwnfry3sIqaIUF06wr+7+dJDbgJL9oYeQttZiVFIxgfOvpHqQ== X-Received: by 2002:a05:651c:1b4:: with SMTP id c20mr102897ljn.432.1597363635587; Thu, 13 Aug 2020 17:07:15 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:15 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 13/36] PM / devfreq: tegra30: Use MC timings for building OPP table Date: Fri, 14 Aug 2020 03:05:58 +0300 Message-Id: <20200814000621.8415-14-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The clk_round_rate() won't be usable for building OPP table once interconnect support will be added to the EMC driver because that CLK API function limits the rounded rate based on the clk rate that is imposed by active clk-users, and thus, the rounding won't work as expected if interconnect will set the minimum EMC clock rate before devfreq driver is loaded. The struct tegra_mc contains memory timings which could be used by the devfreq driver for building up OPP table instead of rounding clock rate, this patch implements this idea. Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra30-devfreq.c | 93 +++++++++++++++++++++---------- 1 file changed, 65 insertions(+), 28 deletions(-) diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c index 423dd35c95b3..6c2f56b34535 100644 --- a/drivers/devfreq/tegra30-devfreq.c +++ b/drivers/devfreq/tegra30-devfreq.c @@ -19,6 +19,8 @@ #include #include +#include + #include "governor.h" #define ACTMON_GLB_STATUS 0x0 @@ -153,6 +155,18 @@ struct tegra_devfreq_device { unsigned long target_freq; }; +struct tegra_devfreq_soc_data { + const char *mc_compatible; +}; + +static const struct tegra_devfreq_soc_data tegra30_soc = { + .mc_compatible = "nvidia,tegra30-mc", +}; + +static const struct tegra_devfreq_soc_data tegra124_soc = { + .mc_compatible = "nvidia,tegra124-mc", +}; + struct tegra_devfreq { struct devfreq *devfreq; @@ -771,15 +785,49 @@ static struct devfreq_governor tegra_devfreq_governor = { .interrupt_driven = true, }; +static struct tegra_mc *tegra_get_memory_controller(const char *compatible) +{ + struct platform_device *pdev; + struct device_node *np; + struct tegra_mc *mc; + + np = of_find_compatible_node(NULL, NULL, compatible); + if (!np) + return ERR_PTR(-ENOENT); + + pdev = of_find_device_by_node(np); + of_node_put(np); + if (!pdev) + return ERR_PTR(-ENODEV); + + mc = platform_get_drvdata(pdev); + if (!mc) + return ERR_PTR(-EPROBE_DEFER); + + return mc; +} + static int tegra_devfreq_probe(struct platform_device *pdev) { + const struct tegra_devfreq_soc_data *soc_data; struct tegra_devfreq_device *dev; struct tegra_devfreq *tegra; struct devfreq *devfreq; + struct tegra_mc *mc; unsigned int i; - long rate; int err; + soc_data = of_device_get_match_data(&pdev->dev); + + mc = tegra_get_memory_controller(soc_data->mc_compatible); + if (IS_ERR(mc)) + return PTR_ERR(mc); + + if (!mc->num_timings) { + dev_info(&pdev->dev, "memory controller has no timings\n"); + return -ENODEV; + } + tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); if (!tegra) return -ENOMEM; @@ -825,6 +873,20 @@ static int tegra_devfreq_probe(struct platform_device *pdev) return err; } + for (i = 0; i < mc->num_timings; i++) { + /* + * Memory Controller timings are sorted in ascending clock + * rate order, so the last timing will be the max freq. + */ + tegra->max_freq = mc->timings[i].rate / KHZ; + + err = dev_pm_opp_add(&pdev->dev, tegra->max_freq, 0); + if (err) { + dev_err(&pdev->dev, "Failed to add OPP: %d\n", err); + goto remove_opps; + } + } + reset_control_assert(tegra->reset); err = clk_prepare_enable(tegra->clock); @@ -836,37 +898,12 @@ static int tegra_devfreq_probe(struct platform_device *pdev) reset_control_deassert(tegra->reset); - rate = clk_round_rate(tegra->emc_clock, ULONG_MAX); - if (rate < 0) { - dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate); - return rate; - } - - tegra->max_freq = rate / KHZ; - for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) { dev = tegra->devices + i; dev->config = actmon_device_configs + i; dev->regs = tegra->regs + dev->config->offset; } - for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) { - rate = clk_round_rate(tegra->emc_clock, rate); - - if (rate < 0) { - dev_err(&pdev->dev, - "Failed to round clock rate: %ld\n", rate); - err = rate; - goto remove_opps; - } - - err = dev_pm_opp_add(&pdev->dev, rate / KHZ, 0); - if (err) { - dev_err(&pdev->dev, "Failed to add OPP: %d\n", err); - goto remove_opps; - } - } - platform_set_drvdata(pdev, tegra); tegra->clk_rate_change_nb.notifier_call = tegra_actmon_clk_notify_cb; @@ -921,8 +958,8 @@ static int tegra_devfreq_remove(struct platform_device *pdev) } static const struct of_device_id tegra_devfreq_of_match[] = { - { .compatible = "nvidia,tegra30-actmon" }, - { .compatible = "nvidia,tegra124-actmon" }, + { .compatible = "nvidia,tegra30-actmon", .data = &tegra30_soc, }, + { .compatible = "nvidia,tegra124-actmon", .data = &tegra124_soc, }, { }, }; From patchwork Fri Aug 14 00:05:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716543 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EAE9F16B1 for ; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:16 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 14/36] PM / devfreq: tegra20: Add error messages to tegra_devfreq_target() Date: Fri, 14 Aug 2020 03:05:59 +0300 Message-Id: <20200814000621.8415-15-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" It's useful to now when something goes wrong instead of failing silently, so let's add error messages to tegra_devfreq_target() to prevent situation where it fails silently. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra20-devfreq.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c index a985f24098f5..bc43284996de 100644 --- a/drivers/devfreq/tegra20-devfreq.c +++ b/drivers/devfreq/tegra20-devfreq.c @@ -44,19 +44,25 @@ static int tegra_devfreq_target(struct device *dev, unsigned long *freq, int err; opp = devfreq_recommended_opp(dev, freq, flags); - if (IS_ERR(opp)) + if (IS_ERR(opp)) { + dev_err(dev, "failed to find opp for %lu Hz\n", *freq); return PTR_ERR(opp); + } rate = dev_pm_opp_get_freq(opp); dev_pm_opp_put(opp); err = clk_set_min_rate(tegra->emc_clock, rate); - if (err) + if (err) { + dev_err(dev, "failed to set min rate: %d\n", err); return err; + } err = clk_set_rate(tegra->emc_clock, 0); - if (err) + if (err) { + dev_err(dev, "failed to set rate: %d\n", err); goto restore_min_rate; + } return 0; From patchwork Fri Aug 14 00:06:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716613 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 12EFD722 for ; Mon, 17 Aug 2020 07:08:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E58422072D for ; Mon, 17 Aug 2020 07:08:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Lqx09r7+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E58422072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 890F36E4DE; Mon, 17 Aug 2020 07:06:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x144.google.com (mail-lf1-x144.google.com [IPv6:2a00:1450:4864:20::144]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5D95F6EAC8 for ; Fri, 14 Aug 2020 00:07:19 +0000 (UTC) Received: by mail-lf1-x144.google.com with SMTP id h8so3940991lfp.9 for ; Thu, 13 Aug 2020 17:07:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/fHS4JZ6NTiAMWoTmk+f2h360uLuiAqGO28JRAaIjCg=; b=Lqx09r7+P63CZvLzEGEDL0uOTZeO/s26FbByWHeGJ1n7nOIxKsE1UXqDfldmqaZTKH Gse1kFdFIIb0N09gKhG/eWwLQC5KAM/jXs12Ba+3mY5jhQYYYUJTBowkarLKzuTbxXWk lNaz3TEdJwyZDtHoHss7PDWWQi2fHb0AhTsUQ5qOik29Z5mSA2gK9sO2nkpimESw+kjr MnXfdqx49jUBIsT7mAlXTtmkI+FnXOl/u0uJ7Db5ko+5X1MgkTwxny9l2juuh82duC/6 8pcx/n9G3afmZF30SBMB0zKAxL/asyFIHHF1RSRvNCDeJikEPXujNV5tPnPUpyZFMekJ vVXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/fHS4JZ6NTiAMWoTmk+f2h360uLuiAqGO28JRAaIjCg=; b=lrCmX3pmH+GCMwCsJKM0HIILG2vFCio/kqB0Tw6aQDD5MI8yzxKzK2b1MY2iu4HQhV 4woaEhUoQozo3FwAYbbtxQjCjaFlkPGEoRdWlYLI/b04R/i9N01A5dQVuOIReciYgf84 kCSd7tEcRTsBkxBzzdfnAMooVzeuyEdzug5PShPwK3vphO7PrrJ/a2sES/BdE+rWjb0B SrnIWNRuFGxwCDIMsQk0Y55/RNQpoENQUg4no9bJ+492oDzkLuDPFRSrHtRL9b0u0ZVx g5gCfjsXIe50ar6R7mXc34bMHova9izQ3T+Vup7SC3qP2a1HsOlST1I9jh8ass6h1PPU bPaw== X-Gm-Message-State: AOAM531H8HQnXCGSX4f+sLv6yQdZ52ss0CtHYr25Vz5gQ8pou/TAn6Lb DfLA8IVgRndHcUUaCelR0Co= X-Google-Smtp-Source: ABdhPJxvOiaOjt9dqdR33UJkVITr0YjNchkctX2ILPK0T5GLwCiT4LZAsrVrwRABtUfkiA3Lcg6juw== X-Received: by 2002:ac2:5335:: with SMTP id f21mr3268841lfh.114.1597363637850; Thu, 13 Aug 2020 17:07:17 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:17 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 15/36] PM / devfreq: tegra30: Add error messages to tegra_devfreq_target() Date: Fri, 14 Aug 2020 03:06:00 +0300 Message-Id: <20200814000621.8415-16-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" It's useful to now when something goes wrong instead of failing silently, so let's add error messages to tegra_devfreq_target() to prevent situation where it fails silently. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra30-devfreq.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c index 6c2f56b34535..a0d6f628aaa4 100644 --- a/drivers/devfreq/tegra30-devfreq.c +++ b/drivers/devfreq/tegra30-devfreq.c @@ -641,12 +641,16 @@ static int tegra_devfreq_target(struct device *dev, unsigned long *freq, dev_pm_opp_put(opp); err = clk_set_min_rate(tegra->emc_clock, rate * KHZ); - if (err) + if (err) { + dev_err(dev, "Failed to set min rate: %d\n", err); return err; + } err = clk_set_rate(tegra->emc_clock, 0); - if (err) + if (err) { + dev_err(dev, "Failed to set rate: %d\n", err); goto restore_min_rate; + } return 0; From patchwork Fri Aug 14 00:06:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716593 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B0E17722 for ; Mon, 17 Aug 2020 07:07:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E98E2072D for ; Mon, 17 Aug 2020 07:07:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="my3A4tKV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E98E2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9916C6E4E3; Mon, 17 Aug 2020 07:06:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 978146EAC6 for ; Fri, 14 Aug 2020 00:07:20 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id t23so8128393ljc.3 for ; Thu, 13 Aug 2020 17:07:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wfJYL8aXUf9lRrXprT0mqkyze705HA4O8j1DWQetbEI=; b=my3A4tKVBigkrRYLF1Krc4GOtlJzt0P2g/74fhD9KzbIrJF9Rg1/HqU0XunxgkRVXJ 0FdyKYeH4eUOR4RPJYf3FiJcF7epo3GUGlRNEqvrbmMe9iqUMSIxNckhigAteTzaLd1I 2Io7dwqd0cJI7yaz59glwIEHCaM8CGHDJPsjz0usOWF8ybTnxeYx5kBM6dE6Nyj6REzd J76Z6dFcRURlrNDn0wL97VmnHxgv+HGrJBgBlZE58Ok6kj2NH3svnBCl50rsFBI/pVvk TbPF//ryb3sRYuAXPlKp7Lm7zEEOAnpyzWsv0v8SutNb2hj0pcW6hm4PDcCC+HOJ5RP0 6JIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wfJYL8aXUf9lRrXprT0mqkyze705HA4O8j1DWQetbEI=; b=Mhe7cSkQprnFSsLILtcqq6GtYOHkxc+TUzyUNxsPS7THpheKj9IdW9Gwm7TOClFI7a Gq7ha3/5IT5rZIxcPzOt0VWuPpIa/04EKNCse/8w7z9728qWpvZf5/0fhLstHVnVdP0F Z/HPi5HMwjmTqCOQRxwV1EOlxt/dVJlm0YL4WeS6Sthz4ZYXokbGYjp0fZWnK+lmSgSc SSZIyzerBmpaHRSEZDI41SCuK/ETyZu0c3OCnlOqoBT38T9dlXQzExjgz8HYF28ZuiEy vNv319ILLNMH3JXm4qdTjV0GaD1CCkPnGL25g5WAXotBPH9XP7RoqNKJZA5Xx1rzojv+ j+aQ== X-Gm-Message-State: AOAM530tiSxj43dSRk429FPS3K9N8ZmJoGtU1+nygfWjuzI1sBEOr6tc C4KhvBqeG0Y8XB2vWNWbNeI= X-Google-Smtp-Source: ABdhPJxBvuBmhhAkFkBbI6TMp1X9JwSDrFst/K/Lm16UeyfuogFsx1dcqkjUA2IrQ44jEvFcr159wA== X-Received: by 2002:a2e:a556:: with SMTP id e22mr88364ljn.317.1597363639026; Thu, 13 Aug 2020 17:07:19 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:18 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 16/36] PM / devfreq: tegra20: Adjust clocks conversion ratio and polling interval Date: Fri, 14 Aug 2020 03:06:01 +0300 Message-Id: <20200814000621.8415-17-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current conversion ratio results in a higher frequency than needed, that is not very actual now since the Display Controller driver got support for memory bandwidth management and hence memory frequency can go lower now without bad consequences. Since memory freq now goes to a lower rates, the responsiveness of interactive applications become worse due to a quite high polling interval value that is currently set to 500ms. Changing polling interval to 30ms results in a good responsiveness of the system. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra20-devfreq.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c index bc43284996de..ebfc5ac9e5c3 100644 --- a/drivers/devfreq/tegra20-devfreq.c +++ b/drivers/devfreq/tegra20-devfreq.c @@ -79,16 +79,12 @@ static int tegra_devfreq_get_dev_status(struct device *dev, /* * EMC_COUNT returns number of memory events, that number is lower - * than the number of clocks. Conversion ratio of 1/8 results in a - * bit higher bandwidth than actually needed, it is good enough for - * the time being because drivers don't support requesting minimum - * needed memory bandwidth yet. - * - * TODO: adjust the ratio value once relevant drivers will support - * memory bandwidth management. + * than the number of total EMC clocks over the sampling period. + * The clocks number is converted to maximum possible number of + * memory events using the ratio of 1/4. */ stat->busy_time = readl_relaxed(tegra->regs + MC_STAT_EMC_COUNT); - stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 8; + stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 4; stat->current_frequency = clk_get_rate(tegra->emc_clock); writel_relaxed(EMC_GATHER_CLEAR, tegra->regs + MC_STAT_CONTROL); @@ -98,7 +94,7 @@ static int tegra_devfreq_get_dev_status(struct device *dev, } static struct devfreq_dev_profile tegra_devfreq_profile = { - .polling_ms = 500, + .polling_ms = 30, .target = tegra_devfreq_target, .get_dev_status = tegra_devfreq_get_dev_status, }; From patchwork Fri Aug 14 00:06:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716571 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16C2513A4 for ; Mon, 17 Aug 2020 07:07:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E92992072D for ; Mon, 17 Aug 2020 07:07:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NiP4ZDbq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E92992072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7068B6E48F; Mon, 17 Aug 2020 07:06:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x141.google.com (mail-lf1-x141.google.com [IPv6:2a00:1450:4864:20::141]) by gabe.freedesktop.org (Postfix) with ESMTPS id B5A2C6EABF for ; Fri, 14 Aug 2020 00:07:21 +0000 (UTC) Received: by mail-lf1-x141.google.com with SMTP id i80so3925159lfi.13 for ; Thu, 13 Aug 2020 17:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L79iwZ0bcQ/bYNErMnkgdiSpet8EKxInzRHfHgz6Aeo=; b=NiP4ZDbqClOIWz3kunOdbowHssHlDerKEVLkW3GcU/ITVXqORlahFtc4DpJ823T7Af 0ENPwrfZBrqMpBHcZWNy1lsAJQe9lPJFaxz5X0U0Uw/qvjvdBB38amJO0/lRoh/2T7rc bmC9+TscwV6l7JaKxeBOYJz6Tw6EhIEMVnFJ1/BGO26ek3M0YvmA4qgZODGwVVve8AYs DAH8/tlNlcfuooDTjoXqhYxv0Bs2SDyXjAFOn8YAr5INCfa3LZ6Ccec+/mIUyvX6OBka lsnEFgX1MBorRQwODElFfUhPq1daWwOQQY8cx3cqLEdL4CZCfszxsgSdTtgBiuPskxcz lWdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L79iwZ0bcQ/bYNErMnkgdiSpet8EKxInzRHfHgz6Aeo=; b=F5tun0VBTZyidqwb+jAftAzbvC/xx7lj97ADDRV948TYwqwyvcXIEwqYDzBnHbgQO7 9aMkhtl8nxoDLejhCIVoxcsMdFPW504m0GVNkY+jp6Q133vz66CWzER69AxmnWKlVSru G/017Nds5NERfUKWrwvflEmD0Q7m60jZMnFGydln5v8xtk9ocEyTfdYrDR4hOn0GI10O RTdtuorZrW1k480PtpQWephFPi70R2Ur6fis9tjxB/I2KRHQooK+ieM7BuU68qitNAkM uXrOCeFqN1gyD0zNd/OXOtslprCzMTXB2DD6EIbsPQQYaIO5zZE5wz9d9/uymFlEjMRO cfUQ== X-Gm-Message-State: AOAM531Jdnmu1SA5OVsDjFfFG+r/vAjIy3kdx3bdvfH2KDxJ+HXtS+p+ FVdwRGgXHOeWJUdy3gkw/GI= X-Google-Smtp-Source: ABdhPJw1OxzpVPy0ME8CmE74TISYPXIcWkGALKPr7LrdTvMm/viQPl/RwghQDZFc4M8Wqub9nLtTjg== X-Received: by 2002:a19:c501:: with SMTP id w1mr3142820lfe.172.1597363640159; Thu, 13 Aug 2020 17:07:20 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:19 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 17/36] PM / devfreq: tegra20: Relax Kconfig dependency Date: Fri, 14 Aug 2020 03:06:02 +0300 Message-Id: <20200814000621.8415-18-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Tegra EMC driver now could be compiled as a loadable kernel module. Currently devfreq driver depends on the EMC/MC drivers in Kconfig, and thus, devfreq is forced to be a kernel module if EMC is compiled as a module. This build dependency could be relaxed since devfreq driver checks MC/EMC presence on probe, allowing kernel configuration where devfreq is a built-in driver and EMC driver is a loadable module. This change puts Tegra20 devfreq Kconfig entry on a par with the Tegra30 devfreq entry. Acked-by: Chanwoo Choi Signed-off-by: Dmitry Osipenko --- drivers/devfreq/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index 37dc40d1fcfb..0ee36ae2fa79 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -123,7 +123,7 @@ config ARM_TEGRA_DEVFREQ config ARM_TEGRA20_DEVFREQ tristate "NVIDIA Tegra20 DEVFREQ Driver" - depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST + depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST depends on COMMON_CLK select DEVFREQ_GOV_SIMPLE_ONDEMAND help From patchwork Fri Aug 14 00:06:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716669 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C04013A4 for ; Mon, 17 Aug 2020 07:09:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A4C92072D for ; Mon, 17 Aug 2020 07:09:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HOT+B89K" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3A4C92072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE0B56E520; Mon, 17 Aug 2020 07:07:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFB886EAC7 for ; Fri, 14 Aug 2020 00:07:22 +0000 (UTC) Received: by mail-lf1-x143.google.com with SMTP id b11so3938699lfe.10 for ; Thu, 13 Aug 2020 17:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nMtVCA/+W3wZ2Mh397uGPjY2K7aozwFY+OdCulsbZKY=; b=HOT+B89KfZEhp40OvFSrg3vNw3Hm3bICpJH0SAvreADpTu2pg4jXv2YvjJ1wLkp2P6 yWA6+9wlj34AW5CjCekuXdCkl/15MGl4iEcaWB7n/XfOJ5VxcXAQmBj7dQltMIUh9it5 TV2WV47UuD4xu89RIgrr4+Fbs0pcTFBgs0ryCOPAThtFW7yFYVYBs3ty9efal3a3A6tE O+JYPc3ma4MD5xou6ha7fVkjyqpU4l94e35VbUmS6IInluT0LgEQN7qYzq7vp8QC0CMI 9wRzaLo8FP0NNC7Fe7fv1dRreUrHiapQta7l7GKAxGb0K9FOzK/5fJgGVm1qyrnVyFZs 6WZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nMtVCA/+W3wZ2Mh397uGPjY2K7aozwFY+OdCulsbZKY=; b=S2PTD753yWMn86UNi7wUf55mXEbe5N0wdhVVBbQyyqRYuEiKv+r2ISJ/Jqgdgl4omA hsKZCbBob9YmyAdsvQRPVZhgLibSdbBBPINouxfBfDRIJuhqdpJyFfO0jo6kBsn64A36 5q1XsLDbPHya6WT9s+hyMwZI5aoNtwlLf8FEuE3aJTskkIvyr5YGCkF4xPyF9qkk/c8f Q0Pd3xSIdCwHbUOGbELglarJm1BNHop0IsggcfPzZsx+gCcw2UkDWYQ+Wb/cJ9ESRpNP sSRLKe+LWOoqfS2lMDr630MEjKeGuQJe+r7Ar7e235oS4Mox4Sdnr+vEfFJzvlKZXNSW Fnaw== X-Gm-Message-State: AOAM533vqy8xv66VdahqNTgxm+mGGV73oIIV4EFcECvesRHVK9rV7rLm Di7mBjwMqxdYFX19W8gGYKc= X-Google-Smtp-Source: ABdhPJxuSGGaGXcbC5IRQAu/n2OBRrEBSbs1XGbbyQXsUdDGOM8hvqUGx3Hz5n/nXH8LznMpybJddw== X-Received: by 2002:a05:6512:330c:: with SMTP id k12mr3278745lfe.151.1597363641309; Thu, 13 Aug 2020 17:07:21 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:20 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 18/36] dt-bindings: memory: tegra20: mc: Document new interconnect property Date: Fri, 14 Aug 2020 03:06:03 +0300 Message-Id: <20200814000621.8415-19-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Memory controller is interconnected with memory clients and with the external memory controller. Document new interconnect property which turns memory controller into interconnect provider. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../bindings/memory-controllers/nvidia,tegra20-mc.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt index e55328237df4..739b7c6f2e26 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt @@ -16,6 +16,8 @@ Required properties: IOMMU specifier needed to encode an address. GART supports only a single address space that is shared by all devices, therefore no additional information needed for the address encoding. +- #interconnect-cells : Should be 1. This cell represents memory client. + The assignments may be found in header file . Example: mc: memory-controller@7000f000 { @@ -27,6 +29,7 @@ Example: interrupts = ; #reset-cells = <1>; #iommu-cells = <0>; + #interconnect-cells = <1>; }; video-codec@6001a000 { From patchwork Fri Aug 14 00:06:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716561 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C1F8D13A4 for ; Mon, 17 Aug 2020 07:07:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F67D2072D for ; Mon, 17 Aug 2020 07:07:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="oTqX2EUn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9F67D2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2F1106E45D; Mon, 17 Aug 2020 07:06:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id EA39B6EAC7 for ; Fri, 14 Aug 2020 00:07:23 +0000 (UTC) Received: by mail-lj1-x241.google.com with SMTP id t23so8128486ljc.3 for ; Thu, 13 Aug 2020 17:07:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vGCT3sNWog9i79de3oECaNCIcXqg0vqeqpgOXfgBL2s=; b=oTqX2EUnl8HGI3rFllgGCao9PaM5Hs34AwPJeMF9eTiUMjyHYXZtj+/MuAXb+y52t5 1nr3rx4eILLbhY2W2CXfYI9Osik1Ev1oTRxp+3Qa5v4G+8vMfmNvJP9TKQbs9faYmRKU BomDWe9pUNflgvawX/esQ3OoGvt4ui55B5pn61+MgueKcIhiRhuljfn9kEDE9aTEJpjV h9lLQ6JllmIeq7/n9ZggMjmht6qiDliS8rIf2Ou8SIbzGF9HL/sixX8AOQsj01s09LIS emdPxTSlTXrqx3X+OQUU3Xw6y+uFFDVVQi+l8qsbd4FpX5LLOyP+wQu3BOFYi/KP1VcC NpYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vGCT3sNWog9i79de3oECaNCIcXqg0vqeqpgOXfgBL2s=; b=lRwygDsFGPTQwgfptTu+d252uuRpILrFA1eCjf29ZtzSaFOAyviB6Jt+UoefbdR+AC YGmPrGcdAcbNhfHzFoQbtnPNr6tSVDf4xuINfvhWAfrQZe7CGTlL9MFBMXOZ81T334Bw W+qgtY4Bp4CgSEjusp/EFbM15gwvidQgGIPrBFBQ1uWNXpJHWEeXXoR0+4iwSAJRmPVp IizI6pn2oauEaoQ7otMmJ6LVUKY9gTORatrFSzosobsjPd1u2CQUexpoO+BsXLJREe7w 7JWkhL9VvEJzVvuZUjQGhuHMMYgWm6jsbPCisVFxldnArKUTkJEfdMJqqoY0UfXR7+kG mRJw== X-Gm-Message-State: AOAM530Sho2jvsYtbbJRof0gZcPOleTm9DyCBg4sl+iI+iBHZzllijc6 hIp9dOgSu++jC7hliX1CBVU= X-Google-Smtp-Source: ABdhPJx0a/vfIjLaMytuE/JHr3pwaIdv8cFEDvBL3Mn+6obC4nXwTuYaAYAVzNyWTRpeneXHlaIVGg== X-Received: by 2002:a2e:b708:: with SMTP id j8mr102010ljo.375.1597363642405; Thu, 13 Aug 2020 17:07:22 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:21 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 19/36] dt-bindings: memory: tegra20: emc: Document new interconnect property Date: Fri, 14 Aug 2020 03:06:04 +0300 Message-Id: <20200814000621.8415-20-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" External memory controller is interconnected with memory controller and with external memory. Document new interconnect property which turns external memory controller into interconnect provider. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index add95367640b..f51da7662de4 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -12,6 +12,7 @@ Properties: irrespective of ram-code configuration. - interrupts : Should contain EMC General interrupt. - clocks : Should contain EMC clock. +- #interconnect-cells : Should be 0. Child device nodes describe the memory settings for different configurations and clock rates. @@ -20,6 +21,7 @@ Example: memory-controller@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; + #interconnect-cells = < 0 >; compatible = "nvidia,tegra20-emc"; reg = <0x7000f4000 0x200>; interrupts = <0 78 0x04>; From patchwork Fri Aug 14 00:06:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716529 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D9BEF138C for ; Mon, 17 Aug 2020 07:06:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B843A2072D for ; Mon, 17 Aug 2020 07:06:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gCLmokeJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B843A2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F8286E41F; Mon, 17 Aug 2020 07:06:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x141.google.com (mail-lf1-x141.google.com [IPv6:2a00:1450:4864:20::141]) by gabe.freedesktop.org (Postfix) with ESMTPS id 08DB26EAC4 for ; Fri, 14 Aug 2020 00:07:25 +0000 (UTC) Received: by mail-lf1-x141.google.com with SMTP id i19so3949140lfj.8 for ; Thu, 13 Aug 2020 17:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K2EFJxFHRRzm3oVjJIWeziT+lWBzLWjopR8bsePJKjY=; b=gCLmokeJ8inUJ64Wv4qZoc9xBFaNU6P54dhzlUIu5SlzNuE5ZDDqIAdu0Gnkr2vBSf yvhv83NVNMlBt49BK/TThw7IQ2KUdyCQwfHLOkPkbQMseIz7k81oA60MDiaEPfZXGWAZ g+H8DYJ+DEn7Gm3vwqups1sBZ17Xc2U64wXre5DxnK+5j+pbil+6qN7JQ02tDIhXXIZu ojHm1J+UMxK+iR6aLjRaBm+dFThXqiOGpiIWqsRwSTp7hKcwucfCPHH71BiA02jUnU75 KtBbOpZNSjrruXOKE3EiNa7SnbGd6+cfDjTKoC2RreOLy30CcCrg2zt01SKYrUI1uFJm o51w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K2EFJxFHRRzm3oVjJIWeziT+lWBzLWjopR8bsePJKjY=; b=VZjuXmUzohiJCwOd16A+zbS6Mxx3bjfRPJy5ZRdOsq7Msmya/XMv2GvZhYdUHJgsYF 6spRGGKJq+cYKwpZkJH35AFDsjZvRBRstRxTn6qkGqOHYUoK3xAwIjcUHI0Ujsjru/D5 y8/ID2zFXeonwcXkJFeO+9cfijxgeOBHvS4F3YVz5ihpJN/a4d23EoROA73ZygFSZ7KY GpC0UH1rGLqHW6nQS6+rGrew+0R8GCizi+Thr/XdQt34TcSh2JoK35KrXGrrawplvnsk w1SY5r72IXIsIpkmBIlCKWnCM5oqGNyn4IoA0dA9o89kjXaWySXpGVPBwd0039xf3em5 4s9Q== X-Gm-Message-State: AOAM533KO5Y+hS5hB8ES/jrU27tfbOwW06ymGP249Gh88XpOEQrUSflr C/kgB7t0mgDesz5CgSpscCI= X-Google-Smtp-Source: ABdhPJxkP/AmmrkF2DUBKBVT1VxNCH83s2+ZUFMnRJUNWGq20hs6pISg5ezMRacDLEuvgFM4869JMg== X-Received: by 2002:a19:c7d0:: with SMTP id x199mr3333278lff.205.1597363643504; Thu, 13 Aug 2020 17:07:23 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:22 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 20/36] dt-bindings: memory: tegra30: mc: Document new interconnect property Date: Fri, 14 Aug 2020 03:06:05 +0300 Message-Id: <20200814000621.8415-21-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Memory controller is interconnected with memory clients and with the external memory controller. Document new interconnect property which turns memory controller into interconnect provider. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../bindings/memory-controllers/nvidia,tegra30-mc.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml index 84fd57bcf0dc..5436e6d420bc 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml @@ -57,6 +57,9 @@ properties: "#iommu-cells": const: 1 + "#interconnect-cells": + const: 1 + patternProperties: "^emc-timings-[0-9]+$": type: object @@ -120,6 +123,7 @@ required: - clock-names - "#reset-cells" - "#iommu-cells" + - "#interconnect-cells" additionalProperties: false @@ -135,6 +139,7 @@ examples: #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; emc-timings-1 { nvidia,ram-code = <1>; From patchwork Fri Aug 14 00:06:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716597 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BB975722 for ; Mon, 17 Aug 2020 07:07:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9A55B2072D for ; Mon, 17 Aug 2020 07:07:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ErKBwp+P" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9A55B2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D1C8F6E4B0; Mon, 17 Aug 2020 07:06:51 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2AA546EAC5 for ; Fri, 14 Aug 2020 00:07:26 +0000 (UTC) Received: by mail-lf1-x143.google.com with SMTP id d2so3962644lfj.1 for ; Thu, 13 Aug 2020 17:07:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6hV/jfb1j57ds6uWusc67dwvrbgr9Nuaem2xPT64pOI=; b=ErKBwp+Pi3uw2mPs1tCdGXty9djbWFZh7U9QKleaHXoAfkxBNKfThE66Q/uzNnc7J4 aTk8+/JsZmycsCyPcO8wlyCxP/+7dhTSQleHzgB8RAXh9y9JX/qoA3h0Dt4KqGsgqWgT 32US2OzxXAYh3P3Bq+YMOkgwj1jgCvZwihVWC43so56FI4FPSpixkmxH7Ryz0yw9gdcO oycjad2ZwnRCk/P+MMGMiuHDdDaSqD6SW/HA2t+uraoAPUbv+yCSmeRz8aO8ak/Vfyco dauYMCWTVOLrANbGWhYaug2aCunXB+Mmt8gqYzR6ZB7AEUZVQQHPqWg9rQyiGNg8aABC xSIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6hV/jfb1j57ds6uWusc67dwvrbgr9Nuaem2xPT64pOI=; b=jCATUlbXzn3FDkuq2TYoz5mYFjp6eOV+XEWNNyzK8/BFjuX0EjNSlZTnkWXK10sCNQ RlfA8KQSK+Ncdwio4kTz3bssC8Q0b/TuBdcQQqy22yABR4hLN63cY7tRAweC7eJO80kt w3y73Z5TB/r0jUn4UbNZF11B50RUBOg1h445NYCP1rPALXgeoRca/e+LNZrLS3LhbXgP F29aVCjJJoSSzpF+HkcXiWU3o4hlJsfM0ss2SiXSA9b0WMqeV2QtgXYycGozVU8Ea7hZ TnZjCsCKr65Y0yKRRJvSsJSzIkrDfvVyE7a5WTRWuZBICs9HORGs8dSP69dTSL2Piogc 6+lA== X-Gm-Message-State: AOAM532GNZ+e8daSUs3RszFudk3rR1QA9aeIIgoStjLuB6VKY135QyTV oN6b8Zflur1bCjAQ+B1CgSw= X-Google-Smtp-Source: ABdhPJyX4+8v8JUfhatSVHBEDRahqnCfgVnO8HrDC7HMA1cGJSRRGzDZfveHa/V3VlNsHtHH294fRg== X-Received: by 2002:ac2:58c6:: with SMTP id u6mr3340219lfo.105.1597363644627; Thu, 13 Aug 2020 17:07:24 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:24 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 21/36] dt-bindings: memory: tegra30: emc: Document new interconnect property Date: Fri, 14 Aug 2020 03:06:06 +0300 Message-Id: <20200814000621.8415-22-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" External memory controller is interconnected with memory controller and with external memory. Document new interconnect property which turns external memory controller into interconnect provider. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../bindings/memory-controllers/nvidia,tegra30-emc.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml index 112bae2fcbbd..c243986db420 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml @@ -31,6 +31,9 @@ properties: interrupts: maxItems: 1 + "#interconnect-cells": + const: 0 + nvidia,memory-controller: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -214,6 +217,7 @@ required: - interrupts - clocks - nvidia,memory-controller + - "#interconnect-cells" additionalProperties: false @@ -227,6 +231,8 @@ examples: nvidia,memory-controller = <&mc>; + #interconnect-cells = <0>; + emc-timings-1 { nvidia,ram-code = <1>; From patchwork Fri Aug 14 00:06:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716667 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5E2B7722 for ; Mon, 17 Aug 2020 07:09:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3CBAD2072D for ; Mon, 17 Aug 2020 07:09:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LjWABs2L" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3CBAD2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CEF026E52D; Mon, 17 Aug 2020 07:07:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by gabe.freedesktop.org (Postfix) with ESMTPS id 553B16EAC5 for ; Fri, 14 Aug 2020 00:07:27 +0000 (UTC) Received: by mail-lf1-x143.google.com with SMTP id x24so3927823lfe.11 for ; Thu, 13 Aug 2020 17:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HFEk0KirMECXaGApreWCi4zLZ7fLmALV84sMD4Do+Cs=; b=LjWABs2LqwXF0LYs95lmMG0EVRu/+jUvOBV95SjgjdcjETd+KKOHt3yBD9aScOl1zn +0glTacS5wdzqLIdWXDys93MqiGSru5tsiWDvUbvTgvm/R3GGfDbzXEDOJ4c+I7IwLLg l8IfepttwzID/cu8StavHAA7GdeCxct4uGowdQeR2QhxBH+Dx2D7kMilqweq1pyfz+2g C548B+NR5gbrjKIdp0dSa4UVk7VSsEH2bS63VhaOSZccKGdC9HnbpzX4W7Ioh6LHPPQP nk2EjlFkhHxX2DZXAwBkEQzCIcM2pkTkFHkWQy3SKbWQDH0tPyeVymCH59ZLmud94qbJ EnLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HFEk0KirMECXaGApreWCi4zLZ7fLmALV84sMD4Do+Cs=; b=NO4SDNbnU+OuO2wALlObkVI76ZLXxeAFR8b5euWRioxGhy93HPPoBGrlAcAFMlbVUn 8UJe84h5nR8hdWtSp2fPIZsP3OhcL3sWo4gPclZysh85b3e7ClBDQrSswR8F020f+jte aS8OvhFp7keeMUIEg0DA3b8POK5/WIK48KArzVOzk2eSOj6Ozqds3x5JwVxjljb84jS1 ec6y756N629aApTB8JyYBVFj6aKMMC07pOmUF8MO6CZQoGLssbhJ6cFBzGIOPpcTqnrM 1whqx+qdmpJCssMh1hu/dFAGSz33bJGpZRvDrCQkKbE0AnJPOMa4GtqMU8j31l8tWsUg AK+w== X-Gm-Message-State: AOAM530Y7KwVe7hPI39dnoPNjJuK5IAbH+E7i45Q/CbOcn581GhAOGfz GwfN3Iz8UdWhz/uWHDDOk9M= X-Google-Smtp-Source: ABdhPJx+I2scNbfaz6xICRcwkEsNdEsDqDcKjN9e5KYCOsSa71z3zPgCRnMD83mhbpOfBPkaL54irw== X-Received: by 2002:ac2:5e3a:: with SMTP id o26mr3448636lfg.78.1597363645704; Thu, 13 Aug 2020 17:07:25 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:25 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 22/36] dt-bindings: host1x: Document new interconnect properties Date: Fri, 14 Aug 2020 03:06:07 +0300 Message-Id: <20200814000621.8415-23-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Most of Host1x devices have at least one memory client. These clients are directly connected to the memory controller. The new interconnect properties represent the memory client's connection to the memory controller. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring --- .../display/tegra/nvidia,tegra20-host1x.txt | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 47319214b5f6..dd94b8bf4ae3 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -20,6 +20,10 @@ Required properties: - reset-names: Must include the following entries: - host1x +Each host1x client module having to perform DMA through the Memory Controller +should have the interconnect endpoints set to the Memory Client and External +Memory respectively. + The host1x top-level node defines a number of children, each representing one of the following host1x client modules: @@ -36,6 +40,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - mpe + Optional properties: + - interconnects: Must contain entry for the MPE memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - vi: video input Required properties: @@ -65,6 +75,12 @@ of the following host1x client modules: - power-domains: Must include sor powergate node as csicil is in SOR partition. + Optional properties: + - interconnects: Must contain entry for the VI memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - epp: encoder pre-processor Required properties: @@ -78,6 +94,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - epp + Optional properties: + - interconnects: Must contain entry for the EPP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - isp: image signal processor Required properties: @@ -91,6 +113,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - isp + Optional properties: + - interconnects: Must contain entry for the ISP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr2d: 2D graphics engine Required properties: @@ -104,6 +132,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - 2d + Optional properties: + - interconnects: Must contain entry for the GR2D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr3d: 3D graphics engine Required properties: @@ -122,6 +156,12 @@ of the following host1x client modules: - 3d - 3d2 (Only required on SoCs with two 3D clocks) + Optional properties: + - interconnects: Must contain entry for the GR3D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - dc: display controller Required properties: @@ -149,6 +189,10 @@ of the following host1x client modules: - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection - nvidia,edid: supplies a binary EDID blob - nvidia,panel: phandle of a display panel + - interconnects: Must contain entry for the DC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. - hdmi: High Definition Multimedia Interface @@ -297,6 +341,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - vic + Optional properties: + - interconnects: Must contain entry for the VIC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + Example: / { @@ -410,6 +460,15 @@ Example: resets = <&tegra_car 27>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>, + <&mc TEGRA20_MC_DISPLAY0B &emc>, + <&mc TEGRA20_MC_DISPLAY0C &emc>, + <&mc TEGRA20_MC_DISPLAY1B &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -425,6 +484,15 @@ Example: resets = <&tegra_car 26>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>, + <&mc TEGRA20_MC_DISPLAY0BB &emc>, + <&mc TEGRA20_MC_DISPLAY0CB &emc>, + <&mc TEGRA20_MC_DISPLAY1BB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; From patchwork Fri Aug 14 00:06:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716569 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC2A613A4 for ; Mon, 17 Aug 2020 07:07:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B9B0B2072D for ; Mon, 17 Aug 2020 07:07:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hGDR6vm2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B9B0B2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E4BA6E49F; Mon, 17 Aug 2020 07:06:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x144.google.com (mail-lf1-x144.google.com [IPv6:2a00:1450:4864:20::144]) by gabe.freedesktop.org (Postfix) with ESMTPS id 53D056EAC9 for ; Fri, 14 Aug 2020 00:07:28 +0000 (UTC) Received: by mail-lf1-x144.google.com with SMTP id s9so3954433lfs.4 for ; Thu, 13 Aug 2020 17:07:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c4lLacyvLIrYeiWmHP096187UyAJzTy3dGk3a3KhpUo=; b=hGDR6vm2K7Ni7PB/wQvgEm+hWlCQ7V1VblChEk2FsRHY33HSgz0GOr/37DuqkjHQ3m QcGsuw3aDAYr125LkoPZOVo7SGgujRYjGh6qdOzXFlq9I79pXKSq5rzWhKRnZRYwB/z/ LyFyEhQCYfxJ0EqblpXmabXs8wQMN/aP6dBlTG/qDRNCxK+yOaJSHfJ5kpZUM4lT272w eAbvq7R+52o6PTQmUXUVZWGU0q0RlBpIxTerejceGr6Xeq4FJOstfaMFI1iVn6I91ECA ABgwMfsdC0GIKhT/CJbB0sbACQ5EqQ8aEjwKbTnBMwEcGQys6f0UZkyjeanaKHUqHIYg cQZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c4lLacyvLIrYeiWmHP096187UyAJzTy3dGk3a3KhpUo=; b=mUgHc0p/zrmcDMoZu9gGdzcatFtqVxLTDraGWb0Q3W00FPmb0DzW9o3mkFwd3MjTVz Oyjzi+op4jwROn7lNez5jcVOFU6zLHoOarcTXLRfPKoIAUZG3SX03mL6jJ35QZPBNc3h tVYOGWJSOMuLF2UMe7g4Q1Q+8BPw1+yt9Too9tazJqBr68FqOSuqlRgEfCqHsvRMupUG DGnlirpGFo4Ha5iIgbR8BCCmhEcT/N+VQGyBrYlXfJhPXUJ8cUZHH2JtJO0eKzQZ5kRv 6SpUWmlr7qsB9XW8ds433/suHWoWsZYExQPtsMuj2TqHZ/k2bdrnCvK/HAKuPC1E7hYH 7azw== X-Gm-Message-State: AOAM530l2M75tr38lAuCwWbGkSheU9yZEuFTuLh6xnND4HI1UEc69BJJ TIf05Oztir/lUPvGOC3tLtc= X-Google-Smtp-Source: ABdhPJwQ/H+7kNWVYOJxS2dTtm7hib9wkxtGTrvmCQhuP+jenbz3a5BR38399JHmIfCotGH0VsEhog== X-Received: by 2002:a05:6512:1182:: with SMTP id g2mr3355986lfr.126.1597363646810; Thu, 13 Aug 2020 17:07:26 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:26 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 23/36] dt-bindings: memory: tegra20: Add memory client IDs Date: Fri, 14 Aug 2020 03:06:08 +0300 Message-Id: <20200814000621.8415-24-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Each memory client have a unique hardware ID, this patch adds these IDs. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- include/dt-bindings/memory/tegra20-mc.h | 53 +++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h index 35e131eee198..6f8829508ad0 100644 --- a/include/dt-bindings/memory/tegra20-mc.h +++ b/include/dt-bindings/memory/tegra20-mc.h @@ -18,4 +18,57 @@ #define TEGRA20_MC_RESET_VDE 13 #define TEGRA20_MC_RESET_VI 14 +#define TEGRA20_MC_DISPLAY0A 0 +#define TEGRA20_MC_DISPLAY0AB 1 +#define TEGRA20_MC_DISPLAY0B 2 +#define TEGRA20_MC_DISPLAY0BB 3 +#define TEGRA20_MC_DISPLAY0C 4 +#define TEGRA20_MC_DISPLAY0CB 5 +#define TEGRA20_MC_DISPLAY1B 6 +#define TEGRA20_MC_DISPLAY1BB 7 +#define TEGRA20_MC_EPPUP 8 +#define TEGRA20_MC_G2PR 9 +#define TEGRA20_MC_G2SR 10 +#define TEGRA20_MC_MPEUNIFBR 11 +#define TEGRA20_MC_VIRUV 12 +#define TEGRA20_MC_AVPCARM7R 13 +#define TEGRA20_MC_DISPLAYHC 14 +#define TEGRA20_MC_DISPLAYHCB 15 +#define TEGRA20_MC_FDCDRD 16 +#define TEGRA20_MC_G2DR 17 +#define TEGRA20_MC_HOST1XDMAR 18 +#define TEGRA20_MC_HOST1XR 19 +#define TEGRA20_MC_IDXSRD 20 +#define TEGRA20_MC_MPCORER 21 +#define TEGRA20_MC_MPE_IPRED 22 +#define TEGRA20_MC_MPEAMEMRD 23 +#define TEGRA20_MC_MPECSRD 24 +#define TEGRA20_MC_PPCSAHBDMAR 25 +#define TEGRA20_MC_PPCSAHBSLVR 26 +#define TEGRA20_MC_TEXSRD 27 +#define TEGRA20_MC_VDEBSEVR 28 +#define TEGRA20_MC_VDEMBER 29 +#define TEGRA20_MC_VDEMCER 30 +#define TEGRA20_MC_VDETPER 31 +#define TEGRA20_MC_EPPU 32 +#define TEGRA20_MC_EPPV 33 +#define TEGRA20_MC_EPPY 34 +#define TEGRA20_MC_MPEUNIFBW 35 +#define TEGRA20_MC_VIWSB 36 +#define TEGRA20_MC_VIWU 37 +#define TEGRA20_MC_VIWV 38 +#define TEGRA20_MC_VIWY 39 +#define TEGRA20_MC_G2DW 40 +#define TEGRA20_MC_AVPCARM7W 41 +#define TEGRA20_MC_FDCDWR 42 +#define TEGRA20_MC_HOST1XW 43 +#define TEGRA20_MC_ISPW 44 +#define TEGRA20_MC_MPCOREW 45 +#define TEGRA20_MC_MPECSWR 46 +#define TEGRA20_MC_PPCSAHBDMAW 47 +#define TEGRA20_MC_PPCSAHBSLVW 48 +#define TEGRA20_MC_VDEBSEVW 49 +#define TEGRA20_MC_VDEMBEW 50 +#define TEGRA20_MC_VDETPMW 51 + #endif From patchwork Fri Aug 14 00:06:09 2020 Content-Type: text/plain; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:27 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 24/36] dt-bindings: memory: tegra30: Add memory client IDs Date: Fri, 14 Aug 2020 03:06:09 +0300 Message-Id: <20200814000621.8415-25-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Each memory client have a unique hardware ID, this patch adds these IDs. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- include/dt-bindings/memory/tegra30-mc.h | 67 +++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/include/dt-bindings/memory/tegra30-mc.h b/include/dt-bindings/memory/tegra30-mc.h index 169f005fbc78..930f708aca17 100644 --- a/include/dt-bindings/memory/tegra30-mc.h +++ b/include/dt-bindings/memory/tegra30-mc.h @@ -41,4 +41,71 @@ #define TEGRA30_MC_RESET_VDE 16 #define TEGRA30_MC_RESET_VI 17 +#define TEGRA30_MC_PTCR 0 +#define TEGRA30_MC_DISPLAY0A 1 +#define TEGRA30_MC_DISPLAY0AB 2 +#define TEGRA30_MC_DISPLAY0B 3 +#define TEGRA30_MC_DISPLAY0BB 4 +#define TEGRA30_MC_DISPLAY0C 5 +#define TEGRA30_MC_DISPLAY0CB 6 +#define TEGRA30_MC_DISPLAY1B 7 +#define TEGRA30_MC_DISPLAY1BB 8 +#define TEGRA30_MC_EPPUP 9 +#define TEGRA30_MC_G2PR 10 +#define TEGRA30_MC_G2SR 11 +#define TEGRA30_MC_MPEUNIFBR 12 +#define TEGRA30_MC_VIRUV 13 +#define TEGRA30_MC_AFIR 14 +#define TEGRA30_MC_AVPCARM7R 15 +#define TEGRA30_MC_DISPLAYHC 16 +#define TEGRA30_MC_DISPLAYHCB 17 +#define TEGRA30_MC_FDCDRD 18 +#define TEGRA30_MC_FDCDRD2 19 +#define TEGRA30_MC_G2DR 20 +#define TEGRA30_MC_HDAR 21 +#define TEGRA30_MC_HOST1XDMAR 22 +#define TEGRA30_MC_HOST1XR 23 +#define TEGRA30_MC_IDXSRD 24 +#define TEGRA30_MC_IDXSRD2 25 +#define TEGRA30_MC_MPE_IPRED 26 +#define TEGRA30_MC_MPEAMEMRD 27 +#define TEGRA30_MC_MPECSRD 28 +#define TEGRA30_MC_PPCSAHBDMAR 29 +#define TEGRA30_MC_PPCSAHBSLVR 30 +#define TEGRA30_MC_SATAR 31 +#define TEGRA30_MC_TEXSRD 32 +#define TEGRA30_MC_TEXSRD2 33 +#define TEGRA30_MC_VDEBSEVR 34 +#define TEGRA30_MC_VDEMBER 35 +#define TEGRA30_MC_VDEMCER 36 +#define TEGRA30_MC_VDETPER 37 +#define TEGRA30_MC_MPCORELPR 38 +#define TEGRA30_MC_MPCORER 39 +#define TEGRA30_MC_EPPU 40 +#define TEGRA30_MC_EPPV 41 +#define TEGRA30_MC_EPPY 42 +#define TEGRA30_MC_MPEUNIFBW 43 +#define TEGRA30_MC_VIWSB 44 +#define TEGRA30_MC_VIWU 45 +#define TEGRA30_MC_VIWV 46 +#define TEGRA30_MC_VIWY 47 +#define TEGRA30_MC_G2DW 48 +#define TEGRA30_MC_AFIW 49 +#define TEGRA30_MC_AVPCARM7W 50 +#define TEGRA30_MC_FDCDWR 51 +#define TEGRA30_MC_FDCDWR2 52 +#define TEGRA30_MC_HDAW 53 +#define TEGRA30_MC_HOST1XW 54 +#define TEGRA30_MC_ISPW 55 +#define TEGRA30_MC_MPCORELPW 56 +#define TEGRA30_MC_MPCOREW 57 +#define TEGRA30_MC_MPECSWR 58 +#define TEGRA30_MC_PPCSAHBDMAW 59 +#define TEGRA30_MC_PPCSAHBSLVW 60 +#define TEGRA30_MC_SATAW 61 +#define TEGRA30_MC_VDEBSEVW 62 +#define TEGRA30_MC_VDEDBGW 63 +#define TEGRA30_MC_VDEMBEW 64 +#define TEGRA30_MC_VDETPMW 65 + #endif From patchwork Fri Aug 14 00:06:10 2020 Content-Type: text/plain; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:28 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 25/36] ARM: tegra: Add interconnect properties to Tegra20 device-tree Date: Fri, 14 Aug 2020 03:06:10 +0300 Message-Id: <20200814000621.8415-26-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add interconnect properties to the memory controller, external memory controller and the display controller nodes in order to describe hardware interconnection. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra20.dtsi | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 72a4211a618f..629ad101c43b 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -111,6 +111,15 @@ dc@54200000 { nvidia,head = <0>; + interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>, + <&mc TEGRA20_MC_DISPLAY0B &emc>, + <&mc TEGRA20_MC_DISPLAY0C &emc>, + <&mc TEGRA20_MC_DISPLAY1B &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -128,6 +137,15 @@ dc@54240000 { nvidia,head = <1>; + interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>, + <&mc TEGRA20_MC_DISPLAY0BB &emc>, + <&mc TEGRA20_MC_DISPLAY0CB &emc>, + <&mc TEGRA20_MC_DISPLAY1BB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -630,15 +648,17 @@ mc: memory-controller@7000f000 { interrupts = ; #reset-cells = <1>; #iommu-cells = <0>; + #interconnect-cells = <1>; }; - memory-controller@7000f400 { + emc: memory-controller@7000f400 { compatible = "nvidia,tegra20-emc"; reg = <0x7000f400 0x200>; interrupts = ; clocks = <&tegra_car TEGRA20_CLK_EMC>; #address-cells = <1>; #size-cells = <0>; + #interconnect-cells = <0>; }; fuse@7000f800 { From patchwork Fri Aug 14 00:06:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716599 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1FC9C13A4 for ; Mon, 17 Aug 2020 07:07:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F261120758 for ; Mon, 17 Aug 2020 07:07:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BB3KPQU7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F261120758 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 720796E49C; Mon, 17 Aug 2020 07:06:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id B18216EAC2 for ; Fri, 14 Aug 2020 00:07:31 +0000 (UTC) Received: by mail-lj1-x241.google.com with SMTP id m22so8091507ljj.5 for ; Thu, 13 Aug 2020 17:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8Ppkj+RIlaEU3Zu2q0tCXAcFcQlT6qlxYEcEES4iGaE=; b=BB3KPQU7JeQ0tqGoKIPs4Y6zvE8d5MGvvct73+HhLFFXmP1t37pSydMO9RqQ1ZmrAg /rJ+g25PAN9s76EfX/wLWfA6S+y54Djp3AKdTlmlwPBalx3jFgb07ROTmTGBxR4g7JCh NZhoicVBwsir3e13/oEhJE5w9Wqje2f+ps0ePbNQyyZWe3E4uQQLoVO59OSobzJb6F00 uVm9QJk9J/kJvKYWYaN507EGhynvnjL0TMHBbrN1w357RgjiJe/rx26DhebG0kjsjccu a+8n/FUznFJKr/ercQ/d2erwNy8KcXGAhouco7p1sZQ3AllvhGUilbFSwSO4mNPZdyJQ 7H6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8Ppkj+RIlaEU3Zu2q0tCXAcFcQlT6qlxYEcEES4iGaE=; b=fzNP6bcPg1BJjQSH8sTwFg+3w0pp7aDJRpliYDYelvbUtyciXWKtjCe25PYbU7kVVf PXkkZfOSnrEOgZN0bLr6EsVLv9l5pKh1zeC5EvpW5qqFC13h/NsNhFr2fLyS5tt9bWj9 kdpSzp1yTXf1Ia6ZxbkhR3Pzq/AuhevkC9E9TXa2LXIR/4YAxX+KxM7MF1tf1qxHcCfn O94eoX70uS/uaNJVAewMDXb4ziL1o33If88MOMeHEzKjb93OCAZz9DkQtmsgH8rwkgKB Gny1h6XcrWZNU4UjVH2ExtLeFURipYUgisICqsVqBkffX+Du05vtFzhnDTNzQNkRxMHU Sj1w== X-Gm-Message-State: AOAM531DgE3xqUzakMXdbjyTSY3nO0/nGFFTVcCfV9EAwu5NdSeUVM2s eyoY3jLjgxIDOaO8pBLw/SUMzpQh X-Google-Smtp-Source: ABdhPJwKJRI45dHuv3qf37mXXTOArzIZ2jEK6i1mUDWkeZJB2xD0qRl+5lpZW3otxUBpW9yJG4VQ8g== X-Received: by 2002:a2e:9792:: with SMTP id y18mr105828lji.187.1597363650081; Thu, 13 Aug 2020 17:07:30 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:29 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 26/36] ARM: tegra: Add interconnect properties to Tegra30 device-tree Date: Fri, 14 Aug 2020 03:06:11 +0300 Message-Id: <20200814000621.8415-27-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add interconnect properties to the memory controller, external memory controller and the display controller nodes in order to describe hardware interconnection. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra30.dtsi | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index aeae8c092d41..b28360d3c039 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -210,6 +210,15 @@ dc@54200000 { nvidia,head = <0>; + interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>, + <&mc TEGRA30_MC_DISPLAY0B &emc>, + <&mc TEGRA30_MC_DISPLAY0C &emc>, + <&mc TEGRA30_MC_DISPLAY1B &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -229,6 +238,15 @@ dc@54240000 { nvidia,head = <1>; + interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>, + <&mc TEGRA30_MC_DISPLAY0BB &emc>, + <&mc TEGRA30_MC_DISPLAY0CB &emc>, + <&mc TEGRA30_MC_DISPLAY1BB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -748,15 +766,18 @@ mc: memory-controller@7000f000 { #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; }; - memory-controller@7000f400 { + emc: memory-controller@7000f400 { compatible = "nvidia,tegra30-emc"; reg = <0x7000f400 0x400>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_EMC>; nvidia,memory-controller = <&mc>; + + #interconnect-cells = <0>; }; fuse@7000f800 { From patchwork Fri Aug 14 00:06:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716583 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9DDC913B1 for ; Mon, 17 Aug 2020 07:07:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C64020772 for ; Mon, 17 Aug 2020 07:07:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OTf6IwGA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C64020772 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7A2186E4DD; Mon, 17 Aug 2020 07:06:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id D45A26EAC2 for ; Fri, 14 Aug 2020 00:07:32 +0000 (UTC) Received: by mail-lj1-x242.google.com with SMTP id w25so8073241ljo.12 for ; Thu, 13 Aug 2020 17:07:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FNoCBPhMC1dV6ILBeQvIDFEBRB/BtZCdD2Bx36EwqBU=; b=OTf6IwGA9qfxMGMjtKqvT0y3nlwRIlb1OJxtcv91HvsY5yS+KSsPqub9A4xhaAciKd 3zkAMX+S7sEo8fiF5WBkTlnXx8qiOesKOpOu7DMpR3M93hLiIH7yA1PhjvQ0hpYXVOU2 L1fGsdBIgYSWNy9bCl3LMVcmJlwr+c5UFiy1frGVcgpfEDUpEQc+DImwMoFrcailBk6d 8TGysmaHbMFMfwx1k0A2rQsQWGEEQenTqkvsFrfVBjHt1gSFWUXjZkhj8LIBTl8RLSKt tWXxakoPwrm5OeSYcjINEEmk58pB/9qDpZ4+CI79tmqaRXBFFk96/vPR3Ly6HGLUDMAI d9gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FNoCBPhMC1dV6ILBeQvIDFEBRB/BtZCdD2Bx36EwqBU=; b=ZRqSlEFk4zwMafwrPrlBq1p6dh5tR6s+xmdBRstsbUOFNM6kegYXuAcVJFY7gB0Vaj paBBxaIBITq0LQwiDP3FgsFeIO9ydIfkzTlmajIhAGg9GJkVzmaQWijGMqUaN06xZLj8 FGagv7gE8jGDCVfIo/mHHzmlFnquI/JssWxpR10JNJgDDy0Kn7ZPEgoe3e3IFfrvPSJz aAmm6D++4g+FZdydDQBnUM4LRWS1KsD3FFPQX0SRzum6iYi2RLJ2KHUdU/BZ7kkDLfFS Zjh16o/ldUFW1Uy4cIMuXntZc/jJf9U8v+qkAWeLLoeZJkwFDEwNFXWSdwzj2YitM9J/ txEQ== X-Gm-Message-State: AOAM533mGLgBSeDUBJO1aiB7XgGdsBqc762kcGgV48SOC7PUnfT+PQi3 gDtDfwWoB1D0aYQ3Zg4BcHY= X-Google-Smtp-Source: ABdhPJwW4upFKTbOr6tJ4lJ6Da9bgBpluIubJAWNL37C3hLX+sBNxzvPyaXtKuz3ZyGyeHhNNK5Bzw== X-Received: by 2002:a2e:a16f:: with SMTP id u15mr115098ljl.5.1597363651223; Thu, 13 Aug 2020 17:07:31 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:30 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 27/36] memory: tegra-mc: Register as interconnect provider Date: Fri, 14 Aug 2020 03:06:12 +0300 Message-Id: <20200814000621.8415-28-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Now memory controller is a memory interconnection provider. This allows us to use interconnect API in order to change memory configuration. Signed-off-by: Dmitry Osipenko Acked-by: Georgi Djakov --- drivers/memory/tegra/Kconfig | 1 + drivers/memory/tegra/mc.c | 118 +++++++++++++++++++++++++++++++++++ drivers/memory/tegra/mc.h | 8 +++ include/soc/tegra/mc.h | 3 + 4 files changed, 130 insertions(+) diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig index 5bf75b316a2f..7055fdef2c32 100644 --- a/drivers/memory/tegra/Kconfig +++ b/drivers/memory/tegra/Kconfig @@ -3,6 +3,7 @@ config TEGRA_MC bool "NVIDIA Tegra Memory Controller support" default y depends on ARCH_TEGRA + select INTERCONNECT help This driver supports the Memory Controller (MC) hardware found on NVIDIA Tegra SoCs. diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 772aa021b5f6..46759ddaa3c9 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -594,6 +594,122 @@ static __maybe_unused irqreturn_t tegra20_mc_irq(int irq, void *data) return IRQ_HANDLED; } +static int tegra_mc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + /* + * The plan is to populate this function with a latency allowness + * programming sometime later, for now this a dummy callback. + */ + return 0; +} + +static int tegra_mc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +/* + * Memory Controller (MC) has few Memory Clients that are issuing memory + * bandwidth allocation requests to the MC interconnect provider. The MC + * provider aggregates the requests and then sends the aggregated request + * up to the External Memory Controller (EMC) interconnect provider which + * re-configures hardware interface to External Memory (EMEM) in accordance + * to the required bandwidth. Each MC interconnect node represents an + * individual Memory Client. + * + * Memory interconnect topology: + * + * +----+ + * +--------+ | | + * | TEXSRD +--->+ | + * +--------+ | | + * | | +-----+ +------+ + * ... | MC +--->+ EMC +--->+ EMEM | + * | | +-----+ +------+ + * +--------+ | | + * | DISP.. +--->+ | + * +--------+ | | + * +----+ + */ +static int tegra_mc_interconnect_setup(struct tegra_mc *mc) +{ + struct icc_onecell_data *data; + struct icc_node *node; + unsigned int num_nodes; + unsigned int i; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(mc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + num_nodes = mc->soc->num_clients; + + data = devm_kzalloc(mc->dev, struct_size(data, nodes, num_nodes), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + mc->provider.dev = mc->dev; + mc->provider.set = tegra_mc_icc_set; + mc->provider.data = data; + mc->provider.xlate = of_icc_xlate_onecell; + mc->provider.aggregate = tegra_mc_icc_aggregate; + + err = icc_provider_add(&mc->provider); + if (err) + goto err_msg; + + /* create Memory Controller node */ + node = icc_node_create(TEGRA_ICC_MC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "Memory Controller"; + icc_node_add(node, &mc->provider); + + /* link Memory Controller to External Memory Controller */ + err = icc_link_create(node, TEGRA_ICC_EMC); + if (err) + goto remove_nodes; + + for (i = 0; i < num_nodes; i++) { + /* create MC client node */ + node = icc_node_create(mc->soc->clients[i].id); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = mc->soc->clients[i].name; + icc_node_add(node, &mc->provider); + + /* link Memory Client to Memory Controller */ + err = icc_link_create(node, TEGRA_ICC_MC); + if (err) + goto remove_nodes; + + data->nodes[i] = node; + } + data->num_nodes = num_nodes; + + return 0; + +remove_nodes: + icc_nodes_remove(&mc->provider); +del_provider: + icc_provider_del(&mc->provider); +err_msg: + dev_err(mc->dev, "failed to initialize ICC: %d\n", err); + + return err; +} + static int tegra_mc_probe(struct platform_device *pdev) { struct resource *res; @@ -702,6 +818,8 @@ static int tegra_mc_probe(struct platform_device *pdev) } } + tegra_mc_interconnect_setup(mc); + return 0; } diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index afa3ba45c9e6..abeb6a2cc36a 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -115,4 +115,12 @@ extern const struct tegra_mc_soc tegra132_mc_soc; extern const struct tegra_mc_soc tegra210_mc_soc; #endif +/* + * These IDs are for internal use of Tegra's ICC, the values are chosen + * such that they don't conflict with the device-tree ICC node IDs. + */ +#define TEGRA_ICC_EMC 1000 +#define TEGRA_ICC_EMEM 2000 +#define TEGRA_ICC_MC 3000 + #endif /* MEMORY_TEGRA_MC_H */ diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 1238e35653d1..71de023f9f47 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -7,6 +7,7 @@ #define __SOC_TEGRA_MC_H__ #include +#include #include #include @@ -178,6 +179,8 @@ struct tegra_mc { struct reset_controller_dev reset; + struct icc_provider provider; + spinlock_t lock; }; From patchwork Fri Aug 14 00:06:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716565 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD32A722 for ; Mon, 17 Aug 2020 07:07:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9BE652072D for ; Mon, 17 Aug 2020 07:07:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ui2VOlU7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9BE652072D Authentication-Results: mail.kernel.org; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:31 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 28/36] memory: tegra20-emc: Use devm_platform_ioremap_resource Date: Fri, 14 Aug 2020 03:06:13 +0300 Message-Id: <20200814000621.8415-29-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Utilize that relatively new helper which makes code a bit cleaner. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra20-emc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index a02ffc09c39e..db6a4bcb92fb 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -696,7 +696,6 @@ static int tegra_emc_probe(struct platform_device *pdev) { struct device_node *np; struct tegra_emc *emc; - struct resource *res; int irq, err; /* driver has nothing to do in a case of memory timing absence */ @@ -731,8 +730,7 @@ static int tegra_emc_probe(struct platform_device *pdev) if (err) return err; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - emc->regs = devm_ioremap_resource(&pdev->dev, res); + emc->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(emc->regs)) return PTR_ERR(emc->regs); From patchwork Fri Aug 14 00:06:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716621 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DE1713A4 for ; Mon, 17 Aug 2020 07:08:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E09282072D for ; Mon, 17 Aug 2020 07:08:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R21TWmxx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E09282072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 61BCE6E4F4; Mon, 17 Aug 2020 07:06:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3B4D76EAC5 for ; Fri, 14 Aug 2020 00:07:35 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id v9so8115321ljk.6 for ; Thu, 13 Aug 2020 17:07:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dVHFz53kDMig8b/PTIMbWX4+rnZ9GeLoQIaKPe/jZpc=; b=R21TWmxxJ7H+jIL3Opm1UEXi3SokZUVbcoqbrVPiNcbb4G6bhlFWZBrDsIre8u4yTD ciDFHZdgxHEMoj1l3BgaoYx2RQzDlDkpkx3T89nL9kLamUrX9b0wV8Bg8ebp/84JDXm5 cXrBIhk4LErnn2H89fWIG6ejyPcUUSXF2VwUSIueK6UHbLWjvoC+IBTyy/CQ28h2qcMA bl4e5/62FKcDT7rOEE4Bkw0EW726VSG5INd7NSS86QVmeXXZSzOtxYuBpXLnCaTMa7H/ RPhynoSvLvDhCKUwNrUVHxLAKj6fpLka99A1ol6p7jxSHvXDvXQ+2cqiOdFQ0rAVa6Kn 6rRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dVHFz53kDMig8b/PTIMbWX4+rnZ9GeLoQIaKPe/jZpc=; b=mSYwGGMnyOFfWZDJ5+D3zbSJ5Pr3Ulv7B1cDQD49Ogp+aUsDyxRRV3rQNT3zu2jk82 WGQZYHkTNfDQPVXQ+hf4Y//szSQv8cGJe9qrgRsg4bK27g9lPFMIlBrSiukHQG2y4C2L IiraiphXQykmNXxszkqwFDavDljqOB0PPI080HICPNbv1Ez3gulXkd9buKp70PyU2OAO BRNSCjF8NbtG1/m3rm+NDOysQNqau99+o/Spsqr6SCt/2ae5eFjQH1EVLBa2KcARg/EG B9eGvurmitPaOuP6arE7j+hg6+a/tfOfr3SA7UUfQVABMVRKpwREWH8pJPay+bY+i8+N meqg== X-Gm-Message-State: AOAM530X3U3F4MbsRViTXlOycbnrdjtTIqVwDjaLrgVQcXuTEX6tVqGt LMX5nvzEP4kQspcELFJj3P4= X-Google-Smtp-Source: ABdhPJwf/viuMUW6rG2BT5HAVAYPT3W7KZthL6vT4jLZj+09OiM4K8aCyVgLf7Vs4vOMj9lfozssvA== X-Received: by 2002:a2e:7215:: with SMTP id n21mr118673ljc.242.1597363653670; Thu, 13 Aug 2020 17:07:33 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:33 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 29/36] memory: tegra20-emc: Continue probing if timings are missing in device-tree Date: Fri, 14 Aug 2020 03:06:14 +0300 Message-Id: <20200814000621.8415-30-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" EMC driver will become mandatory after turning it into interconnect provider because interconnect users, like display controller driver, will fail to probe using newer device-trees that have interconnect properties. Thus make EMC driver to probe even if timings are missing in device-tree. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra20-emc.c | 34 ++++++++++++++---------------- 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index db6a4bcb92fb..89e077d797e7 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -386,6 +386,11 @@ tegra_emc_find_node_by_ram_code(struct device *dev) u32 value, ram_code; int err; + if (of_get_child_count(dev->of_node) == 0) { + dev_info(dev, "device-tree doesn't have memory timings\n"); + return NULL; + } + if (!of_property_read_bool(dev->of_node, "nvidia,use-ram-code")) return of_node_get(dev->of_node); @@ -454,6 +459,9 @@ static long emc_round_rate(unsigned long rate, struct tegra_emc *emc = arg; unsigned int i; + if (!emc->num_timings) + return clk_get_rate(emc->clk); + min_rate = min(min_rate, emc->timings[emc->num_timings - 1].rate); for (i = 0; i < emc->num_timings; i++) { @@ -698,13 +706,6 @@ static int tegra_emc_probe(struct platform_device *pdev) struct tegra_emc *emc; int irq, err; - /* driver has nothing to do in a case of memory timing absence */ - if (of_get_child_count(pdev->dev.of_node) == 0) { - dev_info(&pdev->dev, - "EMC device tree node doesn't have memory timings\n"); - return 0; - } - irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "interrupt not specified\n"); @@ -712,23 +713,20 @@ static int tegra_emc_probe(struct platform_device *pdev) return irq; } - np = tegra_emc_find_node_by_ram_code(&pdev->dev); - if (!np) - return -EINVAL; - emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL); - if (!emc) { - of_node_put(np); + if (!emc) return -ENOMEM; - } emc->clk_nb.notifier_call = tegra_emc_clk_change_notify; emc->dev = &pdev->dev; - err = tegra_emc_load_timings_from_dt(emc, np); - of_node_put(np); - if (err) - return err; + np = tegra_emc_find_node_by_ram_code(&pdev->dev); + if (np) { + err = tegra_emc_load_timings_from_dt(emc, np); + of_node_put(np); + if (err) + return err; + } emc->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(emc->regs)) From patchwork Fri Aug 14 00:06:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716641 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 535DD722 for ; Mon, 17 Aug 2020 07:08:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 31FF92072D for ; Mon, 17 Aug 2020 07:08:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jGvznWsX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 31FF92072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:34 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 30/36] memory: tegra20-emc: Register as interconnect provider Date: Fri, 14 Aug 2020 03:06:15 +0300 Message-Id: <20200814000621.8415-31-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Now memory controller is a memory interconnection provider. This allows us to use interconnect API in order to change memory configuration. Signed-off-by: Dmitry Osipenko Acked-by: Georgi Djakov --- drivers/memory/tegra/tegra20-emc.c | 110 +++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index 89e077d797e7..437d9d789941 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -148,6 +149,7 @@ struct emc_timing { struct tegra_emc { struct device *dev; struct notifier_block clk_nb; + struct icc_provider provider; struct clk *clk; void __iomem *regs; @@ -661,6 +663,113 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static inline struct tegra_emc * +to_tegra_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_emc, provider); +} + +static struct icc_node * +emc_of_icc_xlate(struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider = data; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id == TEGRA_ICC_EMEM) + return node; + } + + return ERR_PTR(-EINVAL); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra_emc *emc = to_tegra_emc_provider(dst->provider); + unsigned long long rate = icc_units_to_bps(dst->avg_bw); + unsigned int dram_data_bus_width_bytes = 4; + unsigned int ddr = 2; + int err; + + do_div(rate, ddr * dram_data_bus_width_bytes); + rate = min_t(u64, rate, U32_MAX); + + err = clk_set_min_rate(emc->clk, rate); + if (err) + return err; + + err = clk_set_rate(emc->clk, rate); + if (err) + return err; + + return 0; +} + +static int emc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra_emc *emc) +{ + struct icc_node *node; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(emc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + emc->provider.dev = emc->dev; + emc->provider.set = emc_icc_set; + emc->provider.data = &emc->provider; + emc->provider.xlate = emc_of_icc_xlate; + emc->provider.aggregate = emc_icc_aggregate; + + err = icc_provider_add(&emc->provider); + if (err) + goto err_msg; + + /* create External Memory Controller node */ + node = icc_node_create(TEGRA_ICC_EMC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "External Memory Controller"; + icc_node_add(node, &emc->provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err = icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node = icc_node_create(TEGRA_ICC_EMEM); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = "External Memory (DRAM)"; + icc_node_add(node, &emc->provider); + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->provider); +del_provider: + icc_provider_del(&emc->provider); +err_msg: + dev_err(emc->dev, "failed to initialize ICC: %d\n", err); + + return err; +} + static int tegra_emc_init_mc_timings(struct tegra_emc *emc) { struct tegra_mc_timing *timing; @@ -773,6 +882,7 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + tegra_emc_interconnect_init(emc); /* * Don't allow the kernel module to be unloaded. Unloading adds some From patchwork Fri Aug 14 00:06:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716633 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 647B813A4 for ; Mon, 17 Aug 2020 07:08:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42F9A2072D for ; Mon, 17 Aug 2020 07:08:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kHD2fNCD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42F9A2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5945389D2F; Mon, 17 Aug 2020 07:07:24 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B5CC6EABF for ; Fri, 14 Aug 2020 00:07:37 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id t23so8128886ljc.3 for ; Thu, 13 Aug 2020 17:07:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SYVrVqyKmi1R5n5EphsB7nCz8XZpBo0lBJhV0Ix8t+w=; b=kHD2fNCDU7lJmrFW6dXFuOYm22bBYvr3VdsN9nKcyfb18EcS1FH+7kQ7JrxIqkMhOF BULskAMHRRV7KO+7N/NkWA1lQ4nONQz1EILPJD0F2L0kwmo4DHViU8MnUzUwFegY60kQ 7tbY7ZiTvc8il6FQp/3xToaxFb/uwTQRj91YtVI6iE0fEsjePGJtz2UlAXQ+aegw0Udo kTZu3m2DlUeNijlHo9oFblbttVhqM8jjworPOKtJ3GP6mqSoKXBGbOpuzlsz1mWE05H0 zhtAHSMNb60N9aiUaAf8rCZA4nkWRrHFdDUxAmZjYKgZOAvMJT6wKTDDsW6yBqwZhFoy WxCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SYVrVqyKmi1R5n5EphsB7nCz8XZpBo0lBJhV0Ix8t+w=; b=hjMhvo1+XKC6sVQc9aKoDbJYz84v/x2fuyv1l4ue38h4GnPsZhCmHmsXtnJuUGAFvN gPVaD6DnncdzdvVdlu6249/Z22FJz1wdI6BpwqyZ4LsNHqxkqHUjeiN1C0dINRGeTztv bR43tkg9pkBfYaz8DMhroveZ6Ba9o4iivQphYg2ZX5OSV8/ALfcgG2a+JHWLprcb2dWN DHIlAr5nTIMN6KFENmIIvuf4tpVrxDs7D+dJ7z7aPSqkOeCOjMUvWo8qn7pJ5brWcnxv 4PANrzzLet2Go3Z/0rUgbPtnaF/LIpweuph9b3+3RUfCcSR4BYdDJyCk+WXbwhT9bdxA BRmw== X-Gm-Message-State: AOAM532c8wTKFi/hMBnblFlD2qUU6Lbi2lZunzOFXnkunIor8lO3nS2S 4+z6aIvd5/krn6seyVz2y/g= X-Google-Smtp-Source: ABdhPJwIs4y8aNM38rBL6i83ol6zAmutagnBs98xg1dZ+TNRSEXv4E1FjDzY79vpk5xE4Wzx4pmpiA== X-Received: by 2002:a2e:9dd0:: with SMTP id x16mr107011ljj.144.1597363655869; Thu, 13 Aug 2020 17:07:35 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:35 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 31/36] memory: tegra20-emc: Create tegra20-devfreq device Date: Fri, 14 Aug 2020 03:06:16 +0300 Message-Id: <20200814000621.8415-32-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The tegra20-devfreq driver provides memory frequency scaling functionality and it uses EMC clock for the scaling. Since tegra20-devfreq is a software driver, the device for the driver needs to be created manually. Let's do it from EMC driver since it provides the clk rate-change functionality. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra20-emc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index 437d9d789941..e603cc0b0341 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -884,6 +884,9 @@ static int tegra_emc_probe(struct platform_device *pdev) tegra_emc_debugfs_init(emc); tegra_emc_interconnect_init(emc); + if (IS_ENABLED(CONFIG_ARM_TEGRA20_DEVFREQ)) + platform_device_register_simple("tegra20-devfreq", -1, NULL, 0); + /* * Don't allow the kernel module to be unloaded. Unloading adds some * extra complexity which doesn't really worth the effort in a case of From patchwork Fri Aug 14 00:06:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716603 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7899B722 for ; Mon, 17 Aug 2020 07:07:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 573582072D for ; Mon, 17 Aug 2020 07:07:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nZnuIFn4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 573582072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 680136E4C5; Mon, 17 Aug 2020 07:06:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8BAE86EABF for ; Fri, 14 Aug 2020 00:07:38 +0000 (UTC) Received: by mail-lj1-x242.google.com with SMTP id w25so8073410ljo.12 for ; Thu, 13 Aug 2020 17:07:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8yAUvmC7dB1AvZufMoltXCEKaZJYFALPQadvIxchYtE=; b=nZnuIFn4NQ7251gwYTws9nLSOUpePnWTN0wUR3sYcp5FQ9RWkjtClffkh7lFP53eh8 ugWvszqZJIIGDUX4I3Y1FZgdXBimv4gOIrfNH2l+zxC4vj+5RsroRnqxON7cW4RVu/jQ gqp23VL7L0+kGSefSR5HudzGvkDgywh0nkcZ3fVzjkmILhkUf1/Lnlv3GZnkKG4HPQv9 f0e9uWIE3vUCTO6C+/tXTKWmmquU9N7AeonqQqCVzPfg8ZrRoAIcdwQjF34x9TkNh5UV mMmm4YDoocFJlQCkhpPc+17BnKW7mTsThNqB55qwge+Qkdc5zlH4V/kg1uhEk1Ovug+O 8V9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8yAUvmC7dB1AvZufMoltXCEKaZJYFALPQadvIxchYtE=; b=falLE/m0lbKlTLQPpsvCEQaTTfglZXZ9xnPrnuY4hClwfXJ3+oRC5pyi3Z0toM1IxK uImWDut/15lzJ2HKUjWqHo9ojWD0O+JZMjOcY/mCze2vFYghIMi1s3N7O9P7Mac364dd ENdAHDkGzvaql2lqTv466NR2hstn/+THlCN31gyj6EnQ3omwjg3ViiuMSzCGXddxWXtu ROmLaurzmqLHYP83qAgzWKBZVa9jOT5QkEeue5TfCLZFKCQ8Zb6e0ZGOCX5MCZJ4s4sE BgfCkNqEg2KUYzlVWNSJjNX/GtE1RxmBQMYapoUXxeo3q09AbKpZT4Xa04BuIpY9t0UD uRHQ== X-Gm-Message-State: AOAM532aXR7Hr2FSN1rGY0zn83K8Llwr+PfOtpOSlcECGVkUiR4/eYcy /tCtV7PNiXT2KNKYdJoVMN4= X-Google-Smtp-Source: ABdhPJwiHCAsmpwTHY7fxXYOvVp2r9Jve/fNJ/xQBu7FZzCkI2bJBYxqcixmLnYy4dsrjOhGDpzE3A== X-Received: by 2002:a2e:9010:: with SMTP id h16mr114446ljg.316.1597363657009; Thu, 13 Aug 2020 17:07:37 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:36 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 32/36] memory: tegra30-emc: Continue probing if timings are missing in device-tree Date: Fri, 14 Aug 2020 03:06:17 +0300 Message-Id: <20200814000621.8415-33-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" EMC driver will become mandatory after turning it into interconnect provider because interconnect users, like display controller driver, will fail to probe using newer device-trees that have interconnect properties. Thus make EMC driver to probe even if timings are missing in device-tree. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra30-emc.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index f3082964cfb6..0cd39bf5f393 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -988,6 +988,11 @@ static struct device_node *emc_find_node_by_ram_code(struct device *dev) u32 value, ram_code; int err; + if (of_get_child_count(dev->of_node) == 0) { + dev_info(dev, "device-tree doesn't have memory timings\n"); + return NULL; + } + ram_code = tegra_read_ram_code(); for_each_child_of_node(dev->of_node, np) { @@ -1057,6 +1062,9 @@ static long emc_round_rate(unsigned long rate, struct tegra_emc *emc = arg; unsigned int i; + if (!emc->num_timings) + return clk_get_rate(emc->clk); + min_rate = min(min_rate, emc->timings[emc->num_timings - 1].rate); for (i = 0; i < emc->num_timings; i++) { @@ -1263,12 +1271,6 @@ static int tegra_emc_probe(struct platform_device *pdev) struct tegra_emc *emc; int err; - if (of_get_child_count(pdev->dev.of_node) == 0) { - dev_info(&pdev->dev, - "device-tree node doesn't have memory timings\n"); - return -ENODEV; - } - np = of_parse_phandle(pdev->dev.of_node, "nvidia,memory-controller", 0); if (!np) { dev_err(&pdev->dev, "could not get memory controller node\n"); @@ -1280,10 +1282,6 @@ static int tegra_emc_probe(struct platform_device *pdev) if (!mc) return -ENOENT; - np = emc_find_node_by_ram_code(&pdev->dev); - if (!np) - return -EINVAL; - emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL); if (!emc) { of_node_put(np); @@ -1297,10 +1295,13 @@ static int tegra_emc_probe(struct platform_device *pdev) emc->clk_nb.notifier_call = emc_clk_change_notify; emc->dev = &pdev->dev; - err = emc_load_timings_from_dt(emc, np); - of_node_put(np); - if (err) - return err; + np = emc_find_node_by_ram_code(&pdev->dev); + if (np) { + err = emc_load_timings_from_dt(emc, np); + of_node_put(np); + if (err) + return err; + } emc->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(emc->regs)) From patchwork Fri Aug 14 00:06:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716645 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB406722 for ; Mon, 17 Aug 2020 07:08:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 89B3F2072D for ; Mon, 17 Aug 2020 07:08:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Y3djZHIr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 89B3F2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:37 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 33/36] memory: tegra30-emc: Register as interconnect provider Date: Fri, 14 Aug 2020 03:06:18 +0300 Message-Id: <20200814000621.8415-34-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Now external memory controller is a memory interconnection provider. This allows us to use interconnect API to change memory configuration. Signed-off-by: Dmitry Osipenko Acked-by: Georgi Djakov --- drivers/memory/tegra/tegra30-emc.c | 110 +++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 0cd39bf5f393..29448d02f750 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -327,6 +328,7 @@ struct tegra_emc { struct device *dev; struct tegra_mc *mc; struct notifier_block clk_nb; + struct icc_provider provider; struct clk *clk; void __iomem *regs; unsigned int irq; @@ -1264,6 +1266,113 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static inline struct tegra_emc * +to_tegra_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_emc, provider); +} + +static struct icc_node * +emc_of_icc_xlate(struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider = data; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id == TEGRA_ICC_EMEM) + return node; + } + + return ERR_PTR(-EINVAL); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra_emc *emc = to_tegra_emc_provider(dst->provider); + unsigned long long rate = icc_units_to_bps(dst->avg_bw); + unsigned int dram_data_bus_width_bytes = 4; + unsigned int ddr = 2; + int err; + + do_div(rate, ddr * dram_data_bus_width_bytes); + rate = min_t(u64, rate, U32_MAX); + + err = clk_set_min_rate(emc->clk, rate); + if (err) + return err; + + err = clk_set_rate(emc->clk, rate); + if (err) + return err; + + return 0; +} + +static int emc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra_emc *emc) +{ + struct icc_node *node; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(emc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + emc->provider.dev = emc->dev; + emc->provider.set = emc_icc_set; + emc->provider.data = &emc->provider; + emc->provider.xlate = emc_of_icc_xlate; + emc->provider.aggregate = emc_icc_aggregate; + + err = icc_provider_add(&emc->provider); + if (err) + goto err_msg; + + /* create External Memory Controller node */ + node = icc_node_create(TEGRA_ICC_EMC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "External Memory Controller"; + icc_node_add(node, &emc->provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err = icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node = icc_node_create(TEGRA_ICC_EMEM); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = "External Memory (DRAM)"; + icc_node_add(node, &emc->provider); + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->provider); +del_provider: + icc_provider_del(&emc->provider); +err_msg: + dev_err(emc->dev, "failed to initialize ICC: %d\n", err); + + return err; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; @@ -1343,6 +1452,7 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + tegra_emc_interconnect_init(emc); /* * Don't allow the kernel module to be unloaded. Unloading adds some From patchwork Fri Aug 14 00:06:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716579 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 27109722 for ; Mon, 17 Aug 2020 07:07:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 053AB2072D for ; Mon, 17 Aug 2020 07:07:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dKxD7U+C" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 053AB2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 423B06E49B; Mon, 17 Aug 2020 07:06:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id E180E6EABF for ; Fri, 14 Aug 2020 00:07:40 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id w25so8073474ljo.12 for ; Thu, 13 Aug 2020 17:07:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6WNf8TRMY4yV55W1uBcchmluoZ+qOEHy2Hn86HAVEdQ=; b=dKxD7U+CrnImKrBOH/IgUD8KIlkkjfL+MqxvWySY6zMh4NPyIftOM9OEiNQoWmPGdZ yly9RxtN5/mJiieout0P+XU2FyY+Ys5on8REoNtDT8k5Mzy/jhtS/MRz6ZRy5d36cl1v zF8zQAF7/E223AjQa32SOKnc5IRf2oo4qzt1RsZNfXvIp9joJXDJS/jDJr24woZBmpkz f1wG6xz4FlND++/W2S2NIny0BAm98cvUm283Q8eHmO89dgXqAPuKUwQXsCXtwIMx6bD9 GED3hjKZNHgdrEE9z/SWtVhMIv4OEOx/ElrJzMIaWc3VCBAF4AsZE2VyW35cKL9IY/FI CINw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6WNf8TRMY4yV55W1uBcchmluoZ+qOEHy2Hn86HAVEdQ=; b=P0zoAb71d63U5IUXr/r+kuNMFysF+pfx0+9rF8xROAp/JCWEopj7YHzgUuHN9Rtq6T Bpfo06BadX8r+VLhgqGo8HrQ7PIkJz97WlDygNstitD7S8HwonOlhf0jnhEr7EDRmcc8 sYKH/HGGXfqPS6ERQMb1LMIdf8x2+HtrZ+qWHnhdEjoSyHqc6u/TL5Dn03JVInkHxGg0 ihvUJtHFC3dTuUxojNEvjz5HQ8V7RCov52F385xVHB+yNv+cTJ9l/cw1+NGYRPAkFt7o rOwCtuEAdxgtUkmbF7WbaXYxmwdWUl+QZrzmfbX2NYoca9k76MyJYi686guFMGopHqFd lohA== X-Gm-Message-State: AOAM533MUa303LS5kv+kDWT0Aw77I5wKJhTUtKKOnGG7Y6BMAeiK2Ylz dcvUmSuODJ/1mcQBQ6ENlMA= X-Google-Smtp-Source: ABdhPJzIbZtaYynsZHlUF7D8CDbuGPEnj8UFBr3GD7P1iN9tJFD7HO6vnuzbJAFQ493WcOwsEKgiPg== X-Received: by 2002:a2e:978c:: with SMTP id y12mr91161lji.327.1597363659168; Thu, 13 Aug 2020 17:07:39 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:38 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 34/36] drm/tegra: dc: Support memory bandwidth management Date: Fri, 14 Aug 2020 03:06:19 +0300 Message-Id: <20200814000621.8415-35-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Display controller (DC) performs isochronous memory transfers, and thus, has a requirement for a minimum memory bandwidth that shall be fulfilled, otherwise framebuffer data can't be fetched fast enough and this results in a DC's data-FIFO underflow that follows by a visual corruption. The Memory Controller drivers provide facility for memory bandwidth management via interconnect API. This patch wires up the interconnect API support to the DC driver. Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/Kconfig | 1 + drivers/gpu/drm/tegra/dc.c | 271 +++++++++++++++++++++++++++++++++- drivers/gpu/drm/tegra/dc.h | 8 + drivers/gpu/drm/tegra/drm.c | 19 +++ drivers/gpu/drm/tegra/plane.c | 1 + drivers/gpu/drm/tegra/plane.h | 4 +- 6 files changed, 300 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig index 5043dcaf1cf9..1650a448eabd 100644 --- a/drivers/gpu/drm/tegra/Kconfig +++ b/drivers/gpu/drm/tegra/Kconfig @@ -9,6 +9,7 @@ config DRM_TEGRA select DRM_MIPI_DSI select DRM_PANEL select TEGRA_HOST1X + select INTERCONNECT select IOMMU_IOVA select CEC_CORE if CEC_NOTIFIER help diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 9a0b3240bc58..850fbcebefc2 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -525,6 +525,136 @@ static void tegra_dc_setup_window(struct tegra_plane *plane, tegra_plane_setup_blending(plane, window); } +static unsigned long +tegra_plane_memory_bandwidth(struct drm_plane_state *state, + struct tegra_dc_window *window, + unsigned int num, + unsigned int denum) +{ + struct tegra_plane_state *tegra_state; + struct drm_crtc_state *crtc_state; + const struct drm_format_info *fmt; + struct tegra_dc_window win; + unsigned long long bandwidth; + unsigned int bpp_plane; + unsigned int bpp; + unsigned int mul; + unsigned int i; + + if (!state->fb || !state->visible) + return 0; + + crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc); + tegra_state = to_tegra_plane_state(state); + + if (!window) + window = &win; + + window->src.w = drm_rect_width(&state->src) >> 16; + window->src.h = drm_rect_height(&state->src) >> 16; + window->dst.w = drm_rect_width(&state->dst); + window->dst.h = drm_rect_height(&state->dst); + window->tiling = tegra_state->tiling; + + fmt = state->fb->format; + + /* + * Note that real memory bandwidth vary depending on format and + * memory layout, we are not taking that into account because small + * estimation error isn't important since bandwidth is rounded up + * anyway. + */ + for (i = 0, bpp = 0; i < fmt->num_planes; i++) { + bpp_plane = fmt->cpp[i] * 8; + + /* + * Sub-sampling is relevant for chroma planes only and vertical + * readouts are not cached, hence only horizontal sub-sampling + * matters. + */ + if (i > 0) + bpp_plane /= fmt->hsub; + + bpp += bpp_plane; + } + + /* + * Horizontal downscale takes extra bandwidth which roughly depends + * on the scaled width. + */ + if (window->src.w > window->dst.w) + mul = (window->src.w - window->dst.w) * bpp / 2048 + 1; + else + mul = 1; + + /* + * Ignore cursor window if its width is small enough such that + * data-prefetch FIFO will easily help to overcome temporal memory + * pressure. + * + * Window A has a 128bit x 128 deep read FIFO, while windows B/C + * have a 128bit x 64 deep read FIFO. + * + * This allows us to not overestimate memory frequency requirement. + * Even if it will happen that cursor gets a temporal underflow, this + * won't be fatal. + */ + if (state->plane->type == DRM_PLANE_TYPE_CURSOR && + mul == 1 && window->src.w * bpp <= 128 * 16) + return 0; + + /* mode.clock in kHz, bandwidth in kbit/s */ + bandwidth = kbps_to_icc(crtc_state->mode.clock * bpp * mul); + + /* the requested bandwidth should be higher than required */ + bandwidth *= num; + do_div(bandwidth, denum); + + return min_t(u64, bandwidth, ULONG_MAX); +} + +static unsigned long +tegra20_plane_memory_bandwidth(struct drm_plane_state *state) +{ + return tegra_plane_memory_bandwidth(state, NULL, 29, 10); +} + +static unsigned long +tegra30_plane_memory_bandwidth(struct drm_plane_state *state) +{ + struct tegra_dc_window window; + unsigned long bandwidth; + + bandwidth = tegra_plane_memory_bandwidth(state, &window, 29, 10); + + /* x2: memory overfetch for tiled framebuffer and DDR3 */ + if (window.tiling.mode == TEGRA_BO_TILING_MODE_TILED) + bandwidth *= 2; + + return bandwidth; +} + +static unsigned long +tegra114_plane_memory_bandwidth(struct drm_plane_state *state) +{ + struct tegra_dc_window window; + unsigned long bandwidth; + + bandwidth = tegra_plane_memory_bandwidth(state, &window, 12, 10); + + /* x2: memory overfetch for tiled framebuffer and DDR3 */ + if (window.tiling.mode == TEGRA_BO_TILING_MODE_TILED) + bandwidth *= 2; + + return bandwidth; +} + +static unsigned long +tegra124_plane_memory_bandwidth(struct drm_plane_state *state) +{ + return tegra_plane_memory_bandwidth(state, NULL, 12, 10); +} + static const u32 tegra20_primary_formats[] = { DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB1555, @@ -617,8 +747,10 @@ static int tegra_plane_atomic_check(struct drm_plane *plane, int err; /* no need for further checks if the plane is being disabled */ - if (!state->crtc) + if (!state->crtc) { + plane_state->memory_bandwidth = 0; return 0; + } err = tegra_plane_format(state->fb->format->format, &plane_state->format, @@ -685,6 +817,8 @@ static int tegra_plane_atomic_check(struct drm_plane *plane, if (err < 0) return err; + plane_state->memory_bandwidth = dc->soc->plane_memory_bandwidth(state); + return 0; } @@ -1214,6 +1348,7 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc) copy->pclk = state->pclk; copy->div = state->div; copy->planes = state->planes; + copy->memory_bandwidth = state->memory_bandwidth; return ©->base; } @@ -1796,6 +1931,8 @@ static void tegra_crtc_atomic_disable(struct drm_crtc *crtc, err = host1x_client_suspend(&dc->client); if (err < 0) dev_err(dc->dev, "failed to suspend: %d\n", err); + + icc_set_bw(dc->icc_bandwidth, 0, 0); } static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, @@ -1807,6 +1944,9 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, u32 value; int err; + icc_set_bw(dc->icc_bandwidth, state->memory_bandwidth, + state->memory_bandwidth); + err = host1x_client_resume(&dc->client); if (err < 0) { dev_err(dc->dev, "failed to resume: %d\n", err); @@ -1920,6 +2060,9 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, static void tegra_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { + struct tegra_dc_state *dc_old_state = to_dc_state(old_crtc_state); + struct tegra_dc_state *dc_state = to_dc_state(crtc->state); + struct tegra_dc *dc = to_tegra_dc(crtc); unsigned long flags; if (crtc->state->event) { @@ -1934,6 +2077,25 @@ static void tegra_crtc_atomic_begin(struct drm_crtc *crtc, crtc->state->event = NULL; } + + if (old_crtc_state && old_crtc_state->active) { + /* + * Raise memory bandwidth before changes take effect if it + * goes from low to high. + */ + if (dc_old_state->memory_bandwidth < dc_state->memory_bandwidth) + icc_set_bw(dc->icc_bandwidth, + dc_state->memory_bandwidth, + dc_state->memory_bandwidth); + } else { + /* + * Raise memory bandwidth before changes take effect if + * CRTC is turning on. + */ + icc_set_bw(dc->icc_bandwidth, + dc_state->memory_bandwidth, + dc_state->memory_bandwidth); + } } static void tegra_crtc_atomic_flush(struct drm_crtc *crtc, @@ -1952,7 +2114,80 @@ static void tegra_crtc_atomic_flush(struct drm_crtc *crtc, value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); } +static bool +tegra_plane_overlaps_other_plane(struct drm_crtc_state *state, + const struct drm_plane_state *plane_state) +{ + const struct drm_plane_state *other_state; + struct drm_plane *plane; + struct drm_rect rect; + + drm_atomic_crtc_state_for_each_plane_state(plane, other_state, state) { + rect = plane_state->dst; + + if (other_state == plane_state) + continue; + + if (!other_state->visible || !other_state->fb) + continue; + + if (drm_rect_intersect(&rect, &other_state->dst)) + return true; + } + + return false; +} + +static int tegra_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_crtc_state *state) +{ + struct tegra_dc_state *dc_state = to_dc_state(state); + const struct drm_plane_state *plane_state; + const struct tegra_plane_state *tegra; + unsigned long long bandwidth = 0; + struct drm_plane *plane; + + /* + * For overlapping planes pixel's data is fetched for each plane at + * the same time, hence bandwidth is accumulated in this case. + */ + drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, state) { + tegra = to_tegra_plane_state(plane_state); + + if (tegra_plane_overlaps_other_plane(state, plane_state)) + bandwidth += tegra->memory_bandwidth; + else + bandwidth = max_t(u64, bandwidth, + tegra->memory_bandwidth); + } + + dc_state->memory_bandwidth = min_t(u64, bandwidth, U32_MAX); + + return 0; +} + +void tegra_crtc_atomic_post_commit(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) +{ + struct tegra_dc_state *dc_old_state = to_dc_state(old_crtc_state); + struct tegra_dc_state *dc_state = to_dc_state(crtc->state); + struct tegra_dc *dc = to_tegra_dc(crtc); + + if (!dc_old_state) + return; + + /* + * Drop memory bandwidth after changes take effect if it goes from + * high to low. + */ + if (dc_old_state->memory_bandwidth > dc_state->memory_bandwidth) + icc_set_bw(dc->icc_bandwidth, + dc_state->memory_bandwidth, + dc_state->memory_bandwidth); +} + static const struct drm_crtc_helper_funcs tegra_crtc_helper_funcs = { + .atomic_check = tegra_crtc_atomic_check, .atomic_begin = tegra_crtc_atomic_begin, .atomic_flush = tegra_crtc_atomic_flush, .atomic_enable = tegra_crtc_atomic_enable, @@ -2244,6 +2479,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = { .modifiers = tegra20_modifiers, .has_win_a_without_filters = true, .has_win_c_without_vert_filter = true, + .plane_memory_bandwidth = tegra20_plane_memory_bandwidth, }; static const struct tegra_dc_soc_info tegra30_dc_soc_info = { @@ -2263,6 +2499,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = { .modifiers = tegra20_modifiers, .has_win_a_without_filters = false, .has_win_c_without_vert_filter = false, + .plane_memory_bandwidth = tegra30_plane_memory_bandwidth, }; static const struct tegra_dc_soc_info tegra114_dc_soc_info = { @@ -2282,6 +2519,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = { .modifiers = tegra20_modifiers, .has_win_a_without_filters = false, .has_win_c_without_vert_filter = false, + .plane_memory_bandwidth = tegra114_plane_memory_bandwidth, }; static const struct tegra_dc_soc_info tegra124_dc_soc_info = { @@ -2301,6 +2539,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = { .modifiers = tegra124_modifiers, .has_win_a_without_filters = false, .has_win_c_without_vert_filter = false, + .plane_memory_bandwidth = tegra124_plane_memory_bandwidth, }; static const struct tegra_dc_soc_info tegra210_dc_soc_info = { @@ -2320,6 +2559,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = { .modifiers = tegra124_modifiers, .has_win_a_without_filters = false, .has_win_c_without_vert_filter = false, + .plane_memory_bandwidth = tegra124_plane_memory_bandwidth, }; static const struct tegra_windowgroup_soc tegra186_dc_wgrps[] = { @@ -2368,6 +2608,7 @@ static const struct tegra_dc_soc_info tegra186_dc_soc_info = { .has_nvdisplay = true, .wgrps = tegra186_dc_wgrps, .num_wgrps = ARRAY_SIZE(tegra186_dc_wgrps), + .plane_memory_bandwidth = tegra124_plane_memory_bandwidth, }; static const struct tegra_windowgroup_soc tegra194_dc_wgrps[] = { @@ -2416,6 +2657,7 @@ static const struct tegra_dc_soc_info tegra194_dc_soc_info = { .has_nvdisplay = true, .wgrps = tegra194_dc_wgrps, .num_wgrps = ARRAY_SIZE(tegra194_dc_wgrps), + .plane_memory_bandwidth = tegra124_plane_memory_bandwidth, }; static const struct of_device_id tegra_dc_of_match[] = { @@ -2522,6 +2764,7 @@ static int tegra_dc_couple(struct tegra_dc *dc) static int tegra_dc_probe(struct platform_device *pdev) { + const char *level = KERN_ERR; struct tegra_dc *dc; int err; @@ -2588,8 +2831,6 @@ static int tegra_dc_probe(struct platform_device *pdev) err = tegra_dc_rgb_probe(dc); if (err < 0 && err != -ENODEV) { - const char *level = KERN_ERR; - if (err == -EPROBE_DEFER) level = KERN_DEBUG; @@ -2598,6 +2839,25 @@ static int tegra_dc_probe(struct platform_device *pdev) return err; } + /* + * The display controller memory bandwidth management isn't trivial + * because it requires the knowledge about the DC hardware state + * in order to make a proper decisions. It's not easy to convey + * that information to the ICC provider, so we will just use the + * first interconnect path for the memory bandwidth management and + * make all the decisions within the DC driver, for simplicity. + */ + dc->icc_bandwidth = of_icc_get(dc->dev, "wina"); + err = PTR_ERR_OR_ZERO(dc->icc_bandwidth); + if (err) { + if (err == -EPROBE_DEFER) + level = KERN_DEBUG; + + dev_printk(level, dc->dev, + "failed to get wina interconnect: %d\n", err); + goto remove_rgb; + } + platform_set_drvdata(pdev, dc); pm_runtime_enable(&pdev->dev); @@ -2616,6 +2876,9 @@ static int tegra_dc_probe(struct platform_device *pdev) disable_pm: pm_runtime_disable(&pdev->dev); + icc_put(dc->icc_bandwidth); + +remove_rgb: tegra_dc_rgb_remove(dc); return err; @@ -2633,6 +2896,8 @@ static int tegra_dc_remove(struct platform_device *pdev) return err; } + icc_put(dc->icc_bandwidth); + err = tegra_dc_rgb_remove(dc); if (err < 0) { dev_err(&pdev->dev, "failed to remove RGB output: %d\n", err); diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index 051d03dcb9b0..b70eeeee2033 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -8,6 +8,7 @@ #define TEGRA_DC_H 1 #include +#include #include @@ -23,6 +24,8 @@ struct tegra_dc_state { unsigned int div; u32 planes; + + unsigned long memory_bandwidth; }; static inline struct tegra_dc_state *to_dc_state(struct drm_crtc_state *state) @@ -66,6 +69,7 @@ struct tegra_dc_soc_info { const u64 *modifiers; bool has_win_a_without_filters; bool has_win_c_without_vert_filter; + unsigned long (*plane_memory_bandwidth)(struct drm_plane_state *state); }; struct tegra_dc { @@ -90,6 +94,8 @@ struct tegra_dc { struct drm_info_list *debugfs_files; const struct tegra_dc_soc_info *soc; + + struct icc_path *icc_bandwidth; }; static inline struct tegra_dc * @@ -151,6 +157,8 @@ int tegra_dc_state_setup_clock(struct tegra_dc *dc, struct drm_crtc_state *crtc_state, struct clk *clk, unsigned long pclk, unsigned int div); +void tegra_crtc_atomic_post_commit(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state); /* from rgb.c */ int tegra_dc_rgb_probe(struct tegra_dc *dc); diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index ba9d1c3e7cac..f648adb22731 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -20,6 +20,7 @@ #include #include +#include "dc.h" #include "drm.h" #include "gem.h" @@ -59,6 +60,22 @@ static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, }; +static void tegra_atomic_post_commit(struct drm_device *drm, + struct drm_atomic_state *old_state) +{ + struct drm_crtc_state *old_crtc_state, *new_crtc_state; + struct drm_crtc *crtc; + unsigned int i; + + for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, + new_crtc_state, i) { + if (!new_crtc_state->active) + continue; + + tegra_crtc_atomic_post_commit(crtc, old_crtc_state); + } +} + static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state) { struct drm_device *drm = old_state->dev; @@ -75,6 +92,8 @@ static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state) } else { drm_atomic_helper_commit_tail_rpm(old_state); } + + tegra_atomic_post_commit(drm, old_state); } static const struct drm_mode_config_helper_funcs diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c index 4cd0461cc508..8f6ef5fb3977 100644 --- a/drivers/gpu/drm/tegra/plane.c +++ b/drivers/gpu/drm/tegra/plane.c @@ -64,6 +64,7 @@ tegra_plane_atomic_duplicate_state(struct drm_plane *plane) copy->reflect_x = state->reflect_x; copy->reflect_y = state->reflect_y; copy->opaque = state->opaque; + copy->memory_bandwidth = state->memory_bandwidth; for (i = 0; i < 2; i++) copy->blending[i] = state->blending[i]; diff --git a/drivers/gpu/drm/tegra/plane.h b/drivers/gpu/drm/tegra/plane.h index c691dd79b27b..f9a031a69161 100644 --- a/drivers/gpu/drm/tegra/plane.h +++ b/drivers/gpu/drm/tegra/plane.h @@ -52,10 +52,12 @@ struct tegra_plane_state { /* used for legacy blending support only */ struct tegra_plane_legacy_blending_state blending[2]; bool opaque; + + unsigned long memory_bandwidth; }; static inline struct tegra_plane_state * -to_tegra_plane_state(struct drm_plane_state *state) +to_tegra_plane_state(const struct drm_plane_state *state) { if (state) return container_of(state, struct tegra_plane_state, base); From patchwork Fri Aug 14 00:06:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716647 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF54113A4 for ; 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[109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:39 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 35/36] drm/tegra: dc: Tune up high priority request controls for Tegra20 Date: Fri, 14 Aug 2020 03:06:20 +0300 Message-Id: <20200814000621.8415-36-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Tegra20 has a high-priority-request control that allows to configure when display's memory client should perform read requests with a higher priority (Tegra30+ uses other means like Latency Allowance). This patch changes the controls configuration in order to get a more aggressive memory prefetching, which allows to reliably avoid FIFO underflow when running on a lower memory frequency. This allow us safely drop the memory bandwidth requirement by about two times in a most popular use-cases (only one display active, video overlay inactive, no scaling is done). Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/dc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 850fbcebefc2..4b062408467e 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1999,12 +1999,12 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, tegra_dc_writel(dc, value, DC_CMD_INT_POLARITY); /* initialize timer */ - value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x20) | - WINDOW_B_THRESHOLD(0x20) | WINDOW_C_THRESHOLD(0x20); + value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x70) | + WINDOW_B_THRESHOLD(0x30) | WINDOW_C_THRESHOLD(0x70); tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY); - value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(1) | - WINDOW_B_THRESHOLD(1) | WINDOW_C_THRESHOLD(1); + value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0) | + WINDOW_B_THRESHOLD(0) | WINDOW_C_THRESHOLD(0); tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER); value = VBLANK_INT | WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | From patchwork Fri Aug 14 00:06:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11716555 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C273C13A4 for ; Mon, 17 Aug 2020 07:07:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A0BB42072D for ; Mon, 17 Aug 2020 07:07:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Aacq3Tu5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A0BB42072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DF0846E459; Mon, 17 Aug 2020 07:06:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C0386EAC6 for ; Fri, 14 Aug 2020 00:07:43 +0000 (UTC) Received: by mail-lj1-x242.google.com with SMTP id h19so8083184ljg.13 for ; Thu, 13 Aug 2020 17:07:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5I441vpS3S5aDlVzrg/mTzQrvjnvNW+TqUcAQJ59TLM=; b=Aacq3Tu5kitjooDIHTqmVcRI0PhSXKEqTTnvrZFmM5H001UFUNP9Sky0+GT1d3AZ4U Nt0NQgAYFfh+mUvmV6GtZ6GzUoQiNxQd3HZJikeGjtugP02+aAxMjMec3venF3HkZqdr ZS+DWN2mXcyogiUsIB8KatEHdaitiLkVmHZcW0LqyoVphj9aor0Oas9rkDzhF/oxysSg ptnskfvIyA9gRArGqO1Z10ZfHiPlj/rEYT7bk30rzSI2kGETMRR11oxHdNNnCrGP/WaZ nNOifEJHr+md6VGLjEzSq4Nf6jJCbNuAJY5fcH6tPNwZIujxqwDhutbEOvc4MJNzvNzk oc9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5I441vpS3S5aDlVzrg/mTzQrvjnvNW+TqUcAQJ59TLM=; b=sbpHBh9U8X5g9ib9sFnd1rvYsFrFd03xUjWKKJ49L7aJxZKIhvSSzHAhpDyWgWPwyb mY53ZvhsEIbM4qDQYXLjzOmkTncayx0JvXQah8kQHvMX/4W/5EKpfdNHO/AgadRPgOgK RPLVVI2zt5ZWsOaZ3/hnFBfsdnoTfJTiq1fxUO7JkMxl4HMK4dqbOrCwxdDYkpwmTrzw qJ+f1BQ2Ikv82muoJFsdWSD3zZD6bc4n5RBLCwSWwKj+JGiOEejsEnIrfluFv8RCmmog /BbUT2p4Fq4gOne/1EIFL1OwdwRXFTPA2takhaceZYTqttnVP0bgLihk7oAvdqMjcd3P TWEQ== X-Gm-Message-State: AOAM5318FGSLdYj4DIomaZTIT15U8s6KwVyjm4RF3xiNJLPAZcr1CUTw 0RIkw//PmjsnvuIzEoybTR4= X-Google-Smtp-Source: ABdhPJwS3t1VhewclqFmHM7Z+G4PJRRjcKaBY9PA67owkG9Oe2NamFWEnuF0B6DZLWORmPupH2dW5w== X-Received: by 2002:a2e:8e28:: with SMTP id r8mr103221ljk.290.1597363661566; Thu, 13 Aug 2020 17:07:41 -0700 (PDT) Received: from localhost.localdomain (109-252-170-211.dynamic.spd-mgts.ru. [109.252.170.211]) by smtp.gmail.com with ESMTPSA id c17sm1504450lfr.23.2020.08.13.17.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 17:07:41 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Subject: [PATCH v5 36/36] drm/tegra: dc: Extend debug stats with total number of events Date: Fri, 14 Aug 2020 03:06:21 +0300 Message-Id: <20200814000621.8415-37-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814000621.8415-1-digetx@gmail.com> References: <20200814000621.8415-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 17 Aug 2020 07:06:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" It's useful to know the total number of underflow events and currently the debug stats are getting reset each time CRTC is being disabled. Let's account the overall number of events that doesn't get reset. Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/dc.c | 10 ++++++++++ drivers/gpu/drm/tegra/dc.h | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 4b062408467e..0692b9f0ec29 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1644,6 +1644,11 @@ static int tegra_dc_show_stats(struct seq_file *s, void *data) seq_printf(s, "underflow: %lu\n", dc->stats.underflow); seq_printf(s, "overflow: %lu\n", dc->stats.overflow); + seq_printf(s, "frames total: %lu\n", dc->stats.frames_total); + seq_printf(s, "vblank total: %lu\n", dc->stats.vblank_total); + seq_printf(s, "underflow total: %lu\n", dc->stats.underflow_total); + seq_printf(s, "overflow total: %lu\n", dc->stats.overflow_total); + return 0; } @@ -2206,6 +2211,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data) /* dev_dbg(dc->dev, "%s(): frame end\n", __func__); */ + dc->stats.frames_total++; dc->stats.frames++; } @@ -2214,6 +2220,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data) dev_dbg(dc->dev, "%s(): vertical blank\n", __func__); */ drm_crtc_handle_vblank(&dc->base); + dc->stats.vblank_total++; dc->stats.vblank++; } @@ -2221,6 +2228,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data) /* dev_dbg(dc->dev, "%s(): underflow\n", __func__); */ + dc->stats.underflow_total++; dc->stats.underflow++; } @@ -2228,11 +2236,13 @@ static irqreturn_t tegra_dc_irq(int irq, void *data) /* dev_dbg(dc->dev, "%s(): overflow\n", __func__); */ + dc->stats.overflow_total++; dc->stats.overflow++; } if (status & HEAD_UF_INT) { dev_dbg_ratelimited(dc->dev, "%s(): head underflow\n", __func__); + dc->stats.underflow_total++; dc->stats.underflow++; } diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index b70eeeee2033..41ca33abb84c 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -41,6 +41,11 @@ struct tegra_dc_stats { unsigned long vblank; unsigned long underflow; unsigned long overflow; + + unsigned long frames_total; + unsigned long vblank_total; + unsigned long underflow_total; + unsigned long overflow_total; }; struct tegra_windowgroup_soc {