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use QHD or higher, we need to modify the pixel_bvb_clk value. So add register to control this clock. Signed-off-by: Hoegeun Kwon --- drivers/clk/bcm/clk-raspberrypi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 5cc82954e1ce..f89b9cfc4309 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -271,6 +271,7 @@ static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi, case RPI_FIRMWARE_CORE_CLK_ID: case RPI_FIRMWARE_M2MC_CLK_ID: case RPI_FIRMWARE_V3D_CLK_ID: + case RPI_FIRMWARE_PIXEL_BVB_CLK_ID: hw = raspberrypi_clk_register(rpi, clks->parent, clks->id); if (IS_ERR(hw)) From patchwork Fri Aug 21 07:10:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hoegeun Kwon X-Patchwork-Id: 11728273 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E8865722 for ; Fri, 21 Aug 2020 07:11:56 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b6c32a35-5edff70000004a22-62-5f3f739a58d8 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 8C.C1.08382.9937F3F5; Fri, 21 Aug 2020 16:11:21 +0900 (KST) Received: from localhost.localdomain (unknown [10.113.111.64]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20200821071121epsmtip2af7047736c5b2832c065fb8aaa705105~tNvgLrnl82425024250epsmtip2g; Fri, 21 Aug 2020 07:11:21 +0000 (GMT) From: Hoegeun Kwon To: nsaenzjulienne@suse.de, eric@anholt.net, maxime@cerno.tech Subject: [PATCH 2/3] ARM: dts: bcm2711: Add bvb clock for hdmi-pixel Date: Fri, 21 Aug 2020 16:10:44 +0900 Message-Id: <20200821071045.24501-3-hoegeun.kwon@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200821071045.24501-1-hoegeun.kwon@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGJsWRmVeSWpSXmKPExsWy7bCmru6sYvt4g+nnxC3W9h5lsXg7dzGL xfwj51gtrnx9z2ZxoPEyo8X75V1sFjuvrGWx2PT4GqvFx557rBaXd81hs5h4ewO7xYwf/xgt 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List-Subscribe: , Cc: devicetree@vger.kernel.org, tim.gover@raspberrypi.com, kdasu.kdev@gmail.com, sboyd@kernel.org, mturquette@baylibre.com, dave.stevenson@raspberrypi.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phil@raspberrypi.com, robh+dt@kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hoegeun.kwon@samsung.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org It is necessary to control the hdmi pixel bvb clock. Add bvb clock. Signed-off-by: Hoegeun Kwon --- arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts index b93eb30e1ddb..90dee4cb38bc 100644 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts @@ -172,12 +172,14 @@ }; &hdmi0 { - clocks = <&firmware_clocks 13>, <&dvp 0>; + clocks = <&firmware_clocks 13>, <&dvp 0>, <&firmware_clocks 14>; + clock-names = "hdmi", "clk-108M", "bvb"; status = "okay"; }; &hdmi1 { - clocks = <&firmware_clocks 13>, <&dvp 1>; + clocks = <&firmware_clocks 13>, <&dvp 1>, <&firmware_clocks 14>; + clock-names = "hdmi", "clk-108M", "bvb"; status = "okay"; }; From patchwork Fri Aug 21 07:10:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hoegeun Kwon X-Patchwork-Id: 11728287 Return-Path: Received: from mail.kernel.org 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[182.195.42.41]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20200821071122epsmtrp2da61cd56d43dbcb30a9004682fdccc9e~tNvgpY4TN2521125211epsmtrp25; Fri, 21 Aug 2020 07:11:22 +0000 (GMT) X-AuditID: b6c32a35-603ff70000004a22-63-5f3f739ae0fc Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id BD.C1.08382.A937F3F5; Fri, 21 Aug 2020 16:11:22 +0900 (KST) Received: from localhost.localdomain (unknown [10.113.111.64]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20200821071121epsmtip2b93ad01672ed278eec482ed19b1d61e6~tNvgXmNBO2424724247epsmtip2y; Fri, 21 Aug 2020 07:11:21 +0000 (GMT) From: Hoegeun Kwon To: nsaenzjulienne@suse.de, eric@anholt.net, maxime@cerno.tech Subject: [PATCH 3/3] drm/vc4: hdmi: Add pixel bvb clock control Date: Fri, 21 Aug 2020 16:10:45 +0900 Message-Id: <20200821071045.24501-4-hoegeun.kwon@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: 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MR-646709E3 X-CRM114-CacheID: sfid-20200821_031131_344496_34D880EC X-CRM114-Status: GOOD ( 20.86 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [203.254.224.25 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [203.254.224.25 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, tim.gover@raspberrypi.com, kdasu.kdev@gmail.com, sboyd@kernel.org, mturquette@baylibre.com, dave.stevenson@raspberrypi.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phil@raspberrypi.com, robh+dt@kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hoegeun.kwon@samsung.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org There is a problem that the output does not work at a resolution exceeding FHD. To solve this, we need to adjust the bvb clock at a resolution exceeding FHD. Signed-off-by: Hoegeun Kwon --- drivers/gpu/drm/vc4/vc4_hdmi.c | 25 +++++++++++++++++++++++++ drivers/gpu/drm/vc4/vc4_hdmi.h | 1 + 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 95ec5eedea39..eb3192d1fd86 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -80,6 +80,7 @@ # define VC4_HD_M_ENABLE BIT(0) #define CEC_CLOCK_FREQ 40000 +#define VC4_HSM_MID_CLOCK 149985000 static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused) { @@ -380,6 +381,7 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder) HDMI_WRITE(HDMI_VID_CTL, HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE); + clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock); clk_disable_unprepare(vc4_hdmi->hsm_clock); clk_disable_unprepare(vc4_hdmi->pixel_clock); @@ -638,6 +640,23 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) return; } + ret = clk_set_rate(vc4_hdmi->pixel_bvb_clock, + (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000)); + if (ret) { + DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + return; + } + + ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); + if (ret) { + DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret); + clk_disable_unprepare(vc4_hdmi->hsm_clock); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + return; + } + if (vc4_hdmi->variant->reset) vc4_hdmi->variant->reset(vc4_hdmi); @@ -1593,6 +1612,12 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi *vc4_hdmi) return PTR_ERR(vc4_hdmi->audio_clock); } + vc4_hdmi->pixel_bvb_clock = devm_clk_get(dev, "bvb"); + if (IS_ERR(vc4_hdmi->pixel_bvb_clock)) { + DRM_ERROR("Failed to get pixel bvb clock\n"); + return PTR_ERR(vc4_hdmi->pixel_bvb_clock); + } + vc4_hdmi->reset = devm_reset_control_get(dev, NULL); if (IS_ERR(vc4_hdmi->reset)) { DRM_ERROR("Failed to get HDMI reset line\n"); diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h index 0806c6d9f24e..63c6f8bddf1d 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h @@ -147,6 +147,7 @@ struct vc4_hdmi { struct clk *pixel_clock; struct clk *hsm_clock; struct clk *audio_clock; + struct clk *pixel_bvb_clock; struct reset_control *reset;