From patchwork Mon Oct 22 18:10:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Prasad Pandit X-Patchwork-Id: 10652341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F13C414BB for ; Mon, 22 Oct 2018 18:13:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CDDED291C5 for ; Mon, 22 Oct 2018 18:13:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2087291E4; Mon, 22 Oct 2018 18:13:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 96CEE291C5 for ; Mon, 22 Oct 2018 18:13:52 +0000 (UTC) Received: from localhost ([::1]:36510 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEei7-0005Gl-4w for patchwork-qemu-devel@patchwork.kernel.org; Mon, 22 Oct 2018 14:13:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33320) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEehD-0004KY-GL for qemu-devel@nongnu.org; Mon, 22 Oct 2018 14:12:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEeh9-0002KZ-Do for qemu-devel@nongnu.org; Mon, 22 Oct 2018 14:12:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5667) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gEeh8-0002FH-Ua for qemu-devel@nongnu.org; Mon, 22 Oct 2018 14:12:51 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 424693082A26; Mon, 22 Oct 2018 18:12:45 +0000 (UTC) Received: from localhost.localdomain (vpn2-54-23.bne.redhat.com [10.64.54.23]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E3A5360925; Mon, 22 Oct 2018 18:12:40 +0000 (UTC) From: P J P To: Qemu Developers Date: Mon, 22 Oct 2018 23:40:35 +0530 Message-Id: <20181022181035.20104-1-ppandit@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 22 Oct 2018 18:12:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1] arm: check bit index before usage X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , liqsub1 , Moguofang , Prasad J Pandit Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Prasad J Pandit While performing gpio write via strongarm_gpio_handler_update routine, the 'bit' index could access beyond s->handler[28] array. Add check to avoid OOB access. Reported-by: Moguofang Signed-off-by: Prasad J Pandit Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/strongarm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Update v1: use ARRAY_SIZE macro -> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg04826.html diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index ec2627374d..9225b1ba6e 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -532,7 +532,9 @@ static void strongarm_gpio_handler_update(StrongARMGPIOInfo *s) for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) { bit = ctz32(diff); - qemu_set_irq(s->handler[bit], (level >> bit) & 1); + if (bit < ARRAY_SIZE(s->handler)) { + qemu_set_irq(s->handler[bit], (level >> bit) & 1); + } } s->prev_level = level;