From patchwork Mon Oct 22 22:21:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Krish Sadhukhan X-Patchwork-Id: 10652611 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76C2613B5 for ; Mon, 22 Oct 2018 22:45:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF8DB28B04 for ; Mon, 22 Oct 2018 22:45:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DCC5D290EF; Mon, 22 Oct 2018 22:45:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7379028B04 for ; Mon, 22 Oct 2018 22:45:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729206AbeJWHGP (ORCPT ); Tue, 23 Oct 2018 03:06:15 -0400 Received: from userp2130.oracle.com ([156.151.31.86]:35096 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729149AbeJWHGO (ORCPT ); Tue, 23 Oct 2018 03:06:14 -0400 Received: from pps.filterd (userp2130.oracle.com [127.0.0.1]) by userp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w9MMiDYv164664; Mon, 22 Oct 2018 22:45:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : mime-version : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=GAdJ/lPOMv2fMEH8EJQzGt6QeNKU+JvtwU434e9f2U0=; b=Fr5PQgz6++Spey75MVXFilQJy3xouMYvjVMWBwVDsS488qb5IO+NgtP6mz6Z/TJSuB1a GO02uUa5ZdpVnywg0vFBBW/z0K8f7ZpRJGUOOuZzNblqgVsqKBLCNJgPZkDbf+QbiCxh E1zN4Y+w44lfGKy3yhiJ4IlkOD4gA42+BTYn5H0TWJFaCJ5/79L6n6GpxoogbTZThxM7 cCuisFhy23X6MinWsTU44p4omgEPFV8/mcpdVr/OJYfI8nmfVQptO2xZ79Tn74HSv61t UURKxoeLsqFHzoPfWx62G1YLCpY3VBR8cxpqrn5mcyUyHF8EYmsf0hcuZfqWBB8VN+/J VA== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by userp2130.oracle.com with ESMTP id 2n7usu1pu4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 22 Oct 2018 22:45:39 +0000 Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w9MMjXcT000547 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 22 Oct 2018 22:45:33 GMT Received: from abhmp0002.oracle.com (abhmp0002.oracle.com [141.146.116.8]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w9MMjWdw031304; Mon, 22 Oct 2018 22:45:33 GMT Received: from ban25x6uut29.us.oracle.com (/10.153.73.29) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 22 Oct 2018 15:45:32 -0700 From: Krish Sadhukhan To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com Subject: [PATCH][kvm-unit-test] nVMX x86: Check VM[READ|WRITE] bitmap addresses on vmentry of L2 guests Date: Mon, 22 Oct 2018 18:21:39 -0400 Message-Id: <20181022222139.28664-1-krish.sadhukhan@oracle.com> X-Mailer: git-send-email 2.9.5 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9054 signatures=668683 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810220191 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to section "Checks on VMX Controls" in Intel SDM vol 3C, the following check needs to be enforced on vmentry of L2 guests: If the "VMCS shadowing" VM-execution control is 1, the VMREAD-bitmap and VMWRITE-bitmap addresses must each satisfy the following checks: - Bits 11:0 of the address must be 0. - The address must not set any bits beyond the processor’s physical-address width. We just need to call test_vmcs_page_reference() here as the tests are done by test_vmcs_page_values() and test_vmcs_page_addr() respectively. Signed-off-by: Krish Sadhukhan Reviewed-by: Konrad Rzeszutek Wilk --- x86/vmx_tests.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 50 insertions(+), 6 deletions(-) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index b105b23..57ee344 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -4721,6 +4721,55 @@ static void test_pml(void) vmcs_write(CPU_EXEC_CTRL1, secondary_saved); } +enum vmcs_access { + ACCESS_VMREAD, + ACCESS_VMWRITE, + ACCESS_NONE, +}; + +/* + * If the "VMCS shadowing" VM-execution control is 1, the VMREAD-bitmap + * and VMWRITE-bitmap addresses must each satisfy the following checks: + * + * - Bits 11:0 of the address must be 0. + * - The address must not set any bits beyond the processor’s + * physical-address width. + * + * [Intel SDM] + */ +static void test_vmread_vmwrite_bitmap(void) +{ + u8 *bitmap[2]; + u32 primary_saved = vmcs_read(CPU_EXEC_CTRL0); + u32 secondary_saved = vmcs_read(CPU_EXEC_CTRL1); + u32 primary = primary_saved; + u32 secondary = secondary_saved; + + if (!((ctrl_cpu_rev[0].clr & CPU_SECONDARY) && + (ctrl_cpu_rev[1].clr & CPU_SHADOW_VMCS))) { + test_skip("\"Secondary execution\" control and/or \"VMCS shadowing\" control is not supported !"); + return; + } + + primary |= CPU_SECONDARY; + vmcs_write(CPU_EXEC_CTRL0, primary); + secondary |= CPU_SHADOW_VMCS; + vmcs_write(CPU_EXEC_CTRL1, secondary); + + bitmap[ACCESS_VMREAD] = alloc_page(); + bitmap[ACCESS_VMWRITE] = alloc_page(); + vmcs_write(VMREAD_BITMAP, virt_to_phys(bitmap[ACCESS_VMREAD])); + vmcs_write(VMWRITE_BITMAP, virt_to_phys(bitmap[ACCESS_VMWRITE])); + + test_vmcs_page_reference(CPU_SHADOW_VMCS, VMREAD_BITMAP, + "VMREAD bitmap", "VMCS shadowing", false, false); + test_vmcs_page_reference(CPU_SHADOW_VMCS, VMWRITE_BITMAP, + "VMWRITE bitmap", "VMCS shadowing", false, false); + + vmcs_write(CPU_EXEC_CTRL0, primary_saved); + vmcs_write(CPU_EXEC_CTRL1, secondary_saved); +} + /* * Check that the virtual CPU checks all of the VMX controls as * documented in the Intel SDM. @@ -4747,6 +4796,7 @@ static void vmx_controls_test(void) test_invalid_event_injection(); test_vpid(); test_eptp(); + test_vmread_vmwrite_bitmap(); } static bool valid_vmcs_for_vmentry(void) @@ -5468,12 +5518,6 @@ static void vmx_apic_passthrough_thread_test(void) vmx_apic_passthrough(true); } -enum vmcs_access { - ACCESS_VMREAD, - ACCESS_VMWRITE, - ACCESS_NONE, -}; - struct vmcs_shadow_test_common { enum vmcs_access op; enum Reason reason;