From patchwork Fri Sep 4 05:51:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryder Lee X-Patchwork-Id: 11755835 X-Patchwork-Delegate: nbd@nbd.name Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E14592C for ; Fri, 4 Sep 2020 05:51:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7BCB4206F2 for ; Fri, 4 Sep 2020 05:51:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="jOi6ySow" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726445AbgIDFvK (ORCPT ); Fri, 4 Sep 2020 01:51:10 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:42992 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725812AbgIDFvJ (ORCPT ); Fri, 4 Sep 2020 01:51:09 -0400 X-UUID: 6dd3e289bd8840d19d9b71b25bc22b22-20200904 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=jPwwJyFn/+V/3BD7kswj4A4OC14ihyANbZY+bcDcNig=; b=jOi6ySowdlOa3/dwTxbrW1Wr5jWrpcmDZ4A+QHZ14oEYKgvn5sovrc5+5keTFOaC5OU8mYDeTWSrSGgnDi3KttN29wIl+7yab3nLobMMj8SrIzT0pbPLuON3kunkUgjKHCOMU6Cts6pO5zxdvwXynxBeAvzZW9bnTNLFA/tk9xM=; X-UUID: 6dd3e289bd8840d19d9b71b25bc22b22-20200904 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1095372783; Fri, 04 Sep 2020 13:51:04 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Sep 2020 13:51:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Sep 2020 13:51:03 +0800 From: Ryder Lee To: Felix Fietkau , Lorenzo Bianconi CC: Shayne Chen , Evelyn Tsai , , , Chih-Min Chen , Ryder Lee Subject: [PATCH] mt76: mt7915: fix unexpected firmware mode Date: Fri, 4 Sep 2020 13:51:02 +0800 Message-ID: <1ff9c333497bc23c535028c53e19e9d9724cf4c0.1599099379.git.ryder.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Chih-Min Chen Avoid firmware falling into spectrum mode since that will set unexpected PSE/PLE thresholds which lead to Tx hang. This mode should be cleaned before firmware download stage. Signed-off-by: Chih-Min Chen Signed-off-by: Ryder Lee --- drivers/net/wireless/mediatek/mt76/mt7915/init.c | 6 ++++++ drivers/net/wireless/mediatek/mt76/mt7915/regs.h | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c index 517f526ec852..5a2dbbd9aa5a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c @@ -139,6 +139,12 @@ static int mt7915_init_hardware(struct mt7915_dev *dev) set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); + /* + * force firmware operation mode into normal state, + * which should be set before firmware download stage. + */ + mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); + ret = mt7915_mcu_init(dev); if (ret) return ret; diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h index e06c4d6cd2fc..cb852a4bfd97 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h @@ -371,6 +371,13 @@ static inline u32 mt7915_int_rx_mask(enum mt76_rxq_id q) #define MT_HIF_REMAP_L2_BASE GENMASK(31, 12) #define MT_HIF_REMAP_BASE_L2 0x00000 +#define MT_SWDEF_BASE 0x41f200 +#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs)) +#define MT_SWDEF_MODE MT_SWDEF(0x3c) +#define MT_SWDEF_NORMAL_MODE 0 +#define MT_SWDEF_ICAP_MODE 1 +#define MT_SWDEF_SPECTRUM_MODE 2 + #define MT_TOP_BASE 0x18060000 #define MT_TOP(ofs) (MT_TOP_BASE + (ofs))