From patchwork Mon Sep 7 10:31:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11760521 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B5A2A13B1 for ; Mon, 7 Sep 2020 10:33:12 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 83F5120659 for ; Mon, 7 Sep 2020 10:33:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="VpNrSLsn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 83F5120659 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERd-0003cQ-6s; Mon, 07 Sep 2020 10:32:17 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERc-0003cB-Gj for xen-devel@lists.xenproject.org; Mon, 07 Sep 2020 10:32:16 +0000 X-Inumbo-ID: f4464927-a6c5-4881-9e4a-d42f82744206 Received: from esa3.hc3370-68.iphmx.com (unknown [216.71.145.155]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id f4464927-a6c5-4881-9e4a-d42f82744206; Mon, 07 Sep 2020 10:32:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1599474736; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nNV86Ew3LjH2EpK4D+vMA6EdX9DQt3c+LWEiRgDNDAU=; b=VpNrSLsn6XVanN4YTjPLuu2rz3vlbxz0P6kWGSRpI+u07ZnT28R3pFEH AH4+jz5CzRQt2kSAcc7kZaZYB0EkCQSJJYBj29c2f/NGS8jSqdyHZa0qs lTH8GcYsSuxhcfouyHGTfSRlJ0G47dKvffdFwIXvoJJnzByLzBEjZfWwM U=; Authentication-Results: esa3.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: G/6hvgoHAuwvZtZ7xZ4mwP8HNzqsd9SBOh3RVN4sLFXmL4jsbYrKmBxGppBs6vk//3v+yZY+fv sEtecMD61/F7b7oO4aAH7oMXNeggoCIaXTX+ebmj/O08zE4ozhsK+/H/yxjVnLhw9fXeMOkJLa EOL8DL790VLQXAaijB9C/91EQi9eVt9i4SVnZgzZKEwFfRMZ3vwuWW1CzlKp0dqgiHkM25XRBY z2lF3Hi37VjVb8aOYHjXT/Wm4WHHGIOjvIri4qoVLVpg+wy1kzkNPTMcKUJOftJ+t8rD3P0ZFF p2Y= X-SBRS: 2.7 X-MesageID: 26100625 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.76,401,1592884800"; d="scan'208";a="26100625" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v4 1/5] x86/svm: handle BU_CFG and BU_CFG2 with cases Date: Mon, 7 Sep 2020 12:31:39 +0200 Message-ID: <20200907103143.58845-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200907103143.58845-1-roger.pau@citrix.com> References: <20200907103143.58845-1-roger.pau@citrix.com> MIME-Version: 1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Move the special handling of reads to it's own switch case, and also add support for BU_CFG2. On the write side ignore writes if the MSR is readable, otherwise return a #GP. This is in preparation for changing the default MSR read/write behavior, which will instead return #GP on not explicitly handled cases. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- Changes since v3: - Adjust comment to match code. - Remove leading zeros from MSR value. Changes since v2: - Move the handling of reads to it's own case. - Drop writes if the MSR is readable, else return a #GP. Changes since v1: - New in this version. --- xen/arch/x86/hvm/svm/svm.c | 43 ++++++++++++++++++++++++++------------ 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index af584ff5d1..e6fcb734b6 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1864,6 +1864,30 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) *msr_content = 1ULL << 61; /* MC4_MISC.Locked */ break; + case MSR_F10_BU_CFG: + if ( !rdmsr_safe(msr, *msr_content) ) + break; + + if ( boot_cpu_data.x86 == 0xf ) + { + /* + * Win2k8 x64 reads this MSR on revF chips, where it wasn't + * publically available; it uses a magic constant in %rdi as a + * password, which we don't have in rdmsr_safe(). Since we'll + * throw a #GP for later writes, just use a plausible value here + * (the reset value from rev10h chips) if the real CPU didn't + * provide one. + */ + *msr_content = 0x10200020; + break; + } + goto gpf; + + case MSR_F10_BU_CFG2: + if ( rdmsr_safe(msr, *msr_content) ) + goto gpf; + break; + case MSR_IA32_EBC_FREQUENCY_ID: /* * This Intel-only register may be accessed if this HVM guest @@ -1942,19 +1966,6 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) default: if ( rdmsr_safe(msr, *msr_content) == 0 ) break; - - if ( boot_cpu_data.x86 == 0xf && msr == MSR_F10_BU_CFG ) - { - /* Win2k8 x64 reads this MSR on revF chips, where it - * wasn't publically available; it uses a magic constant - * in %rdi as a password, which we don't have in - * rdmsr_safe(). Since we'll ignore the later writes, - * just use a plausible value here (the reset value from - * rev10h chips) if the real CPU didn't provide one. */ - *msr_content = 0x0000000010200020ull; - break; - } - goto gpf; } @@ -2110,6 +2121,12 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content) nsvm->ns_msr_hsavepa = msr_content; break; + case MSR_F10_BU_CFG: + case MSR_F10_BU_CFG2: + if ( rdmsr_safe(msr, msr_content) ) + goto gpf; + break; + case MSR_AMD64_TSC_RATIO: if ( msr_content & TSC_RATIO_RSVD_BITS ) goto gpf; From patchwork Mon Sep 7 10:31:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11760533 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A42C413B1 for ; Mon, 7 Sep 2020 10:33:42 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 793D620659 for ; Mon, 7 Sep 2020 10:33:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="Uuo194cN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 793D620659 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERn-0003fZ-0f; Mon, 07 Sep 2020 10:32:27 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERm-0003cB-CN for xen-devel@lists.xenproject.org; Mon, 07 Sep 2020 10:32:26 +0000 X-Inumbo-ID: 60720ebc-b159-4355-b814-2b20629da97d Received: from esa4.hc3370-68.iphmx.com (unknown [216.71.155.144]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 60720ebc-b159-4355-b814-2b20629da97d; Mon, 07 Sep 2020 10:32:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1599474737; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YwPUUc6d1IMtiKQLssJvNStyY7/P3uIUT6ab4kEOHZ0=; b=Uuo194cNdFT7+yhJloRUya/LiCUypxKwglIc/tthNXLggXhFFCvHfgst SHLwQmRBtO88Em9jND/ZsgYX9zxW3scPl1LTrq5QuiNDXCVtmPAwFTGIx K3iO20TB6dV6WfTmXesJmN5kzST13vMBDYHNG9BKF63VjoDNcRwvS9lc3 0=; Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: CNb8xjyipB427F9hzLv6Xxujug0DZbMbj4O1DPf8Rsvu3kwvRMMslGkTTNOEY1vQxWE9oS1MvP CLEWrOT0/9+AylbI/2geHue5YfRXQK3MDUnAh2/OoMepop/BSUMI2Dk4bxP+GUImR2t9Q3+mQM DjOpKQ7j7zojmu75/WaRKLf/3nr5j/mywbldCUqwWTCq8xJPxYrgxBZPKtBUu5RlAPeZzsW5xr raOuhTX3vDyzD/cDcF9HJLvLLHW81Y7Tj9JN84+FQcmCit3xwaqtkCfh7ceH5fNhKkkr1WJHi/ dNM= X-SBRS: 2.7 X-MesageID: 27082630 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.76,401,1592884800"; d="scan'208";a="27082630" From: Roger Pau Monne To: CC: Roger Pau Monne , Jun Nakajima , Kevin Tian , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v4 2/5] x86/pv: allow reading FEATURE_CONTROL MSR Date: Mon, 7 Sep 2020 12:31:40 +0200 Message-ID: <20200907103143.58845-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200907103143.58845-1-roger.pau@citrix.com> References: <20200907103143.58845-1-roger.pau@citrix.com> MIME-Version: 1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Linux PV guests will attempt to read the FEATURE_CONTROL MSR, so move the handling done in VMX code into guest_rdmsr as it can be shared between PV and HVM guests that way. Note that there's a slight behavior change and attempting to read the MSR when no features are available will result in a fault. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Reviewed-by: Kevin Tian --- Changes since v3: - Only allow reading the MSR when there are bits available (different than bit 0). Changes from v1: - Move the VMX implementation into guest_rdmsr. --- xen/arch/x86/hvm/vmx/vmx.c | 8 +------- xen/arch/x86/msr.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index c4b40bf3cb..709ea149d1 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2980,13 +2980,7 @@ static int vmx_msr_read_intercept(unsigned int msr, uint64_t *msr_content) case MSR_IA32_DEBUGCTLMSR: __vmread(GUEST_IA32_DEBUGCTL, msr_content); break; - case MSR_IA32_FEATURE_CONTROL: - *msr_content = IA32_FEATURE_CONTROL_LOCK; - if ( vmce_has_lmce(curr) ) - *msr_content |= IA32_FEATURE_CONTROL_LMCE_ON; - if ( nestedhvm_enabled(curr->domain) ) - *msr_content |= IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX; - break; + case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC: if ( !nvmx_msr_read_intercept(msr, msr_content) ) goto gp_fault; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 74bf7d9589..79fbb9e940 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -197,6 +198,17 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) /* Not offered to guests. */ goto gp_fault; + case MSR_IA32_FEATURE_CONTROL: + if ( !cp->basic.vmx && !vmce_has_lmce(v) ) + goto gp_fault; + + *val = IA32_FEATURE_CONTROL_LOCK; + if ( vmce_has_lmce(v) ) + *val |= IA32_FEATURE_CONTROL_LMCE_ON; + if ( cp->basic.vmx ) + *val |= IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX; + break; + case MSR_IA32_PLATFORM_ID: if ( !(cp->x86_vendor & X86_VENDOR_INTEL) || !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) ) From patchwork Mon Sep 7 10:31:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11760525 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 814C959D for ; Mon, 7 Sep 2020 10:33:27 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54ADD20659 for ; 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d="scan'208";a="26100626" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v4 3/5] x86/pv: disallow access to unknown MSRs Date: Mon, 7 Sep 2020 12:31:41 +0200 Message-ID: <20200907103143.58845-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200907103143.58845-1-roger.pau@citrix.com> References: <20200907103143.58845-1-roger.pau@citrix.com> MIME-Version: 1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Change the catch-all behavior for MSR not explicitly handled. Instead of allow full read-access to the MSR space and silently dropping writes return an exception when the MSR is not explicitly handled. Signed-off-by: Roger Pau Monné Acked-by: Andrew Cooper --- Changes since v2: - Added missing 0x prefix. --- xen/arch/x86/pv/emul-priv-op.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index bcc1188f6a..2d9953f5b4 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -972,9 +972,10 @@ static int read_msr(unsigned int reg, uint64_t *val, } /* fall through */ default: + gdprintk(XENLOG_WARNING, "RDMSR 0x%08x unimplemented\n", reg); + break; + normal: - /* Everyone can read the MSR space. */ - /* gdprintk(XENLOG_WARNING, "Domain attempted RDMSR %08x\n", reg); */ if ( rdmsr_safe(reg, *val) ) break; return X86EMUL_OKAY; @@ -1141,14 +1142,15 @@ static int write_msr(unsigned int reg, uint64_t val, } /* fall through */ default: - if ( rdmsr_safe(reg, temp) ) - break; + gdprintk(XENLOG_WARNING, + "WRMSR 0x%08x val 0x%016"PRIx64" unimplemented\n", + reg, val); + break; - if ( val != temp ) invalid: - gdprintk(XENLOG_WARNING, - "Domain attempted WRMSR %08x from 0x%016"PRIx64" to 0x%016"PRIx64"\n", - reg, temp, val); + gdprintk(XENLOG_WARNING, + "Domain attempted WRMSR 0x%08x from 0x%016"PRIx64" to 0x%016"PRIx64"\n", + reg, temp, val); return X86EMUL_OKAY; } From patchwork Mon Sep 7 10:31:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11760537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F363759D for ; Mon, 7 Sep 2020 10:33:43 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C814920659 for ; Mon, 7 Sep 2020 10:33:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="Fmexj6g0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C814920659 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERj-0003e2-O5; Mon, 07 Sep 2020 10:32:23 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERi-0003d0-6F for xen-devel@lists.xenproject.org; Mon, 07 Sep 2020 10:32:22 +0000 X-Inumbo-ID: 367b00db-bd3a-4ff4-b668-8cc0a50fde81 Received: from esa5.hc3370-68.iphmx.com (unknown [216.71.155.168]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 367b00db-bd3a-4ff4-b668-8cc0a50fde81; Mon, 07 Sep 2020 10:32:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1599474740; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OCAXR8J1S116BXr4h3iOtSzLFt4qLz1NctDhz+CxumY=; b=Fmexj6g0msP1MCNfLLJIwtw50QVkORlCD0P2qE3Wcfzy6fLmHO4hYbJu 1GKYnQW9RkBCU++ec+wX6R3lrLzjbZLBQeg9lMQ5l6fHUFCS28BNNWc1l alJs4ceIXZVEhU3kEIKOp1yhRtzKt1tlQmkoJhX1ZJLmMJbSaQvnL+gZN Y=; Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: x5VHlbst6Fcg2DPrupmNdTiqKIta63Lm58fQ3OA7+CaFIwFZ+V1WaeLMqA8i9VFhCi7NRpKCVl hpV4ZAWrUUn/f8fWM0z6f2DTOuf1K6pyoNwgMcO60kzey3plY5NY5eT0UDxGFdszpY8dxL3cff Jwk2s3KYvCV1MjYmfBPwDdqWwSTIGfr5mlyvQL+ltuoAcfnnMz7CLDbg7vp6RIydV7a0FYrz5L Hz+/cwlul3KNVrmC/TDEQ5bn1VsPJHDR3c8G50HXuN5IjtYjuZlHV6GyLmbFWixu4wniBDgo4V /Q4= X-SBRS: 2.7 X-MesageID: 26247477 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.76,401,1592884800"; d="scan'208";a="26247477" From: Roger Pau Monne To: CC: Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jun Nakajima , Kevin Tian Subject: [PATCH v4 4/5] x86/hvm: Disallow access to unknown MSRs Date: Mon, 7 Sep 2020 12:31:42 +0200 Message-ID: <20200907103143.58845-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200907103143.58845-1-roger.pau@citrix.com> References: <20200907103143.58845-1-roger.pau@citrix.com> MIME-Version: 1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Andrew Cooper Change the catch-all behavior for MSR not explicitly handled. Instead of allow full read-access to the MSR space and silently dropping writes return an exception when the MSR is not explicitly handled. Signed-off-by: Andrew Cooper [remove rdmsr_safe from default case in svm_msr_read_intercept] Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Reviewed-by: Kevin Tian --- Changes since v1: - Fold chunk to remove explicit write handling of VMX MSRs just to #GP. - Remove catch-all rdmsr_safe in svm_msr_read_intercept. --- xen/arch/x86/hvm/svm/svm.c | 10 ++++------ xen/arch/x86/hvm/vmx/vmx.c | 16 ++++------------ 2 files changed, 8 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index e6fcb734b6..108c71785c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1964,8 +1964,7 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) break; default: - if ( rdmsr_safe(msr, *msr_content) == 0 ) - break; + gdprintk(XENLOG_WARNING, "RDMSR 0x%08x unimplemented\n", msr); goto gpf; } @@ -2150,10 +2149,9 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content) break; default: - /* Match up with the RDMSR side; ultimately this should go away. */ - if ( rdmsr_safe(msr, msr_content) == 0 ) - break; - + gdprintk(XENLOG_WARNING, + "WRMSR 0x%08x val 0x%016"PRIx64" unimplemented\n", + msr, msr_content); goto gpf; } diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 709ea149d1..a3aadce4d8 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3015,9 +3015,7 @@ static int vmx_msr_read_intercept(unsigned int msr, uint64_t *msr_content) break; } - if ( rdmsr_safe(msr, *msr_content) == 0 ) - break; - + gdprintk(XENLOG_WARNING, "RDMSR 0x%08x unimplemented\n", msr); goto gp_fault; } @@ -3290,11 +3288,6 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) __vmwrite(GUEST_IA32_DEBUGCTL, msr_content); break; - case MSR_IA32_FEATURE_CONTROL: - case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC: - /* None of these MSRs are writeable. */ - goto gp_fault; - case MSR_IA32_MISC_ENABLE: /* * Silently drop writes that don't change the reported value: At least @@ -3324,10 +3317,9 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) is_last_branch_msr(msr) ) break; - /* Match up with the RDMSR side; ultimately this should go away. */ - if ( rdmsr_safe(msr, msr_content) == 0 ) - break; - + gdprintk(XENLOG_WARNING, + "WRMSR 0x%08x val 0x%016"PRIx64" unimplemented\n", + msr, msr_content); goto gp_fault; } From patchwork Mon Sep 7 10:31:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11760517 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B98FF15AB for ; Mon, 7 Sep 2020 10:32:51 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8ACB12067C for ; Mon, 7 Sep 2020 10:32:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="Iu+Ov3Cb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8ACB12067C Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERs-0003iP-Ai; Mon, 07 Sep 2020 10:32:32 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kFERr-0003cB-CR for xen-devel@lists.xenproject.org; Mon, 07 Sep 2020 10:32:31 +0000 X-Inumbo-ID: 14a25a43-e958-47cd-996c-9a04c53818fd Received: from esa1.hc3370-68.iphmx.com (unknown [216.71.145.142]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 14a25a43-e958-47cd-996c-9a04c53818fd; Mon, 07 Sep 2020 10:32:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1599474742; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eSHJYKb2FghbO5MTB7iGVN9lMVAAY72QGAwzLnYUDE4=; b=Iu+Ov3Cb2pL9MlABRSLXuHW1RZnJlS7ezPwTNfRXWtzql2rxHoHxHfkw bwrMTJcwPcV+f7oJuXL6Xqg/CPc6eRpnnFg4bHEcdeq0vk7MvL/h7j/pg sqFvaGIPth1JwEw2fDEfC9M3VTg8RI3JlJQ4uMqfqHC+LZJu0ORvdC4a4 k=; Authentication-Results: esa1.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: 2e8RvT3POBeeV59iT6YMhX/2bn2Bt7wptpPBVLNE4Ou8y2g8ZFa16KIs3AUdkdXCJNveiKcL3E 4cOD441IHsqSSYzW9ZgKZ7kjRgB3Gxfj8Lj02eZBKHqjrU/tMit3Ui+H8j+DxXW7MbLSkIDG6H AId/cpbHiDPLR+GZBSpEzDtZYab/EzdUy2yWMc9HDXDWg7XJYywj/75GIEywxFP3eN36nm/5w3 YbDtu3gD8Gh9KQT2ftGEqxet9NFpabnRAfyxWP+N6C2PobgTmBUIdPC85Jvc1rJ8FjGSR3RGSE NZI= X-SBRS: 2.7 X-MesageID: 26456355 X-Ironport-Server: esa1.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.76,401,1592884800"; d="scan'208";a="26456355" From: Roger Pau Monne To: CC: Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu Subject: [PATCH v4 5/5] x86/msr: Drop compatibility #GP handling in guest_{rd, wr}msr() Date: Mon, 7 Sep 2020 12:31:43 +0200 Message-ID: <20200907103143.58845-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200907103143.58845-1-roger.pau@citrix.com> References: <20200907103143.58845-1-roger.pau@citrix.com> MIME-Version: 1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Andrew Cooper Now that the main PV/HVM MSR handlers raise #GP for all unknown MSRs, there is no need to special case these MSRs any more. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- Changes since v1: - New in this version. --- xen/arch/x86/msr.c | 46 ---------------------------------------------- 1 file changed, 46 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 79fbb9e940..81b34fb212 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -175,29 +175,6 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) switch ( msr ) { - case MSR_AMD_PATCHLOADER: - case MSR_IA32_UCODE_WRITE: - case MSR_PRED_CMD: - case MSR_FLUSH_CMD: - /* Write-only */ - case MSR_TEST_CTRL: - case MSR_CORE_CAPABILITIES: - case MSR_TSX_FORCE_ABORT: - case MSR_TSX_CTRL: - case MSR_MCU_OPT_CTRL: - case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7): - case MSR_U_CET: - case MSR_S_CET: - case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE: - case MSR_AMD64_LWP_CFG: - case MSR_AMD64_LWP_CBADDR: - case MSR_PPIN_CTL: - case MSR_PPIN: - case MSR_AMD_PPIN_CTL: - case MSR_AMD_PPIN: - /* Not offered to guests. */ - goto gp_fault; - case MSR_IA32_FEATURE_CONTROL: if ( !cp->basic.vmx && !vmce_has_lmce(v) ) goto gp_fault; @@ -364,29 +341,6 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { uint64_t rsvd; - case MSR_IA32_PLATFORM_ID: - case MSR_CORE_CAPABILITIES: - case MSR_INTEL_CORE_THREAD_COUNT: - case MSR_INTEL_PLATFORM_INFO: - case MSR_ARCH_CAPABILITIES: - /* Read-only */ - case MSR_TEST_CTRL: - case MSR_TSX_FORCE_ABORT: - case MSR_TSX_CTRL: - case MSR_MCU_OPT_CTRL: - case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7): - case MSR_U_CET: - case MSR_S_CET: - case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE: - case MSR_AMD64_LWP_CFG: - case MSR_AMD64_LWP_CBADDR: - case MSR_PPIN_CTL: - case MSR_PPIN: - case MSR_AMD_PPIN_CTL: - case MSR_AMD_PPIN: - /* Not offered to guests. */ - goto gp_fault; - case MSR_AMD_PATCHLEVEL: BUILD_BUG_ON(MSR_IA32_UCODE_REV != MSR_AMD_PATCHLEVEL); /*