From patchwork Wed Oct 24 09:48:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?44Kw44Kn44Oz44O744Ki44Oz44O744Ob44Kh44Oz?= X-Patchwork-Id: 10654457 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE6CD13B5 for ; Wed, 24 Oct 2018 09:49:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B25092A72A for ; Wed, 24 Oct 2018 09:49:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A66842A72C; Wed, 24 Oct 2018 09:49:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F004B2A72A for ; Wed, 24 Oct 2018 09:49:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726531AbeJXSQY (ORCPT ); Wed, 24 Oct 2018 14:16:24 -0400 Received: from www3345.sakura.ne.jp ([49.212.235.55]:40936 "EHLO www3345.sakura.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726301AbeJXSQY (ORCPT ); Wed, 24 Oct 2018 14:16:24 -0400 Received: from fsav109.sakura.ne.jp (fsav109.sakura.ne.jp [27.133.134.236]) by www3345.sakura.ne.jp (8.15.2/8.15.2) with ESMTP id w9O9mvDi036377; Wed, 24 Oct 2018 18:48:57 +0900 (JST) (envelope-from na-hoan@jinso.co.jp) Received: from www3345.sakura.ne.jp (49.212.235.55) by fsav109.sakura.ne.jp (F-Secure/fsigk_smtp/530/fsav109.sakura.ne.jp); Wed, 24 Oct 2018 18:48:57 +0900 (JST) X-Virus-Status: clean(F-Secure/fsigk_smtp/530/fsav109.sakura.ne.jp) Received: from localhost (p14010-ipadfx41marunouchi.tokyo.ocn.ne.jp [61.118.107.10]) (authenticated bits=0) by www3345.sakura.ne.jp (8.15.2/8.15.2) with ESMTPSA id w9O9mpeD036334 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 24 Oct 2018 18:48:57 +0900 (JST) (envelope-from na-hoan@jinso.co.jp) From: Nguyen An Hoan To: linux-renesas-soc@vger.kernel.org, geert+renesas@glider.be Cc: wsa@sang-engineering.com, kuninori.morimoto.gx@renesas.com, yoshihiro.shimoda.uh@renesas.com, h-inayoshi@jinso.co.jp, nv-dung@jinso.co.jp, cv-dong@jinso.co.jp, na-hoan@jinso.co.jp Subject: [PATCH] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register Date: Wed, 24 Oct 2018 18:48:51 +0900 Message-Id: <1540374531-11053-1-git-send-email-na-hoan@jinso.co.jp> X-Mailer: git-send-email 2.7.4 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hoan Nguyen An Fix setting value for IRQCTL register. We are setting the last 6 bits of (IRQCTL) to be 1 (0x3f). But according to Hardware manual, values 1 are "setting prohibited". Signed-off-by: Hoan Nguyen An --- drivers/thermal/rcar_gen3_thermal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c index 7aed533..2b8fb1e 100644 --- a/drivers/thermal/rcar_gen3_thermal.c +++ b/drivers/thermal/rcar_gen3_thermal.c @@ -280,7 +280,7 @@ static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM); - rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); + rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2); @@ -306,7 +306,7 @@ static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc) usleep_range(1000, 2000); - rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); + rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);