From patchwork Tue Sep 8 08:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762919 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D5D0112E for ; Tue, 8 Sep 2020 08:14:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 47DAD21D20 for ; Tue, 8 Sep 2020 08:14:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xkAbbSsM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 47DAD21D20 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYlo-0007L4-7e for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:14:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58240) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYl9-0005ZS-0R for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:47 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]:33595) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYl7-0000QX-1i for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:46 -0400 Received: by mail-pg1-x531.google.com with SMTP id e33so9525557pgm.0 for ; Tue, 08 Sep 2020 01:13:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+orWxGBa1SRb2nSQN/q2qViaNIRmFc8NrraWTotMcp4=; b=xkAbbSsMHL13QIEKseh5FvDJpbVn1+R2Sg1fgccSIWpkC58PzKCqMkM1NBtdSnWE++ ipaKwJSL2vLp8dsX0n3pvml9YkcnEGputtAoaK/8rCSraQu60jc3FzpHS2eNrrT1sMXi FPMwomj4AQ6HKJQl9fd+eEg6m0sicxxuAHVG3+Qlfgnc0q/ss013jz7NS0cgpCPqn7sk jnlYhdfAwcoSB8ttZ9HaALVK1We1M95q5+JG5JpNWtQJF/I12lsT6TmkLimIMEfupF8n qj0QCkTy/H/dnaY09xmSvUu+9b0JR1BH8mfAH+hzZ4uXK5AkRwn2PpjMyAineTKNNh5U 8H7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+orWxGBa1SRb2nSQN/q2qViaNIRmFc8NrraWTotMcp4=; b=b5OOB2ggt6PFXYIHWq31TXUZgamSzytj8W8Twr/BBNHwABsb10ElMC0LPfstVhyZIg XgMYiu1NqUJEhae9EMn3C7FZGERBtpUDg81KfI7k7TM9cFuenl7/VE7x0fu6w0qX6pqo 1lQnzvMZLVsgWVZvCapl/R/jFRQXSxZwb23abSDayM3i3PlexBlkjmS3a3IXcTLsa0xw PZUcmNuXkxLgfeEvPD0eLqYc6DHxV55ZlGZ2y4TVlYy1jl1XRrR9nIegqo8ER3PAF41X FdtGzKE1xkg4duqQvBSQkn06ImNmZ7wQfSoECc+S/sTZNexqTp4HPlLbPX0woqGEXiod soSw== X-Gm-Message-State: AOAM5332vLMtxR8zAxzkg00P2J+5kgXXDgzaQ5Dvxshyaq2jCOkxiPXW mWCZeKZCuijYLa6UIfqoMTCv X-Google-Smtp-Source: ABdhPJy29qU280DDR0dckE2cglije4N2FSPCY8YwHmYTKGvt5mOwGEtHUFVV6sFkDNnPWofYqbIYDg== X-Received: by 2002:aa7:9aef:: with SMTP id y15mr2846154pfp.119.1599552823600; Tue, 08 Sep 2020 01:13:43 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:43 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 01/12] update Linux headers with new vSPE macros Date: Tue, 8 Sep 2020 08:13:19 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x531.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- linux-headers/asm-arm64/kvm.h | 4 ++++ linux-headers/linux/kvm.h | 1 + 2 files changed, 5 insertions(+) diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index 9e34f0f875..802319ee02 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -106,6 +106,7 @@ struct kvm_regs { #define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */ #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */ +#define KVM_ARM_VCPU_SPE_V1 7 /* Support guest SPEv1 */ struct kvm_vcpu_init { __u32 target; @@ -334,6 +335,9 @@ struct kvm_vcpu_events { #define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 #define KVM_ARM_VCPU_PVTIME_CTRL 2 #define KVM_ARM_VCPU_PVTIME_IPA 0 +#define KVM_ARM_VCPU_SPE_V1_CTRL 3 +#define KVM_ARM_VCPU_SPE_V1_IRQ 0 +#define KVM_ARM_VCPU_SPE_V1_INIT 1 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index a28c366737..8840cbb01c 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1031,6 +1031,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_PPC_SECURE_GUEST 181 #define KVM_CAP_HALT_POLL 182 #define KVM_CAP_ASYNC_PF_INT 183 +#define KVM_CAP_ARM_SPE_V1 184 #ifdef KVM_CAP_IRQ_ROUTING From patchwork Tue Sep 8 08:13:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762957 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C99FE1599 for ; Tue, 8 Sep 2020 08:18:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CED42177B for ; Tue, 8 Sep 2020 08:18:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="vJ8gJHor" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CED42177B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:44170 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYpG-0005wS-E6 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:18:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58286) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlA-0005Zp-3i for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:48 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:44986) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYl8-0000Qo-5b for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:47 -0400 Received: by mail-pf1-x442.google.com with SMTP id o20so10317087pfp.11 for ; Tue, 08 Sep 2020 01:13:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NODmkJ7zv3Ze8nSAAv5Nj47e1RMWaOU9HVwH97SKsQI=; b=vJ8gJHor/P+Jl1BmkcHCpjIjT1JCsWa6RcvfIElzkZQMD3ubbmjT/n4HZwlmsc0Xfg WZ7W5PqRbzbppkxmUx5FGpPFmOo/le/LfovbCExJ/KZZb1+3Oe6rnMU4jFgKOoOz+16M afDRw36jeZOE7ot9hJBxsZKXf5HBp1DeBmcDM1sUJvKboUpteuu4Wv+1rm3eJtg3WlOo 4zSYvpKY8QKbZlFF9utJce6omxNc2nR0jsI0Gb/LDmHVHGmStvtbHHA2orgC+UB/19dS gyjlh7/omwadkmQbqlsG5QM2n5klBJtQhsjwDpblHY4dtWrlyEpL81GgnwZrvD3jWHq3 qYWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NODmkJ7zv3Ze8nSAAv5Nj47e1RMWaOU9HVwH97SKsQI=; b=UBUtRqu8zIGwn81fM752ksqa1IdQtb2gzNvgk61e8BK+CZLQLB0hiDFbEKsmTUvNW8 ZWVH3EDibZLnSZqYDXahJgXRAvoi5b+Gvvm75BgWomWKme3gXna4D/w5mms1iSUxrfuF 1tToqAwg/oQgpeeWhSYYw0YDDuNKw5TPJlYjeg7i/YCE0No2JA5sFYsyUcBVgsfc7ByA cxKyc4OqOKZieUYr2S00iSXJKh39U0Dm6iOLZhcAhPrvLlcXuFL22BauvV3g8SoDm7F7 76u/vUDJdpKJFRi+aZBon7kX872yBw0pZmDHc/c8/DRp9uCAl96+b5aipqqxkm1Ddhqq j21Q== X-Gm-Message-State: AOAM532ZAbrY0CRVws6Z+4w2XcK9/ghjBea23OjlzVb6Qc8Hf9OuI94T Cq+hNtAdELc+aegXjyXhuMsC X-Google-Smtp-Source: ABdhPJzgLx4UQgP6yyhdcInmJWMQ0HAUz7sgbFGB0lHVYb1i2OF/WDYChEOh9R+ur8iZII5VPn0UTw== X-Received: by 2002:a17:902:8bc2:b029:d0:cbe1:e709 with SMTP id r2-20020a1709028bc2b02900d0cbe1e709mr98104plo.23.1599552824822; Tue, 08 Sep 2020 01:13:44 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:44 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 02/12] target/arm/kvm: spe: Add helper to detect SPE when using KVM Date: Tue, 8 Sep 2020 08:13:20 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::442; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Richard Henderson Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- target/arm/kvm.c | 5 +++++ target/arm/kvm_arm.h | 13 +++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8bb7318378..58f991e890 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -214,6 +214,11 @@ bool kvm_arm_pmu_supported(void) return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3); } +bool kvm_arm_spe_supported(void) +{ + return kvm_check_extension(kvm_state, KVM_CAP_ARM_SPE_V1); +} + int kvm_arm_get_max_vm_ipa_size(MachineState *ms) { KVMState *s = KVM_STATE(ms->accelerator); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index adb38514bf..f79655674e 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -283,6 +283,14 @@ bool kvm_arm_aarch32_supported(void); */ bool kvm_arm_pmu_supported(void); +/** + * kvm_arm_spe_supported: + * + * Returns: true if the KVM VCPU can enable its SPE + * and false otherwise. + */ +bool kvm_arm_spe_supported(void); + /** * kvm_arm_sve_supported: * @@ -366,6 +374,11 @@ static inline bool kvm_arm_pmu_supported(void) return false; } +static inline bool kvm_arm_spe_supported(void) +{ + return false; +} + static inline bool kvm_arm_sve_supported(void) { return false; From patchwork Tue Sep 8 08:13:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762943 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 740881599 for ; Tue, 8 Sep 2020 08:16:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2789621D79 for ; Tue, 8 Sep 2020 08:16:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qbQZsJ6C" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2789621D79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:36220 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYnZ-0002kH-AJ for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:16:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58370) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlD-0005j5-PC for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: from mail-pg1-x542.google.com ([2607:f8b0:4864:20::542]:39099) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYl9-0000R2-Cd for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: by mail-pg1-x542.google.com with SMTP id v15so9508291pgh.6 for ; Tue, 08 Sep 2020 01:13:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sSfBFaYDNM91Wy+aR//OSZgCQwJ7nAz+b7+r07t012o=; b=qbQZsJ6CF8jpwRRRounCQp5bL88YG0Br0PMNnQ/UvzZgAQEQPAkdgp3MXCVMn7SZOB 7levT9Y6Qbb5tD2xMCJmr4nv9iNl6QhxxT4w0tWFjdb1Lfo7VxWowR+K9I707xX25TW6 bZFoN04bcRKuQ4sYFyFPbhc/d2YcnydUmQIdR74hv/nGVVJ7GqDJXkqR4LMBlf8g0R7t +jvvIl1ZEjq7W6Rk3MMdmwwKGvZ/nVG4qQkglGWbYmSiydsnBxE+YRnZPBqKjefLmR8e 5uFxj/esmZKg3XMSiooAZg3GkSXKZ2zdqz5Mu2oj4S9cqqW2UaATx7hWpIWUFLY8cVdD Kitw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sSfBFaYDNM91Wy+aR//OSZgCQwJ7nAz+b7+r07t012o=; b=aT7birlQOxTos1F/SqSckayU88Gpw5yYc7LQa5wJURo3bXr8p/HtPQAijevWJR+PdJ cxdaNb8A54xnb5iu0Xi5nkobokbYy8J+M7S15jb/Z9xNGzZNq6DHEEYSC4jY9Kl01n3u ZeiXF8s6n3cNdLp9/15nKdSY0+1WGffL/TUSvKbrEEI2wfF8CW9WC0h1J8dtRXbH3o6Z 5HA3gF/Nm08Hje/qSbTGgFmF6C+VZQIwixIPkFlwsjEz8zTEc6oGUF7fbYF4bNn2Q5tv /rVJ91lQPY2tN/KD2t5L30dfotD/DuT3DbMGiV5sA65FFBHi2zhaBb0p1QSZPXNh289I ht/g== X-Gm-Message-State: AOAM5328Y0NzsjaTfKrSSpzTx7VsXe6vGgYh8TSxJsqSsXnhynJyvAG4 TZbteidj6GMvl9DjTU5huSEql8nI//6gjTY= X-Google-Smtp-Source: ABdhPJwgBcKHQQjI2ii5UQWMZs6xY7efcdt52sP36Po66LfCEwUTD25oLYWilg0+5nJfmnKCUaq9ow== X-Received: by 2002:a62:7c82:0:b029:13c:1611:66b9 with SMTP id x124-20020a627c820000b029013c161166b9mr22028120pfc.4.1599552826033; Tue, 08 Sep 2020 01:13:46 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:45 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 03/12] target/arm/cpu: spe: Add an option to turn on/off vSPE support Date: Tue, 8 Sep 2020 08:13:21 +0000 Message-Id: <77b57f43d4fa6319cfa666d6c77e39ec76c44d88.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::542; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x542.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Adds a spe=[on/off] option to enable/disable vSPE support in guest vCPU. Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- target/arm/cpu.c | 6 ++++++ target/arm/cpu.h | 13 ++++++++++++ target/arm/cpu64.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 71 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c179e0752d..f211958eaa 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1310,6 +1310,12 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) error_propagate(errp, local_err); return; } + + arm_cpu_spe_finalize(cpu, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } } } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a1c7d8ebae..baf2bbcee8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -24,6 +24,7 @@ #include "hw/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qapi/qapi-types-common.h" /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) @@ -196,9 +197,11 @@ typedef struct { #ifdef TARGET_AARCH64 # define ARM_MAX_VQ 16 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); +void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp); #else # define ARM_MAX_VQ 1 static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { } +static inline void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp) { } #endif typedef struct ARMVectorReg { @@ -829,6 +832,8 @@ struct ARMCPU { bool has_el3; /* CPU has PMU (Performance Monitor Unit) */ bool has_pmu; + /* CPU has SPE (Statistical Profiling Extension) */ + OnOffAuto has_spe; /* CPU has VFP */ bool has_vfp; /* CPU has Neon */ @@ -3869,6 +3874,14 @@ static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id) FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf; } +/* + * Currently we don't differentiate between the ARMv8.2-SPE and ARMv8.3-SPE. + */ +static inline bool isar_feature_aa64_spe(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMSVER) != 0; +} + static inline bool isar_feature_aa64_rcpc_8_3(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, LRCPC) != 0; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 3c2b3d9599..4997c4a3c0 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -572,6 +572,55 @@ void aarch64_add_sve_properties(Object *obj) } } +void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp) +{ + uint64_t t; + uint32_t value = 0; + + if (cpu->has_spe == ON_OFF_AUTO_AUTO) { + if (kvm_enabled() && kvm_arm_spe_supported()) { + cpu->has_spe = ON_OFF_AUTO_ON; + } else { + cpu->has_spe = ON_OFF_AUTO_OFF; + } + } else if (cpu->has_spe == ON_OFF_AUTO_ON) { + if (!kvm_enabled() || !kvm_arm_spe_supported()) { + error_setg(errp, "'spe' cannot be enabled on this host"); + return; + } + } + + /* + * According to the ARM ARM, the ID_AA64DFR0[PMSVER] currently + * support 3 values: + * + * 0b0000: SPE not implemented + * 0b0001: ARMv8.2-SPE implemented + * 0b0010: ARMv8.3-SPE implemented + * + * But the kernel KVM API didn't expose all these 3 values, and + * we can only get whether the SPE feature is supported or not. + * So here we just set the PMSVER to 1 if this feature was supported. + */ + if (cpu->has_spe == ON_OFF_AUTO_ON) { + value = 1; + } + + t = cpu->isar.id_aa64dfr0; + t = FIELD_DP64(t, ID_AA64DFR0, PMSVER, value); + cpu->isar.id_aa64dfr0 = t; +} + +static bool arm_spe_get(Object *obj, Error **errp) +{ + return ARM_CPU(obj)->has_spe != ON_OFF_AUTO_OFF; +} + +static void arm_spe_set(Object *obj, bool value, Error **errp) +{ + ARM_CPU(obj)->has_spe = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; +} + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -721,6 +770,9 @@ static void aarch64_max_initfn(Object *obj) aarch64_add_sve_properties(obj); object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, cpu_max_set_sve_max_vq, NULL, NULL); + + cpu->has_spe = ON_OFF_AUTO_AUTO; + object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); } static const ARMCPUInfo aarch64_cpus[] = { From patchwork Tue Sep 8 08:13:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762965 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6737F1599 for ; Tue, 8 Sep 2020 08:19:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 11D832177B for ; Tue, 8 Sep 2020 08:19:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Vocityjn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 11D832177B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:50348 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYqh-0008QW-1X for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:19:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58336) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlC-0005fH-Ca for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:50 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:33702) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlA-0000RN-ID for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:49 -0400 Received: by mail-pf1-x42f.google.com with SMTP id c196so4851145pfc.0 for ; Tue, 08 Sep 2020 01:13:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vE/7atJFFNMf4U1vrclSfvdzLU1YHOKY7LV5LqTlxi8=; b=VocityjnqEGnIw5Y2AYa4Mi3SdhHy79dxnKzkUvZOM3vl7gT5anhbUd7cycj60/iE0 6f2hlHJShVjmzBv+n3TXzmCqSVFvW8Ws85vsg7NF7wBIAFsScW6WmZDXxG5++h6jeYD5 PVvv10jusCN39YEBm2w9NRUyB0d4FhFxwCn0249CoBRNN5+Iy3Xr3VcDA8mAg8MFzUfs Ofn1W4F1TvYngP2zQAAATdHYm9gTw4hEkAG6GFoGyOu+Y5+9q89WKfbjf8ugQzNYzuOQ ZPBLcvk9KeVMxZaykqJ+/0DEMNhKE0BRwGaQrXmTDCHwIsR14gRiHf6GfOA/wLQJtaVj T8hQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vE/7atJFFNMf4U1vrclSfvdzLU1YHOKY7LV5LqTlxi8=; b=FjOhrKZRfGtFCjL5A+h23rsm4C7hQV356JPDSrOqfnrNUINnsAfsObBfmRjhX8XGio cdhIXq+OZykVGn+C3N3YdhN6OH1i3ZrCOuDx8n6gbrGIjSdPUEY93No0vDTlAAPuHqP3 0uyNxk4itEqdLTySIZBEhdsdjPaqw/vrccCqhsPuriJ3xRdPgUCEftKTnIRJ/auD6Rdm 5FxDU/+9rYwpB2OiVkHvLoeGskHTMC9iOlm5pmWRLIFTvrM0fc5xAHmUKuk2iOfzHdEe GkNVrFFXy/KdiErXP9qQ/FF6NojfJXnqkhczBfyYdn6EOf6f+9d+AtqDOFNCE0FpSkn9 ks0g== X-Gm-Message-State: AOAM532P330fp6Qqd89o3i1t3s3TbE8fTA2G8ltv7RuQjQcEmzichYgY j17r0VzY/mScHxKynzTo1xXh X-Google-Smtp-Source: ABdhPJyujUzTLCCFFkWhLzFL3oeEftWrE4zVsyuKPzKyCRWRHXbBzdYjiEE+8PJErQmX4iiov0dhzw== X-Received: by 2002:a63:d409:: with SMTP id a9mr18751991pgh.312.1599552827222; Tue, 08 Sep 2020 01:13:47 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:46 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 04/12] target/arm: spe: Only enable SPE from 5.2 compat machines. Date: Tue, 8 Sep 2020 08:13:22 +0000 Message-Id: <7ed8b1ff7a61132c6520f87213c61784ab0c331b.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x42f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- hw/arm/virt.c | 7 +++++++ include/hw/arm/virt.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index acf9bfbece..3f6d26c531 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1830,6 +1830,10 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, "pmu", false, NULL); } + if (vmc->no_spe && object_property_find(cpuobj, "spe", NULL)) { + object_property_set_bool(cpuobj, "spe", false, NULL); + } + if (object_property_find(cpuobj, "reset-cbar", NULL)) { object_property_set_int(cpuobj, "reset-cbar", vms->memmap[VIRT_CPUPERIPHS].base, @@ -2553,8 +2557,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(5, 2) static void virt_machine_5_1_options(MachineClass *mc) { + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_5_2_options(mc); compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); + vmc->no_spe = true; } DEFINE_VIRT_MACHINE(5, 1) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dff67e1bef..72c269aaa5 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -126,6 +126,7 @@ typedef struct { bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ bool kvm_no_adjvtime; bool acpi_expose_flash; + bool no_spe; } VirtMachineClass; typedef struct { From patchwork Tue Sep 8 08:13:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762921 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0872F1599 for ; Tue, 8 Sep 2020 08:14:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B663F21D20 for ; Tue, 8 Sep 2020 08:14:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="lsduiPeW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B663F21D20 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:56110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYly-0007mt-SC for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:14:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58364) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlD-0005in-LG for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:42765) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlB-0000Ri-OE for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: by mail-pg1-x543.google.com with SMTP id m5so9504319pgj.9 for ; Tue, 08 Sep 2020 01:13:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bjXqJB5fZDovb5keozBFqhrjyKCJ3LE/1kjYNOFtg8s=; b=lsduiPeW2KAAqBLIvyI/8FZJf9DdqV11oODQYW+mHmktQWlrq8JKQhBNqHOYftlV8h kXnXOB4iC+DAgzeakNlWC4mNsxowb3AjsLhw7SoVQJLykH3p+XSU1EE7DnAEgZ2v2p1X ekkD+zYHj1MiH5pEojjHtb4uT+E64xMw7Ntu4A3PH9GBAkrFbIVm4tKz7m5UUO2PU5af P/1yJq0WITCZQ9wSs2lqC0gSjozPi7bDCHT49gJPophxYlo9LQdEcLLQDrA73F7HYFkH bxh7JFNVg+Xim7DSmlptXBxIEGjWo8q70Ds6gbW0/vxky7gsUI7f5Uzralry/LBmvac0 hyMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bjXqJB5fZDovb5keozBFqhrjyKCJ3LE/1kjYNOFtg8s=; b=O4KMVVhQbrYzhZLDzsDEpgWq7qp0dG8d2SJ4W6S/qLomjMuyWSOuB8sXm+LyLRkg1f gH0l+nOdQiPPx1KZO3/dxwzmSbmX9DfnCZ/tzcy/0JMpIqaoUsrFtR8IcMdFtvP4qmMU NPeCYqkaM3LCt/2C/aFWSGM1SZIxU2NPULTA6rbNFtDxOATujirnNWDjNSGeAWTt5yZq 5JdnQrb2EFbxNHO+DA6kP/CbXIIP4Ty01wUHBgV5kcTGtFsTWYtjABgFqnNHcxNQepIe 5N6R9IOBZ6x5BpfsE4VIS4jzdDBR1CdfKkDWRV4u9mJHxjzxad7sCNeDuoSgkJc4U0Wn MiAg== X-Gm-Message-State: AOAM530OO+DArrX5Y4rNzYYJ1YXM+Rs+pFGzyXEhJXHd7SigcB2Ij33Z ZvHi68X1hAXmm+tqYDkcQZWC X-Google-Smtp-Source: ABdhPJylmtrJl17mr9kZtPXSvMv1JK628xdtlWEQ3D0RT9vLOo5U+gL+MQC9+74EXMsdmc2cdyoHRw== X-Received: by 2002:a17:902:465:b029:d0:89f1:9e2a with SMTP id 92-20020a1709020465b02900d089f19e2amr21643144ple.6.1599552828430; Tue, 08 Sep 2020 01:13:48 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:48 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 05/12] target/arm/kvm: spe: Unify device attr operation helper Date: Tue, 8 Sep 2020 08:13:23 +0000 Message-Id: <45eecae26272efc7a09837573cd5278296b58dc5.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::543; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x543.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones Rename kvm_arm_pmu_set_attr() to kvm_arm_set_device_attr(), So both the vPMU and vSPE device can share the same API. Signed-off-by: Andrew Jones --- target/arm/kvm64.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index ef1e960285..8ffd31ffdf 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -397,19 +397,20 @@ static CPUWatchpoint *find_hw_watchpoint(CPUState *cpu, target_ulong addr) return NULL; } -static bool kvm_arm_pmu_set_attr(CPUState *cs, struct kvm_device_attr *attr) +static bool kvm_arm_set_device_attr(CPUState *cs, struct kvm_device_attr *attr, + const char *name) { int err; err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); if (err != 0) { - error_report("PMU: KVM_HAS_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_HAS_DEVICE_ATTR: %s", name, strerror(-err)); return false; } err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); if (err != 0) { - error_report("PMU: KVM_SET_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_SET_DEVICE_ATTR: %s", name, strerror(-err)); return false; } @@ -426,7 +427,7 @@ void kvm_arm_pmu_init(CPUState *cs) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to init PMU"); abort(); } @@ -443,7 +444,7 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to set irq for PMU"); abort(); } From patchwork Tue Sep 8 08:13:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762971 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 035DF59D for ; Tue, 8 Sep 2020 08:21:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A33C921D43 for ; Tue, 8 Sep 2020 08:21:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="REY5uAR9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A33C921D43 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55568 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYsK-0002AL-Lo for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:21:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58452) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlG-0005rD-Qh for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:54 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:34541) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlC-0000Rv-Uj for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:54 -0400 Received: by mail-pg1-x543.google.com with SMTP id u13so9527138pgh.1 for ; Tue, 08 Sep 2020 01:13:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=98oDa/Uw9z4PZMJfsm+7ai4FPAo11Fc74PaW20mvgsM=; b=REY5uAR9QcojLRSeaMMTjQAq3wWkP1nzt2xYQ9OoeId8mhgsu9+1uWqC38A1ukXotf LPY6pBz8BTALYF6Ne+w2Ul5APsrEgvbJtoAqdsngoUXcJD69AqZAuPh6vUoRbQdA2SZ0 dmSpnjKr2VUMYnIWuocrnKZ4wTBFcKRmwxUmLUVpWGBmK7viCpy6+8GxzkIiniN55jgX 3reISj+UIOjZY2a7Sfmqil6VEC4Q0nFuYnT9o6IV4APvCwS1JyoejxavKRpMYpMolJsC WAWTr4S6+b2u0lcsGXI+qyPAgQBrdUIVHmevzg+XpmQQbwwkexxpRq4SVvFLk9TbnEZt lfdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=98oDa/Uw9z4PZMJfsm+7ai4FPAo11Fc74PaW20mvgsM=; b=g2BZLcRNl+VCTFNnwCWDoGNE7Khd7i2pyZ2OriDsVFm+hOAPlvZumbhpZSDMn3utOs ZEt7+dUR4F7i04KanX2vmzf5ook3GIKsS7BH8+QPf1DHy1vdecAH3sXMaP3hwPAHQijQ yMVa1LUs8F4W2H/QnJUVO7A1VMDmMo83pcvCEP+N0z68cK1GcQdc0017jkjxd1EJCzLb Xk4Zx5XZodSnfxugIQtoxTPBN4dVMhpFI/rMRZf71t4532HrJLZ9XwN/1yGagLDazgWt dMfwXJwbDa2edEcIgBYsJsMMBBrVUjeVpNB9kHT7rpLdQLRA+vTYwR5IneyJ/qnquxMk le0g== X-Gm-Message-State: AOAM530C3/ZQSaRep7XSo97CiNrsYaInDC+rbQyL74xvT6JDL/vUX71P Fxui2/yilPBTuXw4pKOyUPGO X-Google-Smtp-Source: ABdhPJwFUcM00TFMgzKF9XFRr0/TEL8rNhelWlrT6nu0GjzJjuP/7r8AhM0kZG6g4qBI+Wjz3Yy+NA== X-Received: by 2002:a62:6dc3:0:b029:13c:1611:658d with SMTP id i186-20020a626dc30000b029013c1611658dmr21590723pfc.10.1599552829633; Tue, 08 Sep 2020 01:13:49 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:49 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 06/12] target/arm/kvm: spe: Add device init and set_irq operations Date: Tue, 8 Sep 2020 08:13:24 +0000 Message-Id: <7bc684ec37de06827c68c409d5f02da7381734e5.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::543; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x543.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- target/arm/kvm64.c | 33 +++++++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 5 +++++ 2 files changed, 38 insertions(+) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 8ffd31ffdf..5a2032fc9e 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -450,6 +450,39 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) } } +void kvm_arm_spe_init(CPUState *cs) +{ + struct kvm_device_attr attr = { + .group = KVM_ARM_VCPU_SPE_V1_CTRL, + .attr = KVM_ARM_VCPU_SPE_V1_INIT, + }; + + if (!ARM_CPU(cs)->has_spe) { + return; + } + if (!kvm_arm_set_device_attr(cs, &attr, "SPE")) { + error_report("failed to init SPE"); + abort(); + } +} + +void kvm_arm_spe_set_irq(CPUState *cs, int irq) +{ + struct kvm_device_attr attr = { + .group = KVM_ARM_VCPU_SPE_V1_CTRL, + .addr = (intptr_t)&irq, + .attr = KVM_ARM_VCPU_SPE_V1_IRQ, + }; + + if (!ARM_CPU(cs)->has_spe) { + return; + } + if (!kvm_arm_set_device_attr(cs, &attr, "SPE")) { + error_report("failed to set irq for SPE"); + abort(); + } +} + static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) { uint64_t ret; diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index f79655674e..bb155322eb 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -348,6 +348,8 @@ int kvm_arm_vgic_probe(void); void kvm_arm_pmu_set_irq(CPUState *cs, int irq); void kvm_arm_pmu_init(CPUState *cs); +void kvm_arm_spe_set_irq(CPUState *cs, int irq); +void kvm_arm_spe_init(CPUState *cs); int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); #else @@ -397,6 +399,9 @@ static inline int kvm_arm_vgic_probe(void) static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {} static inline void kvm_arm_pmu_init(CPUState *cs) {} +static inline void kvm_arm_spe_set_irq(CPUState *cs, int irq) {} +static inline void kvm_arm_spe_init(CPUState *cs) {} + static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) {} static inline void kvm_arm_get_virtual_time(CPUState *cs) {} From patchwork Tue Sep 8 08:13:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762923 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D09631599 for ; Tue, 8 Sep 2020 08:14:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8FCF821D79 for ; Tue, 8 Sep 2020 08:14:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UN562Vwk" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8FCF821D79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57144 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYmA-0008Bz-IH for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:14:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlG-0005pe-9V for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:54 -0400 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:33471) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlE-0000SG-8i for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:53 -0400 Received: by mail-pf1-x441.google.com with SMTP id c196so4851282pfc.0 for ; Tue, 08 Sep 2020 01:13:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hvtYY966srnK5wG0YbtFj+vFvT8ZWyaFHw3B2vowdgs=; b=UN562VwkN4m/so7koho/gMRFletaKtsYpQDYr/Qs5O5VIF+hkVHSdTs9F48prIClND sqf8/ep/mt/JXaDfjzVN2Ma2/VLYxpuVKA/MM9poc3mBXgA0PE4vLIMAXp16L38J8Yjm bsfe8kXLAF0W3fgXrZ/lDYrJbdDWmskVc995fL1Lkp21hXLXAbVzKPp7al8HN201fUCT GiXZ2s6oU0ba+3OaKthBjfzJcvk2viX2FPGJ6V2MAnqBdhyS2s98ypgsFjm/4XXYCGly FChbXpw0rcdZwIoAFAliYoCjht4A8P9cOrcyJAJh+b7sFwqR+dsQJAd2MkVjyGVJJp7v IWkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hvtYY966srnK5wG0YbtFj+vFvT8ZWyaFHw3B2vowdgs=; b=jKVzaYdP6w0H6aoTEhpZTOuFiBzlNRsruL86qaFG4y1ravViAlNJPknd+umIihSIS5 VpUAKVXANB5ZlakrMjQXuYzfBJLWpkQQkBJfgxNFaXqdAmcXzd1IDagi9Pd5EbHfpx6h Ei3pdzqgI9SeodTSt/Xs8LQYbWP9Le8kPaAlZNkVI2ivAxq5+XJFbgZ5Uq77s2HgPeGR 4uO/3sgfIJPTcqohlYgAkUjnx2Uvx4+aI9xGnwXwe16xnXcNk1mH1zbRlUNw8Mjpilrj RNXF/gJqrx0LsTGM8ad/7zm1tu5G9tBxzE2AvLXfu6h3K6hQkXdxA/kpbf4oDFZ6PpTG Y04g== X-Gm-Message-State: AOAM531bmpx7cEXTdhL3U/LcjKPv8fQqRCjb1eCU3WwR/g58ptbakuvS GMe+SgR2k9FUhvR35SLbOLhf X-Google-Smtp-Source: ABdhPJxbsgXZZiwoTefUXQdHTKj8phvrN1Ubbof8tVKxLrFxcD/OPaYnXfeZ0UPVWrTXOM5X6ioB7Q== X-Received: by 2002:a63:3841:: with SMTP id h1mr18425109pgn.38.1599552830846; Tue, 08 Sep 2020 01:13:50 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:50 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 07/12] hw/arm/virt: Move post cpu realize check into its own function Date: Tue, 8 Sep 2020 08:13:25 +0000 Message-Id: <04a3f2e202d9e84cefa431101eaf4c7e0cbd1a0d.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::441; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Signed-off-by: Andrew Jones --- hw/arm/virt.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3f6d26c531..2ffcb073af 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1672,6 +1672,26 @@ static void finalize_gic_version(VirtMachineState *vms) } } +static void virt_cpu_post_init(VirtMachineState *vms) +{ + bool aarch64; + + aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); + + if (!kvm_enabled()) { + if (aarch64 && vms->highmem) { + int requested_pa_size = 64 - clz64(vms->highest_gpa); + int pamax = arm_pamax(ARM_CPU(first_cpu)); + + if (pamax < requested_pa_size) { + error_report("VCPU supports less PA bits (%d) than requested " + "by the memory map (%d)", pamax, requested_pa_size); + exit(1); + } + } + } +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms = VIRT_MACHINE(machine); @@ -1890,22 +1910,6 @@ static void machvirt_init(MachineState *machine) fdt_add_timer_nodes(vms); fdt_add_cpu_nodes(vms); - if (!kvm_enabled()) { - ARMCPU *cpu = ARM_CPU(first_cpu); - bool aarch64 = object_property_get_bool(OBJECT(cpu), "aarch64", NULL); - - if (aarch64 && vms->highmem) { - int requested_pa_size, pamax = arm_pamax(cpu); - - requested_pa_size = 64 - clz64(vms->highest_gpa); - if (pamax < requested_pa_size) { - error_report("VCPU supports less PA bits (%d) than requested " - "by the memory map (%d)", pamax, requested_pa_size); - exit(1); - } - } - } - memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, machine->ram); if (machine->device_memory) { @@ -1917,6 +1921,8 @@ static void machvirt_init(MachineState *machine) create_gic(vms); + virt_cpu_post_init(vms); + fdt_add_pmu_nodes(vms); create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); From patchwork Tue Sep 8 08:13:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762955 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B4C7759D for ; Tue, 8 Sep 2020 08:17:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6305A2177B for ; Tue, 8 Sep 2020 08:17:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ap1msIb8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6305A2177B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42684 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYou-0005Lq-H1 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:17:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58546) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlK-00060P-7G for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:58 -0400 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:40726) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlF-0000Se-MB for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: by mail-pj1-x1042.google.com with SMTP id gf14so7629647pjb.5 for ; Tue, 08 Sep 2020 01:13:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VVgURpjuArAMDrEKjpU9KwbLTs4HVxWM7QaG/94weX8=; b=ap1msIb8TT2AJK0n67LMP9CkJ7Zh9jrn8OzxQoi5+AiPMPuPFTpEPp8vw0o+zZ6fOo c9pp2gy4B4HBO0o9+/rSFx0gqKjFFVPCKZZPQ9ElNy+p3xGtYAR82dVJV2N+GLPoiKAI sSio2R1rAAjQbaEtg0Rp5NNL9fs6DZin2UR9Jwe5Xo0jUmfmAnlDUoGoiHSI8aYGe5YX vHUOybrqLMCVCbTX1SkyY70YpWtyWdHogAtVUovjepeP4c6GTBLGLzZscs/FiaZuMisF E+2wFWR20cp2fZqt07vDp8q7D1ibeb+Hm0HA4Tg7wsF2Fmcw3hnKuQ5fxXfrej7NN35J Me6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VVgURpjuArAMDrEKjpU9KwbLTs4HVxWM7QaG/94weX8=; b=rj++G4VWeiMBN14feIyjbvlQm1JWIH9HFROSX63nrLMA27flzSwd/AEPUTnIWmQ8p5 RhKjzzIgADCIeb3C9jJOS9X75hJSAQBsYgo4rUZ01cv1lbAKK0hYJwZQqnJ4ROmFclj/ j3ypcMrVcBMvpdtDKirKp+g9WHCEvfN12dwSvy8pEW/8dnVge0hClIPDKErEJqc/fcRg 4NlZkws+vGKLK4vla2kvghmrYdJmHdLwXowqfaIU6dOdZ0Ka0NL87WF7dZPwaivRsA/j b80Lspngd9O4Q4kTGONoLX0LRo1bkY7tGbkWEplqWZgn5+MQ/gn6k5ArajABSFsEX7oP 8z8Q== X-Gm-Message-State: AOAM531UrET9hELArRiJuFm7avY0sUB7zDV1cHMtWfaU7wc2q/PYoW3+ ueP1WC2pBBqtXSe9z7CP23dw X-Google-Smtp-Source: ABdhPJwmdzKaizukC5GULCv5mYoAJxk/GSr/XtcZD3W/bMDqx6+S5/4A/5yx747umDvAmKxDaiEVjg== X-Received: by 2002:a17:90a:634c:: with SMTP id v12mr2904904pjs.57.1599552832108; Tue, 08 Sep 2020 01:13:52 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:51 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 08/12] hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init Date: Tue, 8 Sep 2020 08:13:26 +0000 Message-Id: <7982854bb6cdb90390ea3f3c39c2801ef84fd2e5.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Signed-off-by: Andrew Jones --- hw/arm/virt.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2ffcb073af..6bacfb668d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -521,21 +521,12 @@ static void fdt_add_gic_node(VirtMachineState *vms) static void fdt_add_pmu_nodes(const VirtMachineState *vms) { - CPUState *cpu; - ARMCPU *armcpu; + ARMCPU *armcpu = ARM_CPU(first_cpu); uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; - CPU_FOREACH(cpu) { - armcpu = ARM_CPU(cpu); - if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { - return; - } - if (kvm_enabled()) { - if (kvm_irqchip_in_kernel()) { - kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); - } - kvm_arm_pmu_init(cpu); - } + if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { + assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); + return; } if (vms->gic_version == VIRT_GIC_VERSION_2) { @@ -544,7 +535,6 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) (1 << vms->smp_cpus) - 1); } - armcpu = ARM_CPU(qemu_get_cpu(0)); qemu_fdt_add_subnode(vms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] = "arm,armv8-pmuv3"; @@ -1674,11 +1664,23 @@ static void finalize_gic_version(VirtMachineState *vms) static void virt_cpu_post_init(VirtMachineState *vms) { - bool aarch64; + bool aarch64, pmu; + CPUState *cpu; aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); + pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); - if (!kvm_enabled()) { + if (kvm_enabled()) { + CPU_FOREACH(cpu) { + if (pmu) { + assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU)); + if (kvm_irqchip_in_kernel()) { + kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); + } + kvm_arm_pmu_init(cpu); + } + } + } else { if (aarch64 && vms->highmem) { int requested_pa_size = 64 - clz64(vms->highest_gpa); int pamax = arm_pamax(ARM_CPU(first_cpu)); From patchwork Tue Sep 8 08:13:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762925 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8C8E859D for ; Tue, 8 Sep 2020 08:15:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5569C21D20 for ; Tue, 8 Sep 2020 08:15:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wjld9RWo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5569C21D20 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57748 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYmJ-0008Qb-OC for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:15:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlJ-0005yj-JD for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:34542) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlG-0000Tt-OW for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: by mail-pg1-x543.google.com with SMTP id u13so9527246pgh.1 for ; Tue, 08 Sep 2020 01:13:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BoRDf3bit7IL/G7WkzeTS4vBLLuVcOFhR6tLcvMtZHA=; b=wjld9RWo4af1VFX2xsSyA2pu597Rv7UPczc7pXqJP1YoC25m05WD2mWsttmVYSQDuM aHI/FjnaG4A5QA+dyg3ivNElGQQUDmtldoqwbCiud5xouSJjwnnok7VCYgY/bEyX1EDh btWEN6e+mbqck8YusQLl2lxITBUeZlpP1JJnGI/hu888CsLK1dUzIgawISyFWOqd/8Hx PsRFkmloPT90mXEonAhXoNMRG1U3ta2JuQKIU45VeC3QKHKKe5wxw6QefF+xZZzsT5Rw KX6eyKN8KsJSxVGbJ31w4PdHjtLOKhB8gnlh8isvEZrFW1nuHRGSAIoGnN6tZ7Z0X4sl 8yXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BoRDf3bit7IL/G7WkzeTS4vBLLuVcOFhR6tLcvMtZHA=; b=FIbx0xZDsjyKwssu8rS2dtxqsgmgg03KH6lhW7l/pRekcOMrc+hy5oOcS/G13A6yjV e1k2Mmcw0rzqY6Ikptc6nLg3i41ZR9UceT//gIIySRM3Gp/tL0yGdTNiaQ7KtQF51yJd K6CbS1t5BBEuSoAmxNGf+fhSLSr0Duq28pApzkgHaUw69Jq5OlZvlHZuEc+3J2e3f6Vp /cduZi1AHRwy51cOLniRBH4TOIN/ffUKTOecgIurxcoEThbziNBGeAgOS2eqV857Y9PT OdebPUjLJO3728gKHVBZNp5br3Lfz0ppbahQSwlN+DFp6bgCCh++pTSfh+i2PBqhJ8X5 8uPQ== X-Gm-Message-State: AOAM530SDVaz4N7jkynb9wuK4SSSYhbode71mLrvSkilfud8JKu9osFJ +AfqP0ntR3Cdg7gVt6zkqZi4 X-Google-Smtp-Source: ABdhPJy4ftVz9yl3t+PAzjmIZS1tY41dc5pMS4sAhQ4rLM5t5Q/UsK27Jnc2RG/ycXY68lj1iCT5tw== X-Received: by 2002:a17:902:848a:: with SMTP id c10mr22261749plo.8.1599552833547; Tue, 08 Sep 2020 01:13:53 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:53 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 09/12] hw/arm/virt: spe: Add SPE fdt binding for virt machine Date: Tue, 8 Sep 2020 08:13:27 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::543; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x543.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Add a virtual SPE device for virt machine while using PPI 5 for SPE overflow interrupt number which has already selected in kvmtool. Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- hw/arm/virt-acpi-build.c | 3 +++ hw/arm/virt.c | 43 ++++++++++++++++++++++++++++++++++++- include/hw/acpi/acpi-defs.h | 3 +++ include/hw/arm/virt.h | 1 + target/arm/cpu.c | 2 ++ target/arm/cpu.h | 2 ++ 6 files changed, 53 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9efd7a3881..3fd80fda53 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -665,6 +665,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ)); } + if (cpu_isar_feature(aa64_spe, armcpu)) { + gicc->spe_interrupt = cpu_to_le32(PPI(VIRTUAL_SPE_IRQ)); + } if (vms->virt) { gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GIC_MAINT_IRQ)); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 6bacfb668d..bdb1ce925c 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -545,6 +545,32 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) } } +static void fdt_add_spe_nodes(const VirtMachineState *vms) +{ + ARMCPU *armcpu = ARM_CPU(first_cpu); + uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; + + if (!cpu_isar_feature(aa64_spe, armcpu)) { + assert(!object_property_get_bool(OBJECT(armcpu), "spe", NULL)); + return; + } + + if (vms->gic_version == VIRT_GIC_VERSION_2) { + irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, + GIC_FDT_IRQ_PPI_CPU_WIDTH, + (1 << vms->smp_cpus) - 1); + } + + qemu_fdt_add_subnode(vms->fdt, "/spe"); + if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { + const char compat[] = "arm,statistical-profiling-extension-v1"; + qemu_fdt_setprop(vms->fdt, "/spe", "compatible", + compat, sizeof(compat)); + qemu_fdt_setprop_cells(vms->fdt, "/spe", "interrupts", + GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_SPE_IRQ, irqflags); + } +} + static inline DeviceState *create_acpi_ged(VirtMachineState *vms) { DeviceState *dev; @@ -717,6 +743,10 @@ static void create_gic(VirtMachineState *vms) qdev_get_gpio_in(vms->gic, ppibase + VIRTUAL_PMU_IRQ)); + qdev_connect_gpio_out_named(cpudev, "spe-interrupt", 0, + qdev_get_gpio_in(vms->gic, ppibase + + VIRTUAL_SPE_IRQ)); + sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); sysbus_connect_irq(gicbusdev, i + smp_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); @@ -1664,11 +1694,12 @@ static void finalize_gic_version(VirtMachineState *vms) static void virt_cpu_post_init(VirtMachineState *vms) { - bool aarch64, pmu; + bool aarch64, pmu, spe; CPUState *cpu; aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); + spe = object_property_get_bool(OBJECT(first_cpu), "spe", NULL); if (kvm_enabled()) { CPU_FOREACH(cpu) { @@ -1679,6 +1710,14 @@ static void virt_cpu_post_init(VirtMachineState *vms) } kvm_arm_pmu_init(cpu); } + + if (spe) { + assert(ARM_CPU(cpu)->has_spe == ON_OFF_AUTO_ON); + if (kvm_irqchip_in_kernel()) { + kvm_arm_spe_set_irq(cpu, PPI(VIRTUAL_SPE_IRQ)); + } + kvm_arm_spe_init(cpu); + } } } else { if (aarch64 && vms->highmem) { @@ -1927,6 +1966,8 @@ static void machvirt_init(MachineState *machine) fdt_add_pmu_nodes(vms); + fdt_add_spe_nodes(vms); + create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); if (vms->secure) { diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index 38a42f409a..21e58f27c5 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -302,6 +302,9 @@ struct AcpiMadtGenericCpuInterface { uint32_t vgic_interrupt; uint64_t gicr_base_address; uint64_t arm_mpidr; + uint8_t efficiency_class; + uint8_t reserved2[1]; + uint16_t spe_interrupt; /* ACPI 6.3 */ } QEMU_PACKED; typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface; diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 72c269aaa5..6013b6d535 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -49,6 +49,7 @@ #define ARCH_TIMER_NS_EL1_IRQ 14 #define ARCH_TIMER_NS_EL2_IRQ 10 +#define VIRTUAL_SPE_IRQ 5 #define VIRTUAL_PMU_IRQ 7 #define PPI(irq) ((irq) + 16) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f211958eaa..786cc6134c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1041,6 +1041,8 @@ static void arm_cpu_initfn(Object *obj) "gicv3-maintenance-interrupt", 1); qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt, "pmu-interrupt", 1); + qdev_init_gpio_out_named(DEVICE(cpu), &cpu->spe_interrupt, + "spe-interrupt", 1); #endif /* DTB consumers generally don't in fact care what the 'compatible' diff --git a/target/arm/cpu.h b/target/arm/cpu.h index baf2bbcee8..395a1e5df8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -800,6 +800,8 @@ struct ARMCPU { qemu_irq gicv3_maintenance_interrupt; /* GPIO output for the PMU interrupt */ qemu_irq pmu_interrupt; + /* GPIO output for the SPE interrupt */ + qemu_irq spe_interrupt; /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory; From patchwork Tue Sep 8 08:13:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762949 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B4CE59D for ; Tue, 8 Sep 2020 08:16:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E5F0721D7D for ; Tue, 8 Sep 2020 08:16:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="tygBGNMB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E5F0721D7D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:37500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYnn-0003Gn-4M for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:16:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58536) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlJ-0005zd-T4 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]:38543) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlH-0000US-W2 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: by mail-pj1-x1043.google.com with SMTP id u3so4406317pjr.3 for ; Tue, 08 Sep 2020 01:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RpQ5D9PS9xG+hTVvcmsid1OIpZVPjd/FQJ67FPFmIxg=; b=tygBGNMByyJ4nCb/OLcN5vsYChUumDca0o1GOgCzknvCENCS2CHn/UCzjQJDYXME+p My4hkNbt+tgQJNzqclI3OmZqcHYHm1lGwfDR1ijhUd6NHm/lH2gHJ/gIqnzYrzbmo5xU L9gen8VsMmMmyDQ6PbBJwiComDmcLyfukkBzBdgbQ7jn+OJghm8PNksjiTzkDiYoNQeV dDLVNHW2p6UABTPPUc2JkFPbtAtTE9FMh4SNVZ4REbaY32xTIXM26sTtMIuy5eJ3ZdVS D3t8cnpmQQXMe2kmy/KkRZIisZ60J+WoNoJIkiH+ZHNSquj2nnd0iucrFCqc1GulvhBx deXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RpQ5D9PS9xG+hTVvcmsid1OIpZVPjd/FQJ67FPFmIxg=; b=CFk+bSfSO7AumJrTFVuiyJSizY9MYaVTnGiU0SD0bchlBS9vNSracLBYIWLwSLE5lM eTAwYDpDoC8V6k7gtHstDbGdQfdBEbIp4M0VirIjB5n75OLsXYsdBB5FuZeuKOE7VjLW KelmQ7ZipCUEAmkvIhpFLBXNcs9cOv1OAnoRukjMxf1QIZOvC9+ExEePjB67rUAyh41g kzryphDPt17y/c5bLYhwo+9TkOBSxYIi+YImnOmXHkeBRLA39K7gP7IUjRVhb9NetNcu lJXbJy6XQ+f+AgqaaJTThStZaYFffmR5DF+ppD330mgeA0jl7OzCk8Z3B4tu+jPGa7ML TyxQ== X-Gm-Message-State: AOAM532RTBUt0uEeSbq5xQb4DGLwGqEvxKVFUuS5GQKH1yUul0YdOfet oqcGvhZbR+fPUW6YH6NZHfVX X-Google-Smtp-Source: ABdhPJz45Ifo6Q1lY3+IlGTfYu+R5+x3g441RPNHPknBpdQWiTFOq8F4vr6PdvlfRcKO/ssP0yZbOA== X-Received: by 2002:a17:90a:fb52:: with SMTP id iq18mr2977782pjb.162.1599552834732; Tue, 08 Sep 2020 01:13:54 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:54 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 10/12] target/arm/cpu: spe: Enable spe to work with host cpu Date: Tue, 8 Sep 2020 08:13:28 +0000 Message-Id: <26b4ace9ea3c5b43d14802d6fc5ceea90befbcc8.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1043; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1043.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Turn on the spe cpu property by default if host cpu support it, i.e. we can now do '-cpu max|host' to add the vSPE, and '-cpu max|host,spe=off' to remove it. Signed-off-by: Haibo Xu --- target/arm/cpu.c | 3 +++ target/arm/cpu.h | 2 ++ target/arm/cpu64.c | 7 ++++++- target/arm/kvm64.c | 12 ++++++++++++ 4 files changed, 23 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 786cc6134c..58f12d6eb5 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2271,6 +2271,9 @@ static void arm_host_initfn(Object *obj) kvm_arm_set_cpu_features_from_host(cpu); if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); + + cpu->has_spe = ON_OFF_AUTO_AUTO; + aarch64_add_spe_properties(obj); } arm_cpu_post_init(obj); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 395a1e5df8..5a3ea876c8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1040,6 +1040,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); void aarch64_add_sve_properties(Object *obj); +void aarch64_add_spe_properties(Object *obj); /* * SVE registers are encoded in KVM's memory in an endianness-invariant format. @@ -1071,6 +1072,7 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, int n, bool a) { } static inline void aarch64_add_sve_properties(Object *obj) { } +static inline void aarch64_add_spe_properties(Object *obj) { } #endif #if !defined(CONFIG_TCG) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 4997c4a3c0..d38c55e2ca 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -621,6 +621,11 @@ static void arm_spe_set(Object *obj, bool value, Error **errp) ARM_CPU(obj)->has_spe = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } +void aarch64_add_spe_properties(Object *obj) +{ + object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); +} + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -772,7 +777,7 @@ static void aarch64_max_initfn(Object *obj) cpu_max_set_sve_max_vq, NULL, NULL); cpu->has_spe = ON_OFF_AUTO_AUTO; - object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); + aarch64_add_spe_properties(obj); } static const ARMCPUInfo aarch64_cpus[] = { diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 5a2032fc9e..3f0a09c05b 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -515,6 +515,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) */ int fdarray[3]; bool sve_supported; + bool spe_supported; uint64_t features = 0; uint64_t t; int err; @@ -655,6 +656,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) } sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0; + spe_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, + KVM_CAP_ARM_SPE_V1) > 0; kvm_arm_destroy_scratch_host_vcpu(fdarray); @@ -668,6 +671,11 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1); ahcf->isar.id_aa64pfr0 = t; } + if (!spe_supported) { + t = ahcf->isar.id_aa64dfr0; + t = FIELD_DP64(t, ID_AA64DFR0, PMSVER, 0); + ahcf->isar.id_aa64dfr0 = t; + } /* * We can assume any KVM supporting CPU is at least a v8 @@ -830,6 +838,10 @@ int kvm_arch_init_vcpu(CPUState *cs) assert(kvm_arm_sve_supported()); cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE; } + if (cpu_isar_feature(aa64_spe, cpu)) { + assert(kvm_arm_spe_supported()); + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SPE_V1; + } /* Do KVM_ARM_VCPU_INIT ioctl */ ret = kvm_arm_vcpu_init(cs); From patchwork Tue Sep 8 08:13:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762963 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC37359D for ; Tue, 8 Sep 2020 08:19:05 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 844BA21D43 for ; Tue, 8 Sep 2020 08:19:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DtnWrrkp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 844BA21D43 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48794 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYqG-0007mx-KG for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:19:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58562) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlL-00065X-SN for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:59 -0400 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:39530) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlJ-0000Ug-32 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:59 -0400 Received: by mail-pf1-x441.google.com with SMTP id n14so2383086pff.6 for ; Tue, 08 Sep 2020 01:13:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=65uW6/eJtxdVQ3erFH0nAd+ZJZrP6B7JK355CS4Evd4=; b=DtnWrrkppBALmGDk6WyZ9zbWxElLLqFd9TEqM/7gVsatasdVioc4gVzJGhrkQU9CvY r2seFpZkf0Y1tPjBnQyLjqAuOpjzpCRNPksrPmfQNiigepK13Nzi5oVqsvBaVgNd7Yqt rL0zvLs0SSBsVDDts6Zuc+vRtb15G7Rzrwk+j1f9ka9gg+UzTcYTLTc3qaRMgja/OzLf /4wMqxn6l9fb19RXdpnL6D2BN+nM6O7UufmEBfKYS7tKXrYtn3dsCEjegd79OV55L3Cd SCS8xqINFAHT7ELkaZItAMT+PXx+/aful3FmFbCbdJI1Q6sB58nE4NNhcDMe0mOlTi4v ElYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=65uW6/eJtxdVQ3erFH0nAd+ZJZrP6B7JK355CS4Evd4=; b=InAqCmhOiu0jO7vXx6/dv3cvoD+2QMx4DGflnMASkJSwX7NJwepA5Un3phqEATwT1h fkB7ucnLqo5HzAWtp48sF8HZQuARnSU3zGIOgzbG1VvRTl5LSP+ih/thOXEHmIyBAptl AsFMWCp3Y7mrFK7lpq+xcOXf/TRgqKOTRmWVSDuC9IZXZoJw7CrIuVO6zJiKHAX3+uP9 H/BWODq7esUOuzd+9xMlNuVs/TPZO9OUBY1IJj+zT5RwgxXgFlNPlQHLk7kNLXA2gTHH klD8ldZ9aJdPw2S26TJaktSua4wb/kKZ1AFlUt4IdMfnhksdYVQJfZr8CMLVP3IrvnMN CDGg== X-Gm-Message-State: AOAM5306DJZC//L9hvwSk0F8pgceg2sQWW4Rtdrzr71Sb+7qWsX+E7c3 hVVAPJbsj7TfR+MBIsBQSxgf X-Google-Smtp-Source: ABdhPJyjW9Rf19phSJVRmmBhzz09xfjWkMYaw+EMA/BJBf1jliCjDfdBTTiFTJDMkLPh7KorHTtOBw== X-Received: by 2002:a17:902:ba81:b029:d0:cbe1:e7ad with SMTP id k1-20020a170902ba81b02900d0cbe1e7admr104185pls.30.1599552835913; Tue, 08 Sep 2020 01:13:55 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:55 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 11/12] target/arm/kvm: spe: Enable userspace irqchip support. Date: Tue, 8 Sep 2020 08:13:29 +0000 Message-Id: <6aaa406b824d0c427acbc3f3abfbbe841f3bb93c.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::441; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Since the current kernel patches haven't enabled the userspace irqchip support, this patch is not verified yet! Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- linux-headers/linux/kvm.h | 1 + target/arm/kvm.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 8840cbb01c..35ef0ae842 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1672,6 +1672,7 @@ struct kvm_assigned_msix_entry { #define KVM_ARM_DEV_EL1_VTIMER (1 << 0) #define KVM_ARM_DEV_EL1_PTIMER (1 << 1) #define KVM_ARM_DEV_PMU (1 << 2) +#define KVM_ARM_DEV_SPE (1 << 3) struct kvm_hyperv_eventfd { __u32 conn_id; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 58f991e890..7950ff1d83 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -820,6 +820,11 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) switched_level &= ~KVM_ARM_DEV_PMU; } + if (switched_level & KVM_ARM_DEV_SPE) { + qemu_set_irq(cpu->spe_interrupt, + !!(run->s.regs.device_irq_level & KVM_ARM_DEV_SPE)); + switched_level &= ~KVM_ARM_DEV_SPE; + } if (switched_level) { qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", __func__, switched_level); From patchwork Tue Sep 8 08:13:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 11762959 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EF1BA59D for ; Tue, 8 Sep 2020 08:18:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AAFDB2177B for ; Tue, 8 Sep 2020 08:18:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="QfFfk0Hu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AAFDB2177B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:44694 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYpM-00069D-G1 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 08 Sep 2020 04:18:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlO-0006Dy-L6 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:14:02 -0400 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:51783) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlL-0000VL-Uz for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:14:02 -0400 Received: by mail-pj1-x1042.google.com with SMTP id a9so4692026pjg.1 for ; Tue, 08 Sep 2020 01:13:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zq8jUh6rr55C3iWlgIX0sFstenVLmlXQeyrdeGeUxsU=; b=QfFfk0HucHpO/x5Jc0DCHPv1/TNxgbR0bKs0thQNWDve3EYX38Od2x6m0shvaVR3lm 9IPFIl3SxZp1ttV76d2ZXNjFdLiO58rjGbORvuCAE5b8JZncIo2sVSmId5z8POfV1aH9 mup4t48Yh6gCUidgmvJr7xt+opOUkEC8neR7IcPYhlSxfw1GOLIR7Gp6yRjKDAcniPay xPVMotf6YWG9sZvVyZXOEoAn8d2z5K75Fz7Y3iWfEOpVtYORH/cpPhYzETIDxnh7WFgj 1BJ4jDdOBjd04i05OZ6LPLc+Y4Bq4tgN+lMr5GatQcVaVRxbQooWukUPSyU8MGGUsmWB AS3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zq8jUh6rr55C3iWlgIX0sFstenVLmlXQeyrdeGeUxsU=; b=t8JU80heHZpxL5GpQomgSTOrZIWMm7m6vJTyTdTJkNNzsOiHyD2eets+tpL3+7gSeX HEgpfm4+z1wPYRsWQO/LODcCod//CE+LThuiNFeg3WmeIla7+ubOyf444T7UKuxeBDHE zcRwDkTC5kUkmloVYxtLfe0/yuZkH6xx0LCc9KYvMmxdp/zAUTYTCph3VakNdKMO3jMZ 50w1+saOYZJecZao8zQzUB4b7QywQUEfhIGKwxOKCdgI/gX/YER1u8h9Z/ttCuzvMQZE UnYB2Kg2nO2/Kp19l/Hz8oTY/uKFkkCPLDOwSwlg3He6+UK5Gfk03TRBpxmlrjzshPdy 6Www== X-Gm-Message-State: AOAM533ngwOhImqr7b/0EbnchuJHJY+tONvO+0QxTSMv3NkhNXju3fbO RCD7JC1ewWn1ua89lxnkKKrO X-Google-Smtp-Source: ABdhPJzlRN1M8h16oz81XvukGczif4UIfS0V9BlFyYExNj30RXZy9QyNWrwE2SI2w53DuR4Z3v8czg== X-Received: by 2002:a17:90b:1212:: with SMTP id gl18mr2103309pjb.138.1599552837216; Tue, 08 Sep 2020 01:13:57 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:56 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 12/12] target/arm: spe: Add corresponding doc and test. Date: Tue, 8 Sep 2020 08:13:30 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- docs/system/arm/cpu-features.rst | 20 ++++++++++++++++++++ target/arm/monitor.c | 2 +- tests/qtest/arm-cpu-features.c | 9 +++++++++ 3 files changed, 30 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst index 2d5c06cd01..5b81b9a560 100644 --- a/docs/system/arm/cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -344,3 +344,23 @@ verbose command lines. However, the recommended way to select vector lengths is to explicitly enable each desired length. Therefore only example's (1), (4), and (6) exhibit recommended uses of the properties. +SPE CPU Property +================== + +The SPE CPU property `spe` is used to enable or disable the SPE feature, +just as the `pmu` CPU property completely enables or disables the PMU. + +Currently, this property is only available with KVM mode, and is enabled +by default if KVM support it. When KVM is enabled, if the host does not +support SPE, then an error is generated when attempting to enable it. + +Following are 2 examples to use this property: + + 1) Disable SPE:: + + $ qemu-system-aarch64 -M virt,accel=kvm -cpu max,spe=off + + 2) Implicitly enable it with the `host` CPU type if host cpu + support it:: + + $ qemu-system-aarch64 -M virt,accel=kvm -cpu host diff --git a/target/arm/monitor.c b/target/arm/monitor.c index ba6e01abd0..1b8f08988a 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -99,7 +99,7 @@ QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16); * then the order that considers those dependencies must be used. */ static const char *cpu_model_advertised_features[] = { - "aarch64", "pmu", "sve", + "aarch64", "pmu", "spe", "sve", "sve128", "sve256", "sve384", "sve512", "sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280", "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index 77b5e30a9c..4d393fb2e2 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -494,6 +494,7 @@ static void test_query_cpu_model_expansion_kvm(const void *data) if (g_str_equal(qtest_get_arch(), "aarch64")) { bool kvm_supports_sve; + bool kvm_supports_spe; char max_name[8], name[8]; uint32_t max_vq, vq; uint64_t vls; @@ -512,8 +513,10 @@ static void test_query_cpu_model_expansion_kvm(const void *data) "with KVM on this host", NULL); assert_has_feature(qts, "host", "sve"); + assert_has_feature(qts, "host", "spe"); resp = do_query_no_props(qts, "host"); kvm_supports_sve = resp_get_feature(resp, "sve"); + kvm_supports_spe = resp_get_feature(resp, "spe"); vls = resp_get_sve_vls(resp); qobject_unref(resp); @@ -573,10 +576,16 @@ static void test_query_cpu_model_expansion_kvm(const void *data) } else { g_assert(vls == 0); } + + if (kvm_supports_spe) { + assert_set_feature(qts, "host", "spe", false); + assert_set_feature(qts, "host", "spe", true); + } } else { assert_has_not_feature(qts, "host", "aarch64"); assert_has_not_feature(qts, "host", "pmu"); assert_has_not_feature(qts, "host", "sve"); + assert_has_not_feature(qts, "host", "spe"); } qtest_quit(qts);