From patchwork Tue Sep 8 15:18:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 11763479 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 265A3746 for ; Tue, 8 Sep 2020 15:19:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EEB3D223BD for ; Tue, 8 Sep 2020 15:19:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="wDOiidQ2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EEB3D223BD Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 659416E867; Tue, 8 Sep 2020 15:19:02 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by gabe.freedesktop.org (Postfix) with ESMTPS id DB0F86E863 for ; Tue, 8 Sep 2020 15:19:00 +0000 (UTC) Received: by mail-wr1-x441.google.com with SMTP id m6so19583061wrn.0 for ; Tue, 08 Sep 2020 08:19:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3z8ewx/ZRDSN9alYRV1GNbpM8nlpU8ozO9MS5G5Yh6E=; b=wDOiidQ2OMXWHXErJkSC//k9rNMkPjKCsh0kCoDcDQ7I4wBdVBmw/53WjBfmc0S/zF z4+bOBwfdB8CG/d120sIqdXklHCLwSYlSIsddndpa6bQPyUsudOnAWIy7HJ3r5dQJqUr sfCrz+fpUMMCk6ymbFmsi65sR17m7gOVYc6J7EIfwrROdKShHKqA7kPwc6qfFCoIKQcm zbhPZJjteaQq6e7RKBO1qIBR4l/Ff78YdM9SDoXiRPNCsBwiPgv+2i/YhAq2NBbSoTzy b8v3s9TzVTGmhE6Tp1CEtFAu4+Znw3cdD45XPKL/uP80PpXi+CI7AJIL1C4MNSs9Crik p2ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3z8ewx/ZRDSN9alYRV1GNbpM8nlpU8ozO9MS5G5Yh6E=; b=dFbtYSrhyBhTbow2nFgEXRzKPaZw5deZSe2PE7wO1ZzjP7SpcZkEbguqLn/Aqd0ICg Yw4pvkpFFsPxw48FyQmpb3KRnXQJ9NFq5vX4ObtRzjEgnh3oW+TPT8OKGSBX9gM90jqX 9tQ2ZCHuOv65yD9LrH8Egrc15pX1pkFN48ikYpm/1s7sAPN+zMykFB/8wbjVejDhITZr ZhWa73DI/EdSnoE8/IJijXZlFOir4qRTZhbeQD8C7gOgdiD/Jh81DscH5GMfVqc6rY7A QPGjgzPNC7TT+qEk6y7d6w/QzRInFV3ofDRo0Yf6n2mZb4hEELyz9MeUnAjcGZSTg156 HMJA== X-Gm-Message-State: AOAM532vjodb2fXfQKGmfRSlKBaTdKV9VnkSMNUD8QFTSHnYjvgCo0Il Sm87efoqJ2KzW0M0emNU7EoPKg== X-Google-Smtp-Source: ABdhPJw9PhMfql/HCXy219kI4xjVlQ2JDvbSsD9uFg37fWGjczy3ofVC8EMawYpaXn0CvZsQro+EIQ== X-Received: by 2002:adf:ec0a:: with SMTP id x10mr128489wrn.47.1599578339377; Tue, 08 Sep 2020 08:18:59 -0700 (PDT) Received: from bender.baylibre.local ([2a01:e35:2ec0:82b0:5405:9623:e2f1:b2ac]) by smtp.gmail.com with ESMTPSA id d25sm10004886wra.25.2020.09.08.08.18.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 08:18:58 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Subject: [PATCH 1/5] iommu/io-pgtable-arm: Add BROKEN_NS quirk to disable shareability on ARM LPAE Date: Tue, 8 Sep 2020 17:18:49 +0200 Message-Id: <20200908151853.4837-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200908151853.4837-1-narmstrong@baylibre.com> References: <20200908151853.4837-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The coherency integration of the IOMMU in the Mali-G52 found in the Amlogic G12B SoCs is broken and leads to constant and random faults from the IOMMU. Disabling shareability completely fixes the issue. Signed-off-by: Neil Armstrong --- drivers/iommu/io-pgtable-arm.c | 7 ++++--- include/linux/io-pgtable.h | 4 ++++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index dc7bcf858b6d..d2d48dc86556 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -440,7 +440,9 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, << ARM_LPAE_PTE_ATTRINDX_SHIFT); } - if (prot & IOMMU_CACHE) + if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_BROKEN_SH) + pte |= ARM_LPAE_PTE_SH_NS; + else if (prot & IOMMU_CACHE) pte |= ARM_LPAE_PTE_SH_IS; else pte |= ARM_LPAE_PTE_SH_OS; @@ -1005,8 +1007,7 @@ arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) { struct arm_lpae_io_pgtable *data; - /* No quirks for Mali (hopefully) */ - if (cfg->quirks) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_BROKEN_SH)) return NULL; if (cfg->ias > 48 || cfg->oas > 40) diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 23285ba645db..efb9c8f20909 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -86,6 +86,9 @@ struct io_pgtable_cfg { * * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table * for use in the upper half of a split address space. + * + * IO_PGTABLE_QUIRK_ARM_BROKEN_SH: (ARM LPAE format) Disables shareability + * when coherency integration is broken. */ #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) @@ -93,6 +96,7 @@ struct io_pgtable_cfg { #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) #define IO_PGTABLE_QUIRK_NON_STRICT BIT(4) #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) + #define IO_PGTABLE_QUIRK_ARM_BROKEN_SH BIT(6) unsigned long quirks; unsigned long pgsize_bitmap; unsigned int ias; From patchwork Tue Sep 8 15:18:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 11763483 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6DBD6618 for ; Tue, 8 Sep 2020 15:19:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40B82222E7 for ; Tue, 8 Sep 2020 15:19:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="ORyY4Zqf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 40B82222E7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F2A776E86C; Tue, 8 Sep 2020 15:19:04 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by gabe.freedesktop.org (Postfix) with ESMTPS id 59ABB6E866 for ; Tue, 8 Sep 2020 15:19:02 +0000 (UTC) Received: by mail-wr1-x444.google.com with SMTP id z1so19590428wrt.3 for ; Tue, 08 Sep 2020 08:19:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O5HUPZey23fpZ7O0ISBcnmoDeQoSvAOa5PK6DE6zp90=; b=ORyY4ZqfDcrdXYjsjTXTEtrUaQe1RJldbGO+pqANb858Ya+JjB4iH1ncEJwkByFE3d cvYPX+8JBt8+2Wov00EdDqAMHvKSEsRwmOVae7HKFzAi8a9LM7+VE9WE6w4pARa9Ox1x /ahRnbLC4gcZoGEORtUuxneW2DLP1pdu8Ol/m53qs6fnlTkDYEodVKtywKTDBQzApoU1 GQlb0LTW7BmwiHtiu2r/3kR4FFdu4bFblA3jYjH2vVIAP3WNcxTFgYY3IKzl4j7ojkEK mYooRqXepx9HdE+veBwBnbnNIubUixtUQd1iCTaBJhk1jxmYyWfkQCIc1ZTaHlMQiRg+ ITOg== X-Google-DKIM-Signature: v=1; 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Tue, 08 Sep 2020 08:19:00 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Subject: [PATCH 2/5] drm/panfrost: add support specifying pgtbl quirks Date: Tue, 8 Sep 2020 17:18:50 +0200 Message-Id: <20200908151853.4837-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200908151853.4837-1-narmstrong@baylibre.com> References: <20200908151853.4837-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a pgtbl_quirks entry in the compatible specific table to permit specyfying IOMMU quirks for platforms. Signed-off-by: Neil Armstrong Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_mmu.c | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 953f7536a773..2cf1a6a13af8 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -70,6 +70,9 @@ struct panfrost_compatible { int num_pm_domains; /* Only required if num_pm_domains > 1. */ const char * const *pm_domain_names; + + /* IOMMU quirks flags */ + unsigned long pgtbl_quirks; }; struct panfrost_device { diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c index e8f7b11352d2..55a846c70e46 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -368,6 +368,7 @@ int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv) mmu->as = -1; mmu->pgtbl_cfg = (struct io_pgtable_cfg) { + .quirks = pfdev->comp ? pfdev->comp->pgtbl_quirks : 0, .pgsize_bitmap = SZ_4K | SZ_2M, .ias = FIELD_GET(0xff, pfdev->features.mmu_features), .oas = FIELD_GET(0xff00, pfdev->features.mmu_features), From patchwork Tue Sep 8 15:18:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 11763481 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4772B618 for ; Tue, 8 Sep 2020 15:19:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1C62C222E7 for ; Tue, 8 Sep 2020 15:19:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="1fRpOHn2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1C62C222E7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CAF036E86A; Tue, 8 Sep 2020 15:19:04 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by gabe.freedesktop.org (Postfix) with ESMTPS id B054B6E86A for ; Tue, 8 Sep 2020 15:19:03 +0000 (UTC) Received: by mail-wr1-x441.google.com with SMTP id m6so19583255wrn.0 for ; Tue, 08 Sep 2020 08:19:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EjvSHXG3RI2RmufIBrYIZQgGCbPKahWO302cZe4SW9Q=; b=1fRpOHn2lUTg/rLqc5FK572t6QTaVx2cYu+zLDiJpPqs8Msd6mxRGNwuQj7o/RemeB lp9id7bzG8bubb29ko3iwRYgZzddu8jc1z5ySmEpJQbi81n/gngRijw8+0G4Hmtjajt3 VkvFnYnB70FT/9x3O7OLKvsN8UDOhKP5dcVjqfmkLO3lasTdS+d5yCZZxHw7Ga9Zja2n 1y6vyBkEwXn/0qvCvQTQjk71wPIDCn2g6OnC0vEEUSS8gU1hzC2FE/iYN4+XkIbnAbOg otF3YD6EqWDUDKMsSqkb8xASmC62YkldJ00uUh8OxuTRQbumbWBoRkx7YxQGBkWdFmmm Szvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EjvSHXG3RI2RmufIBrYIZQgGCbPKahWO302cZe4SW9Q=; b=WaIoTiXnQuNchxssJa7EjJKXqUSb1U+HY28+0hPTf9uyaMKrZPWELPBeJyDjP161l8 7ybYGYrCIMxJl0/S+H2Wlg1zjm9TafQTq+NcGv2QNkm31pNafjSk2pB2fxJwDtUmGTkv /MXvOMmUTT5szBFroY7i14nyy8sc2QbifYwLq5JCFeA3Le+meVos4xuq4kPvciCTf9Hp IThpS3B7KhLW6tV5nRPsLjEj3rPFVFts2zr0RLCLKSqkQu42+tXNaydhBeS/6uWAAaTb g4PegaT8nzXC+rD591MckebE1tzEfc/gSGvguqf49WzeH1BAeamSMsuU0eWjbszSwIeH d7JA== X-Gm-Message-State: AOAM531s0N2RKUjEPcQ5lCXiTEqeQoywg4DR4TR+tAaIwVZBLdsL/OLX qOeHCqAiOFdxiQOv79AWVzaJVw== X-Google-Smtp-Source: ABdhPJyN+wVgZwcIGrsQVVJMowKAn9fgE7m5lBvFEuTQvke5O9KsubvDObKWcbTu0XD7mkbW64TA/Q== X-Received: by 2002:adf:f50a:: with SMTP id q10mr110043wro.319.1599578342220; Tue, 08 Sep 2020 08:19:02 -0700 (PDT) Received: from bender.baylibre.local ([2a01:e35:2ec0:82b0:5405:9623:e2f1:b2ac]) by smtp.gmail.com with ESMTPSA id d25sm10004886wra.25.2020.09.08.08.19.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 08:19:01 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Subject: [PATCH 3/5] drm/panfrost: add support for reset quirk Date: Tue, 8 Sep 2020 17:18:51 +0200 Message-Id: <20200908151853.4837-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200908151853.4837-1-narmstrong@baylibre.com> References: <20200908151853.4837-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The T820, G31 & G52 GPUs integratewd by Amlogic in the respective GXM, G12A/SM1 & G12B SoCs needs a quirk in the PWR registers at the GPU reset time. This adds a callback in the device compatible struct of permit this. Signed-off-by: Neil Armstrong --- drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_gpu.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 2cf1a6a13af8..4c9cd5452ba5 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -73,6 +73,9 @@ struct panfrost_compatible { /* IOMMU quirks flags */ unsigned long pgtbl_quirks; + + /* Vendor implementation quirks at reset time callback */ + void (*vendor_reset_quirk)(struct panfrost_device *pfdev); }; struct panfrost_device { diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index e0f190e43813..c129aaf77790 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -62,6 +62,10 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev) gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_RESET_COMPLETED); gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET); + /* The Amlogic GPU integration needs quirks at this stage */ + if (pfdev->comp->vendor_reset_quirk) + pfdev->comp->vendor_reset_quirk(pfdev); + ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, val, val & GPU_IRQ_RESET_COMPLETED, 100, 10000); From patchwork Tue Sep 8 15:18:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 11763485 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8C2B8746 for ; Tue, 8 Sep 2020 15:19:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1BC83223D6 for ; Tue, 8 Sep 2020 15:19:14 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 08 Sep 2020 08:19:03 -0700 (PDT) Received: from bender.baylibre.local ([2a01:e35:2ec0:82b0:5405:9623:e2f1:b2ac]) by smtp.gmail.com with ESMTPSA id d25sm10004886wra.25.2020.09.08.08.19.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 08:19:03 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Subject: [PATCH 4/5] drm/panfrost: add amlogic reset quirk callback Date: Tue, 8 Sep 2020 17:18:52 +0200 Message-Id: <20200908151853.4837-5-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200908151853.4837-1-narmstrong@baylibre.com> References: <20200908151853.4837-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The T820, G31 & G52 GPUs integratewd by Amlogic in the respective GXM, G12A/SM1 & G12B SoCs needs a quirk in the PWR registers at the GPU reset time. Since the documentation of the GPU cores are not public, we do not know what does these values, but they permit having a fully functional GPU running with Panfrost. Signed-off-by: Neil Armstrong Reported-by: kernel test robot --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 13 +++++++++++++ drivers/gpu/drm/panfrost/panfrost_gpu.h | 2 ++ drivers/gpu/drm/panfrost/panfrost_regs.h | 3 +++ 3 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index c129aaf77790..018737bd4ac6 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -80,6 +80,19 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev) return 0; } +void panfrost_gpu_amlogic_quirks(struct panfrost_device *pfdev) +{ + /* + * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs + * these undocumented bits to be set in order to operate + * correctly. + * These GPU_PWR registers contains: + * "device-specific power control value" + */ + gpu_write(pfdev, GPU_PWR_KEY, 0x2968A819); + gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16)); +} + static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev) { u32 quirks = 0; diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.h b/drivers/gpu/drm/panfrost/panfrost_gpu.h index 4112412087b2..a881d7dc812f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.h +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.h @@ -16,4 +16,6 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev); void panfrost_gpu_power_on(struct panfrost_device *pfdev); void panfrost_gpu_power_off(struct panfrost_device *pfdev); +void panfrost_gpu_amlogic_reset_quirk(struct panfrost_device *pfdev); + #endif diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h index ea38ac60581c..fa0d02f3c830 100644 --- a/drivers/gpu/drm/panfrost/panfrost_regs.h +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h @@ -51,6 +51,9 @@ #define GPU_STATUS 0x34 #define GPU_STATUS_PRFCNT_ACTIVE BIT(2) #define GPU_LATEST_FLUSH_ID 0x38 +#define GPU_PWR_KEY 0x050 /* (WO) Power manager key register */ +#define GPU_PWR_OVERRIDE0 0x054 /* (RW) Power manager override settings */ +#define GPU_PWR_OVERRIDE1 0x058 /* (RW) Power manager override settings */ #define GPU_FAULT_STATUS 0x3C #define GPU_FAULT_ADDRESS_LO 0x40 #define GPU_FAULT_ADDRESS_HI 0x44 From patchwork Tue Sep 8 15:18:53 2020 Content-Type: text/plain; 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Tue, 08 Sep 2020 08:19:04 -0700 (PDT) From: Neil Armstrong To: robh@kernel.org, tomeu.vizoso@collabora.com, steven.price@arm.com, alyssa.rosenzweig@collabora.com Subject: [PATCH 5/5] drm/panfrost: add Amlogic GPU integration quirks Date: Tue, 8 Sep 2020 17:18:53 +0200 Message-Id: <20200908151853.4837-6-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200908151853.4837-1-narmstrong@baylibre.com> References: <20200908151853.4837-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds the required GPU quirks, including the quirk in the PWR registers at the GPU reset time and the IOMMU quirk for shareability issues observed on G52 in Amlogic G12B SoCs. Signed-off-by: Neil Armstrong Reviewed-by: Alyssa Rosenzweig --- drivers/gpu/drm/panfrost/panfrost_drv.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 36463c89e966..efde5e2acc35 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -656,7 +656,25 @@ static const struct panfrost_compatible default_data = { .pm_domain_names = NULL, }; +static const struct panfrost_compatible amlogic_gxm_data = { + .num_supplies = ARRAY_SIZE(default_supplies), + .supply_names = default_supplies, + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, +}; + +static const struct panfrost_compatible amlogic_g12a_data = { + .num_supplies = ARRAY_SIZE(default_supplies), + .supply_names = default_supplies, + .vendor_reset_quirk = panfrost_gpu_amlogic_reset_quirk, + .pgtbl_quirks = IO_PGTABLE_QUIRK_ARM_BROKEN_SH, +}; + static const struct of_device_id dt_match[] = { + /* Set first to probe before the generic compatibles */ + { .compatible = "amlogic,meson-gxm-mali", + .data = &amlogic_gxm_data, }, + { .compatible = "amlogic,meson-g12a-mali", + .data = &amlogic_g12a_data, }, { .compatible = "arm,mali-t604", .data = &default_data, }, { .compatible = "arm,mali-t624", .data = &default_data, }, { .compatible = "arm,mali-t628", .data = &default_data, },