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Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 5e046f9d48ce9..ca6ea71f5f435 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -613,6 +613,8 @@ uart0: serial@11002000 { interrupts = ; clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; @@ -623,6 +625,8 @@ uart1: serial@11003000 { interrupts = ; clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; @@ -633,6 +637,8 @@ uart2: serial@11004000 { interrupts = ; clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; @@ -643,6 +649,8 @@ uart3: serial@11005000 { interrupts = ; clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; From patchwork Thu Sep 10 08:43:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 11767119 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 236A5618 for ; Thu, 10 Sep 2020 08:43:32 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D3996206D4 for ; Thu, 10 Sep 2020 08:43:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iLOxZ4gZ"; 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Thu, 10 Sep 2020 01:43:14 -0700 (PDT) From: Hsin-Yi Wang To: linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/2] arm64: dts: mt8183: Set uart to mmio32 iotype Date: Thu, 10 Sep 2020 16:43:04 +0800 Message-Id: <20200910084304.3429494-2-hsinyi@chromium.org> X-Mailer: git-send-email 2.28.0.526.ge36021eeef-goog In-Reply-To: <20200910084304.3429494-1-hsinyi@chromium.org> References: <20200910084304.3429494-1-hsinyi@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_044316_848122_62E2920D X-CRM114-Status: GOOD ( 12.60 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:542 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Enric Balletbo i Serra , Rob Herring , Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Set uart iotype to mmio32 to make earlycon work with stdout-path. Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 102105871db25..0bda97f912789 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -374,6 +374,8 @@ uart0: serial@11002000 { interrupts = ; clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; @@ -384,6 +386,8 @@ uart1: serial@11003000 { interrupts = ; clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; }; @@ -394,6 +398,8 @@ uart2: serial@11004000 { interrupts = ; clocks = <&clk26m>, <&infracfg CLK_INFRA_UART2>; clock-names = "baud", "bus"; + reg-io-width = <4>; + reg-shift = <2>; status = "disabled"; };