From patchwork Fri Sep 11 10:26:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 11770203 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B51B092C for ; Fri, 11 Sep 2020 10:27:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98D7C22204 for ; Fri, 11 Sep 2020 10:27:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="pHRJdEtO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725781AbgIKK1T (ORCPT ); Fri, 11 Sep 2020 06:27:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725710AbgIKK1R (ORCPT ); Fri, 11 Sep 2020 06:27:17 -0400 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36397C061573 for ; Fri, 11 Sep 2020 03:27:17 -0700 (PDT) Received: by mail-pf1-x443.google.com with SMTP id l126so6985576pfd.5 for ; Fri, 11 Sep 2020 03:27:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=0Q+mRldzeNc4mUazAbCBa9vIrcqMaeg+luRlC+gamu0=; b=pHRJdEtOdmDSrNgpEaEzchIB53t4VBWbF6N0iAwIzGqLhOhdOllKVGevFzEa3fQ/6v th4/TXjwybFh5DUudJsyhRXUAwrfbbcC07s+uSJMlw9STAqQSGBX7w7nG8Z+H3+cTnux sUHwrNJUnw4dZUJfFPk/Og+cM1R8EBUsr7+Siu/YizewG6mQH/kf/MtKUfEDFSwQ3uE1 Lvq6YFAmYxjOZtoodB6sp9jUoZuCkU3ZECGggbvuGOJh+Rx+5gDoziVp9kfKAAVJaVP9 Y4MbCRKqrHC40E+jk3S/IrcvxHyl/ShRFXkK4OWUi6bIhesyYKmLUiyDtRB6L/SjGHS4 gjDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=0Q+mRldzeNc4mUazAbCBa9vIrcqMaeg+luRlC+gamu0=; b=e+REPP9khDHiY5KZDYMpEgG6Y1kNThU9Hq0exD1HRvKsM6+oUgSAyr9A126RUzdzXZ 6uUvWLLNX4Dsl8Br/3GX0WMU5HF4UlJz92ETqzaIpMNkWRrMe1OYuza9BaDNcOOmwC9r 9hwj8MGHmnJ3Mh1DgWGjfahn/vksyD8kx3PvewVHcQqivWnSptOzFqT5P/GWgxkp1ZOP Pc35KskuYirMmPH3RzUfKfQ9ycBoQ9HKvZXMeSOroylzGtJpp7bJmr16Q5Yz0YRX9L+o 0OxpaoHjup04cMvoz9T8oF0P29kIyrtnExHSvqec3lTVL2b7TVEGTgIh37qzXdbW98ZA wJEg== X-Gm-Message-State: AOAM533VO/BA96Zwv/3I8fpXgecr8mgfmfQw5h8u78iPyiUVhDyZfDhL vB37IeazRsWhH9LfvhZbsv8= X-Google-Smtp-Source: ABdhPJyDlIqkP6hOQSjj1nAPNyVgDUxJX79AuKkOZXi+KacHTh6QwbYsQbfjeMTByjOuLOwIB4Nqiw== X-Received: by 2002:a62:7ed5:0:b029:13e:d13d:a086 with SMTP id z204-20020a627ed50000b029013ed13da086mr1522248pfc.29.1599820036776; Fri, 11 Sep 2020 03:27:16 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id j24sm1612727pjy.35.2020.09.11.03.27.12 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Sep 2020 03:27:16 -0700 (PDT) From: Huacai Chen To: Thomas Bogendoerfer , Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-mips@vger.kernel.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V2 1/2] MIPS: Loongson64: Increase NR_IRQS to 320 Date: Fri, 11 Sep 2020 18:26:17 +0800 Message-Id: <1599819978-13999-1-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Modernized Loongson64 uses a hierarchical organization for interrupt controllers (INTCs), all INTC nodes (not only leaf nodes) need some IRQ numbers. This means 280 (i.e., NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + 256) is not enough to represent all interrupts, so let's increase NR_IRQS to 320 (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256). Signed-off-by: Huacai Chen --- arch/mips/include/asm/mach-loongson64/irq.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h index f5e362f7..7450d45 100644 --- a/arch/mips/include/asm/mach-loongson64/irq.h +++ b/arch/mips/include/asm/mach-loongson64/irq.h @@ -7,7 +7,8 @@ /* cpu core interrupt numbers */ #define NR_IRQS_LEGACY 16 #define NR_MIPS_CPU_IRQS 8 -#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + 256) +#define NR_MAX_CHAINED_IRQS 40 /* Chained IRQs means those not directly used by devices */ +#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256) #define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY From patchwork Fri Sep 11 10:26:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 11770205 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7C80692C for ; Fri, 11 Sep 2020 10:27:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5CDB9221F1 for ; Fri, 11 Sep 2020 10:27:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="uUcpqUl4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725841AbgIKK1c (ORCPT ); Fri, 11 Sep 2020 06:27:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725710AbgIKK13 (ORCPT ); Fri, 11 Sep 2020 06:27:29 -0400 Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 789DCC061573; Fri, 11 Sep 2020 03:27:29 -0700 (PDT) Received: by mail-pj1-x1042.google.com with SMTP id v14so168031pjd.4; Fri, 11 Sep 2020 03:27:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=lQt4U1iP+l97io+9Y7fL8PAkQ11+CExjcyqCQ8vCFRA=; b=uUcpqUl4J+axBPi2cfKLPmynySnRMfC5EpBgmWLEzxFSXrPj5+nKQLDVyX9VOCxhdk BdOEZS137xO92s4BG/U92Vhk3woMyqnpbzLRJag/igi73YRR5kpQf7OxO/BZga6KVbfA 3P18XJDE1rWaKurScyWaFhWoa2ZSNFL04aR1j/iSzcKDd8plYusp8uyyrjAdX8kg/kvL W+WQddK1Vz4qFOAwvG0Y9FvaWrEdtVAHrmNZfnc0Bi2Bt7Gi31QQrKTCzI1CMvGpapkH Jf0665tj8Xuuyhx6VRKYmY4kQzY9C1f97PLS35ZdhA/XLaX5IJ6q+vZ0lrIKzmRaU13W 8zKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=lQt4U1iP+l97io+9Y7fL8PAkQ11+CExjcyqCQ8vCFRA=; b=QKIcj5uI0SUECDi+/nTmVXMcxD/gYQPuPxBJgnATJQl73Pwu3jB61ILTNT698Qi3Kc SNOUyhU5JuQUcHGoVzVoAWo9us0EvIbM9DSpoA5Iccna/PdPogvfBDTY8Sn4E60axU6G bzOk+3xnzFeYLBVsZDSiN8b1tGQEdmrh41E6gPGpSqA9sKFm/YTldlD9OZk4EoRBWzwU 1/pVCnDtXWP7C79XVWDLUu2+mbZXnmwEPyk8QbuYdav5b+7UjBKEvszKCBBa+1rXVa7f Fjx670XJY5JARgIw51/Z1+AtKMZPMJAlXN5SKRXbHt7iHlLW6/OLBZoY8SPuRdDbr7/c RzqA== X-Gm-Message-State: AOAM531nUCXeNL32FJqva0OqZC5RgcPPX+UJb/4Cmn05Z1rB6xfmh65W EUbzJdvaeLma0CMe9wsbJRA= X-Google-Smtp-Source: ABdhPJwcUR55ZC7FLF5EZfwaI9zLqj9zqxA7mzSfvZKiNBvZaiLTovujelILqFDHwGe/+eBswzad+A== X-Received: by 2002:a17:90b:715:: with SMTP id s21mr1549243pjz.113.1599820049108; Fri, 11 Sep 2020 03:27:29 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id j24sm1612727pjy.35.2020.09.11.03.27.25 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Sep 2020 03:27:28 -0700 (PDT) From: Huacai Chen To: Thomas Bogendoerfer , Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-mips@vger.kernel.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org Subject: [PATCH V2 2/2] irqchip/loongson-htvec: Fix initial interrupts clearing Date: Fri, 11 Sep 2020 18:26:18 +0800 Message-Id: <1599819978-13999-2-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1599819978-13999-1-git-send-email-chenhc@lemote.com> References: <1599819978-13999-1-git-send-email-chenhc@lemote.com> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org In htvec_reset() only the first group of initial interrupts is cleared. This sometimes causes spurious interrupts, so let's clear all groups. BTW, commit c47e388cfc648421bd821f ("irqchip/loongson-htvec: Support 8 groups of HT vectors") increase interrupt lines from 4 to 8, so update comments as well. Cc: stable@vger.kernel.org Fixes: 818e915fbac518e8c78e1877 ("irqchip: Add Loongson HyperTransport Vector support") Signed-off-by: Huacai Chen --- drivers/irqchip/irq-loongson-htvec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-loongson-htvec.c b/drivers/irqchip/irq-loongson-htvec.c index 13e6016..6392aaf 100644 --- a/drivers/irqchip/irq-loongson-htvec.c +++ b/drivers/irqchip/irq-loongson-htvec.c @@ -151,7 +151,7 @@ static void htvec_reset(struct htvec *priv) /* Clear IRQ cause registers, mask all interrupts */ for (idx = 0; idx < priv->num_parents; idx++) { writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx); - writel_relaxed(0xFFFFFFFF, priv->base); + writel_relaxed(0xFFFFFFFF, priv->base + 4 * idx); } } @@ -172,7 +172,7 @@ static int htvec_of_init(struct device_node *node, goto free_priv; } - /* Interrupt may come from any of the 4 interrupt line */ + /* Interrupt may come from any of the 8 interrupt lines */ for (i = 0; i < HTVEC_MAX_PARENT_IRQ; i++) { parent_irq[i] = irq_of_parse_and_map(node, i); if (parent_irq[i] <= 0)