From patchwork Thu Oct 25 13:56:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655853 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5541613A4 for ; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43A752B977 for ; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37B4B2BA39; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7E642B977 for ; Thu, 25 Oct 2018 14:04:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727363AbeJYWhi (ORCPT ); Thu, 25 Oct 2018 18:37:38 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:12782 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhi (ORCPT ); Thu, 25 Oct 2018 18:37:38 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:43 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 2954E86A03; Thu, 25 Oct 2018 23:04:43 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044153" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:40 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , devicetree@vger.kernel.org, Simon Horman , Geert Uytterhoeven , Chris Paterson , Fabrizio Castro , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/7] dt-bindings: phy: rcar-gen2: Add r8a77470 support Date: Thu, 25 Oct 2018 14:56:53 +0100 Message-Id: <1540475819-47950-2-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470) USB PHY is similar to the R-Car Gen2 family, but has the below features compared to other RZ/G1 and R-Car Gen2/3 SoCs It has a shared pll reset for usbphy0/usbphy1 and this register reside in usbphy0 block Each USB2.0 host needs to deassert the pll reset of usbphy0 block. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- .../devicetree/bindings/phy/rcar-gen2-phy.txt | 64 +++++++++++++++++++--- 1 file changed, 55 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt index eeb9e18..0a59971 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt @@ -6,6 +6,7 @@ This file provides information on what the device node for the R-Car generation Required properties: - compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC. "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC. + "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC. "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC. "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC. "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC. @@ -23,13 +24,23 @@ Required properties: - clocks: clock phandle and specifier pair. - clock-names: string, clock input name, must be "usbhs". +Optional properties (r8a77470 SoC Only): +To use a USB channel as USB 2.0 Host, the device tree node should set below +optional properties. This is because USB2.0 Host needs to deassert pll reset, +apart from initializing interrupt enable, OVC detection timer and suspend/ +resume timer register. + +- reg: offset and length of the partial USB2.0 Host register block. +- clocks: clock phandle and specifier pair for usb2.0 host. +- clk-names: string, clock input name, must be "usb20_host". + The USB PHY device tree node should have the subnodes corresponding to the USB channels. These subnodes must contain the following properties: - reg: the USB controller selector; see the table below for the values. - #phy-cells: see phy-bindings.txt in the same directory, must be <1>. The phandle's argument in the PHY specifier is the USB controller selector for -the USB channel; see the selector meanings below: +the USB channel other than r8a77470 SoC; see the selector meanings below: +-----------+---------------+---------------+ |\ Selector | | | @@ -40,22 +51,57 @@ the USB channel; see the selector meanings below: | 2 | PCI EHCI/OHCI | xHCI | +-----------+---------------+---------------+ +For r8a77470 SoC see the selector meaning below: + ++-----------+---------------+---------------+ +|\ Selector | | | ++ --------- + 0 | 1 | +| Channel \| | | ++-----------+---------------+---------------+ +| 0 | EHCI/OHCI | HS-USB | ++-----------+---------------+---------------+ + Example (Lager board): - usb-phy@e6590100 { - compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; + usbphy: usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a7790", + "renesas,rcar-gen2-usb-phy"; reg = <0 0xe6590100 0 0x100>; #address-cells = <1>; #size-cells = <0>; - clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; + clocks = <&cpg CPG_MOD 704>; clock-names = "usbhs"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; - usb-channel@0 { - reg = <0>; - #phy-cells = <1>; + usb0: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + usb2: usb-channel@2 { + reg = <2>; + #phy-cells = <1>; }; - usb-channel@2 { - reg = <2>; + }; + +Example (iWave RZ/G1C SBC): + + usbphy0: usb-phy0@e6590100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6590100 0 0x100>, + <0 0xee080200 0 0x118>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; + clock-names = "usbhs", "usb20_host"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 704>, <&cpg 703>; + status = "disabled"; + + usb0: usb-channel@0 { + reg = <0>; #phy-cells = <1>; }; }; From patchwork Thu Oct 25 13:56:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655855 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF8AB13A4 for ; Thu, 25 Oct 2018 14:04:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE2F42B977 for ; Thu, 25 Oct 2018 14:04:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A22042BA39; Thu, 25 Oct 2018 14:04:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 027C32B977 for ; Thu, 25 Oct 2018 14:04:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727606AbeJYWhk (ORCPT ); Thu, 25 Oct 2018 18:37:40 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:38796 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhk (ORCPT ); Thu, 25 Oct 2018 18:37:40 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:45 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id DA8C586A0A; Thu, 25 Oct 2018 23:04:45 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044155" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:43 +0900 From: Biju Das To: Simon Horman Cc: Biju Das , Kishon Vijay Abraham I , Wolfram Sang , Yoshihiro Shimoda , Simon Horman , Geert Uytterhoeven , Chris Paterson , Fabrizio Castro , linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/7] phy: renesas: phy-rcar-gen2: Add support for r8a77470 Date: Thu, 25 Oct 2018 14:56:54 +0100 Message-Id: <1540475819-47950-3-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for RZ/G1C (r8a77470) SoC. RZ/G1C SoC has a PLL register shared between hsusb0 and hsusb1. Compared to other RZ/G1 and R-Car Gen2/3, USB Host needs to deassert the pll reset. Signed-off-by: Biju Das --- This patch is tested against phy-next --- drivers/phy/renesas/phy-rcar-gen2.c | 188 +++++++++++++++++++++++++++++++++++- 1 file changed, 184 insertions(+), 4 deletions(-) diff --git a/drivers/phy/renesas/phy-rcar-gen2.c b/drivers/phy/renesas/phy-rcar-gen2.c index 72eeb06..3d3ebc8 100644 --- a/drivers/phy/renesas/phy-rcar-gen2.c +++ b/drivers/phy/renesas/phy-rcar-gen2.c @@ -4,6 +4,7 @@ * * Copyright (C) 2014 Renesas Solutions Corp. * Copyright (C) 2014 Cogent Embedded, Inc. + * Copyright (C) 2018 Renesas Electronics Corp. */ #include @@ -15,6 +16,7 @@ #include #include #include +#include #define USBHS_LPSTS 0x02 #define USBHS_UGCTRL 0x80 @@ -35,10 +37,36 @@ #define USBHS_UGCTRL2_USB0SEL 0x00000030 #define USBHS_UGCTRL2_USB0SEL_PCI 0x00000010 #define USBHS_UGCTRL2_USB0SEL_HS_USB 0x00000030 +#define USBHS_UGCTRL2_USB0SEL_USB20 0x00000010 +#define USBHS_UGCTRL2_USB0SEL_HS_USB_USB20 0x00000020 /* USB General status register (UGSTS) */ #define USBHS_UGSTS_LOCK 0x00000100 /* From technical update */ +/* USB2.0 Host registers (original offset is +0x200) */ +#define USB2_INT_ENABLE 0x000 +#define USB2_USBCTR 0x00c +#define USB2_SPD_RSM_TIMSET 0x10c +#define USB2_OC_TIMSET 0x110 + +/* RZ/G1C shared PLL RESET REG */ +#define USBHS_UGCTRL_PLL_RESET_REG 0xE6590180 + +/* INT_ENABLE */ +#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) +#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) +#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_USBH_INTB_EN | \ + USB2_INT_ENABLE_USBH_INTA_EN) + +/* USBCTR */ +#define USB2_USBCTR_PLL_RST BIT(1) + +/* SPD_RSM_TIMSET */ +#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b + +/* OC_TIMSET */ +#define USB2_OC_TIMSET_INIT 0x000209ab + #define PHYS_PER_CHANNEL 2 struct rcar_gen2_phy { @@ -57,8 +85,8 @@ struct rcar_gen2_channel { }; struct rcar_gen2_phy_driver { - void __iomem *base; - struct clk *clk; + void __iomem *base, *host_base; + struct clk *clk, *host_clk; spinlock_t lock; int num_channels; struct rcar_gen2_channel *channels; @@ -180,6 +208,111 @@ static int rcar_gen2_phy_power_off(struct phy *p) return 0; } +/* UGCTRL PLLRESET is shared between HSUSB0 and HSUSB1 */ +static void __iomem *pll_reg_base; +static atomic_t pll_reset_ref_cnt; + +static int rz_g1c_phy_init(struct phy *p) +{ + struct rcar_gen2_phy *phy = phy_get_drvdata(p); + struct rcar_gen2_channel *channel = phy->channel; + struct rcar_gen2_phy_driver *drv = channel->drv; + int retval; + + retval = rcar_gen2_phy_init(p); + if (retval) + return retval; + + /* Initialize USB2 part */ + if (phy->select_value != USBHS_UGCTRL2_USB0SEL_HS_USB_USB20) { + clk_prepare_enable(drv->host_clk); + writel(USB2_INT_ENABLE_INIT, drv->host_base + USB2_INT_ENABLE); + writel(USB2_SPD_RSM_TIMSET_INIT, + drv->host_base + USB2_SPD_RSM_TIMSET); + writel(USB2_OC_TIMSET_INIT, drv->host_base + USB2_OC_TIMSET); + } + + return 0; +} + +static int rz_g1c_phy_exit(struct phy *p) +{ + struct rcar_gen2_phy *phy = phy_get_drvdata(p); + struct rcar_gen2_channel *channel = phy->channel; + struct rcar_gen2_phy_driver *drv = channel->drv; + + if (phy->select_value != USBHS_UGCTRL2_USB0SEL_HS_USB_USB20) { + writel(0, drv->host_base + USB2_INT_ENABLE); + clk_disable_unprepare(channel->drv->host_clk); + } + + clk_disable_unprepare(channel->drv->clk); + + channel->selected_phy = -1; + + return 0; +} + +static int rz_g1c_phy_power_on(struct phy *p) +{ + struct rcar_gen2_phy *phy = phy_get_drvdata(p); + struct rcar_gen2_phy_driver *drv = phy->channel->drv; + void __iomem *base = drv->base; + unsigned long flags; + u32 value; + + spin_lock_irqsave(&drv->lock, flags); + + /* Power on USBHS PHY */ + if (atomic_read(&pll_reset_ref_cnt) == 0) { + value = readl(pll_reg_base); + value &= ~USBHS_UGCTRL_PLLRESET; + writel(value, pll_reg_base); + + /* As per the data sheet wait 340 micro sec for power stable */ + udelay(340); + } + + atomic_inc(&pll_reset_ref_cnt); + + if (phy->select_value == USBHS_UGCTRL2_USB0SEL_HS_USB_USB20) { + value = readw(base + USBHS_LPSTS); + value |= USBHS_LPSTS_SUSPM; + writew(value, base + USBHS_LPSTS); + } + + spin_unlock_irqrestore(&drv->lock, flags); + + return 0; +} + +static int rz_g1c_phy_power_off(struct phy *p) +{ + struct rcar_gen2_phy *phy = phy_get_drvdata(p); + struct rcar_gen2_phy_driver *drv = phy->channel->drv; + void __iomem *base = drv->base; + unsigned long flags; + u32 value; + + spin_lock_irqsave(&drv->lock, flags); + /* Power off USBHS PHY */ + if (phy->select_value == USBHS_UGCTRL2_USB0SEL_HS_USB_USB20) { + value = readw(base + USBHS_LPSTS); + value &= ~USBHS_LPSTS_SUSPM; + writew(value, base + USBHS_LPSTS); + } + + if (atomic_dec_and_test(&pll_reset_ref_cnt)) { + value = readl(pll_reg_base); + value |= USBHS_UGCTRL_PLLRESET; + writel(value, pll_reg_base); + } + + spin_unlock_irqrestore(&drv->lock, flags); + + return 0; +} + static const struct phy_ops rcar_gen2_phy_ops = { .init = rcar_gen2_phy_init, .exit = rcar_gen2_phy_exit, @@ -188,6 +321,14 @@ static const struct phy_ops rcar_gen2_phy_ops = { .owner = THIS_MODULE, }; +static const struct phy_ops rz_g1c_phy_ops = { + .init = rz_g1c_phy_init, + .exit = rz_g1c_phy_exit, + .power_on = rz_g1c_phy_power_on, + .power_off = rz_g1c_phy_power_off, + .owner = THIS_MODULE, +}; + static const struct of_device_id rcar_gen2_phy_match_table[] = { { .compatible = "renesas,usb-phy-r8a7790" }, { .compatible = "renesas,usb-phy-r8a7791" }, @@ -224,11 +365,22 @@ static const u32 select_mask[] = { [2] = USBHS_UGCTRL2_USB2SEL, }; -static const u32 select_value[][PHYS_PER_CHANNEL] = { +static const u32 pci_select_value[][PHYS_PER_CHANNEL] = { [0] = { USBHS_UGCTRL2_USB0SEL_PCI, USBHS_UGCTRL2_USB0SEL_HS_USB }, [2] = { USBHS_UGCTRL2_USB2SEL_PCI, USBHS_UGCTRL2_USB2SEL_USB30 }, }; +static const u32 usb20_select_value[][PHYS_PER_CHANNEL] = { + { USBHS_UGCTRL2_USB0SEL_USB20, USBHS_UGCTRL2_USB0SEL_HS_USB_USB20 }, +}; + +static const struct soc_device_attribute soc_r8a77470[] = { + { + .soc_id = "r8a77470", + }, + { /* sentinel */ } +}; + static int rcar_gen2_phy_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -238,6 +390,8 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev) struct resource *res; void __iomem *base; struct clk *clk; + const struct phy_ops *gen2_phy_ops = &rcar_gen2_phy_ops; + const u32 (*select_value)[PHYS_PER_CHANNEL] = pci_select_value; int i = 0; if (!dev->of_node) { @@ -266,6 +420,32 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev) drv->clk = clk; drv->base = base; + if (soc_device_match(soc_r8a77470)) { + clk = devm_clk_get(dev, "usb20_host"); + if (IS_ERR(clk)) { + dev_err(dev, "Can't get USB2.0 Host clock\n"); + return PTR_ERR(clk); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + if (pll_reg_base == NULL) { + pll_reg_base = devm_ioremap(dev, + USBHS_UGCTRL_PLL_RESET_REG, 4); + if (IS_ERR(pll_reg_base)) + return PTR_ERR(pll_reg_base); + atomic_set(&pll_reset_ref_cnt, 0); + } + + drv->host_clk = clk; + drv->host_base = base; + select_value = usb20_select_value; + gen2_phy_ops = &rz_g1c_phy_ops; + } + drv->num_channels = of_get_child_count(dev->of_node); drv->channels = devm_kcalloc(dev, drv->num_channels, sizeof(struct rcar_gen2_channel), @@ -297,7 +477,7 @@ static int rcar_gen2_phy_probe(struct platform_device *pdev) phy->select_value = select_value[channel_num][n]; phy->phy = devm_phy_create(dev, NULL, - &rcar_gen2_phy_ops); + gen2_phy_ops); if (IS_ERR(phy->phy)) { dev_err(dev, "Failed to create PHY\n"); return PTR_ERR(phy->phy); From patchwork Thu Oct 25 13:56:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655857 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 83D1714DE for ; Thu, 25 Oct 2018 14:04:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 728492B977 for ; Thu, 25 Oct 2018 14:04:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6484A2BA39; Thu, 25 Oct 2018 14:04:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 07F822B977 for ; Thu, 25 Oct 2018 14:04:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727607AbeJYWho (ORCPT ); Thu, 25 Oct 2018 18:37:44 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:51316 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhn (ORCPT ); Thu, 25 Oct 2018 18:37:43 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:48 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id C552886A0C; Thu, 25 Oct 2018 23:04:48 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044158" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:45 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Yoshihiro Shimoda , Chris Paterson , Fabrizio Castro Subject: [PATCH 3/7] ARM: dts: r8a77470: Add USB PHY DT support Date: Thu, 25 Oct 2018 14:56:55 +0100 Message-Id: <1540475819-47950-4-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the r8a77470 generic part of the USB PHY device node. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- This patch is tested against renesas-devel --- arch/arm/boot/dts/r8a77470.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 6ac7f46..7d20c3b 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -315,6 +315,44 @@ status = "disabled"; }; + usbphy0: usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6590100 0 0x100>, + <0 0xee080200 0 0x118>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; + clock-names = "usbhs", "usb20_host"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 704>, <&cpg 703>; + status = "disabled"; + + usb0: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + }; + + usbphy1: usb-phy@e6598100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6598100 0 0x100>, + <0 0xee0c0200 0 0x118>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 706>, <&cpg CPG_MOD 705>; + clock-names = "usbhs", "usb20_host"; + status = "disabled"; + resets = <&cpg 706>, <&cpg 705>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + + usb1: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a77470", "renesas,rcar-dmac"; From patchwork Thu Oct 25 13:56:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81EA414DE for ; Thu, 25 Oct 2018 14:04:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 720E22B977 for ; Thu, 25 Oct 2018 14:04:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6629E2BA39; Thu, 25 Oct 2018 14:04:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 17F9A2B977 for ; Thu, 25 Oct 2018 14:04:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727613AbeJYWhq (ORCPT ); Thu, 25 Oct 2018 18:37:46 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:51316 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhp (ORCPT ); Thu, 25 Oct 2018 18:37:45 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:51 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id AE96586A0E; Thu, 25 Oct 2018 23:04:51 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044160" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:48 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Yoshihiro Shimoda , Chris Paterson , Fabrizio Castro Subject: [PATCH 4/7] ARM: dts: iwg23s-sbc: Enable USB Phy[01] Date: Thu, 25 Oct 2018 14:56:56 +0100 Message-Id: <1540475819-47950-5-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable USB phy[01] on iWave iwg23s sbc based on RZ/G1C SoC. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- This patch is tested against renesas devel. --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index e5cfb50..157af7c 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -100,6 +100,16 @@ function = "sdhi2"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; }; &scif1 { @@ -134,3 +144,17 @@ sd-uhs-sdr50; status = "okay"; }; + +&usbphy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&usbphy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; From patchwork Thu Oct 25 13:56:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655861 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8DE9A13A4 for ; Thu, 25 Oct 2018 14:04:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D82C2B977 for ; Thu, 25 Oct 2018 14:04:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 720E52BA39; Thu, 25 Oct 2018 14:04:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1E7982B977 for ; Thu, 25 Oct 2018 14:04:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727614AbeJYWht (ORCPT ); Thu, 25 Oct 2018 18:37:49 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:51316 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWht (ORCPT ); Thu, 25 Oct 2018 18:37:49 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:54 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 9C5CA86A14; Thu, 25 Oct 2018 23:04:54 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044162" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:51 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Yoshihiro Shimoda , Chris Paterson , Fabrizio Castro Subject: [PATCH 5/7] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device nodes Date: Thu, 25 Oct 2018 14:56:57 +0100 Message-Id: <1540475819-47950-6-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the r8a77470 generic part of the USB2.0 Host Controller device nodes (ehci[01]/ohci[01]). Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- This patch is tested against renesas devel. --- arch/arm/boot/dts/r8a77470.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 7d20c3b..935b82b 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -528,6 +528,56 @@ status = "disabled"; }; + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb0 0>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ohci1: usb@ee0c0000 { + compatible = "generic-ohci"; + reg = <0 0xee0c0000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 705>; + phys = <&usb1 0>, <&usb0 1>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 705>; + status = "disabled"; + }; + + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb0 0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ehci1: usb@ee0c0100 { + compatible = "generic-ehci"; + reg = <0 0xee0c0100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 705>; + phys = <&usb1 0>, <&usb0 1>; + phy-names = "usb"; + companion = <&ohci1>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 705>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; From patchwork Thu Oct 25 13:56:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655863 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5609014DE for ; Thu, 25 Oct 2018 14:04:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44F0C2B977 for ; Thu, 25 Oct 2018 14:04:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 384B82BA39; Thu, 25 Oct 2018 14:04:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DFE7E2B977 for ; Thu, 25 Oct 2018 14:04:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727623AbeJYWhw (ORCPT ); Thu, 25 Oct 2018 18:37:52 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:51316 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhv (ORCPT ); Thu, 25 Oct 2018 18:37:51 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:57 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 877B486A15; Thu, 25 Oct 2018 23:04:57 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044163" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:54 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Yoshihiro Shimoda , Chris Paterson , Fabrizio Castro Subject: [PATCH 6/7] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host Date: Thu, 25 Oct 2018 14:56:58 +0100 Message-Id: <1540475819-47950-7-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable USB2.0 host on USB port1 of the iwg23s sbc. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- This patch is tested against renesas-devel. --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 157af7c..7aa7993e 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -73,10 +73,18 @@ }; }; +&ehci1 { + status = "okay"; +}; + &extal_clk { clock-frequency = <20000000>; }; +&ohci1 { + status = "okay"; +}; + &pfc { mmc_pins_uhs: mmc_uhs { groups = "mmc_data8", "mmc_ctrl"; From patchwork Thu Oct 25 13:56:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655865 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0529514DE for ; Thu, 25 Oct 2018 14:05:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7F332BA34 for ; Thu, 25 Oct 2018 14:05:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBD102BA54; Thu, 25 Oct 2018 14:05:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 804F82BA34 for ; Thu, 25 Oct 2018 14:05:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727627AbeJYWhy (ORCPT ); Thu, 25 Oct 2018 18:37:54 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:51316 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727625AbeJYWhy (ORCPT ); Thu, 25 Oct 2018 18:37:54 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:05:00 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 3E9BB86A16; Thu, 25 Oct 2018 23:05:00 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044164" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:57 +0900 From: Biju Das To: Simon Horman Cc: Biju Das , Magnus Damm , Russell King , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven , Yoshihiro Shimoda , Chris Paterson , Fabrizio Castro Subject: [PATCH 7/7] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig Date: Thu, 25 Oct 2018 14:56:59 +0100 Message-Id: <1540475819-47950-8-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM support in shmobile_defconfig. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- arch/arm/configs/shmobile_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index f8faf37..b0db52c 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -163,7 +163,9 @@ CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_R8A66597_HCD=y CONFIG_USB_RENESAS_USBHS=y CONFIG_USB_GADGET=y