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Tue, 15 Sep 2020 23:22:12 -0800 Received: from MTKMBS06N1.mediatek.inc (172.21.101.129) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Sep 2020 00:22:10 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Sep 2020 15:22:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 16 Sep 2020 15:22:07 +0800 From: Phil Chang To: Subject: [PATCH] [PATCH] ARM64: Setup DMA32 zone size by bootargs Date: Wed, 16 Sep 2020 15:22:06 +0800 Message-ID: <20200916072206.27499-1-phil.chang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200915150855.24825-1-phil.chang@mediatek.com> References: <20200915150855.24825-1-phil.chang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200916_032221_695148_FAD3705B X-CRM114-Status: GOOD ( 19.96 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Alix Wu , linux-doc@vger.kernel.org, Anshuman Khandual , Mauro Carvalho Chehab , Catalin Marinas , YJ Chiang , Jonathan Corbet , Phil Chang , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Will Deacon , Mike Rapoport Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org this patch allowing the DMA32 zone be configurable in ARM64. Signed-off-by: Alix Wu Signed-off-by: YJ Chiang Signed-off-by: Phil Chang --- For some devices, the main memory split into 2 part due to the memory architecture, the efficient and less inefficient part. One of the use case is fine-tune the dma32 size to contain all the efficient part of memory block on this kind of architecture .../admin-guide/kernel-parameters.txt | 3 +++ arch/arm64/include/asm/memory.h | 2 ++ arch/arm64/mm/init.c | 26 ++++++++++++++++++- 3 files changed, 30 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index bdc1f33fd3d1..ef3bc3d4931a 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -980,6 +980,9 @@ The filter can be disabled or changed to another driver later using sysfs. + dma32_size=nn[KMG] [KNL,BOOT,ARM64] + Forces the DMA32 zone size of in MB. + driver_async_probe= [KNL] List of driver names to be probed asynchronously. Format: ,... diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index afa722504bfd..710de08ae8ae 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -175,6 +175,8 @@ extern u64 kimage_vaddr; /* the offset between the kernel virtual and physical mappings */ extern u64 kimage_voffset; +extern phys_addr_t dma32_zone_size; + static inline unsigned long kaslr_offset(void) { return kimage_vaddr - KIMAGE_VADDR; diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 481d22c32a2e..fd1b85e131cc 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -60,6 +60,9 @@ EXPORT_SYMBOL(physvirt_offset); struct page *vmemmap __ro_after_init; EXPORT_SYMBOL(vmemmap); +phys_addr_t dma32_zone_size __ro_after_init; +EXPORT_SYMBOL(dma32_zone_size); + /* * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of * memory as some devices, namely the Raspberry Pi 4, have peripherals with @@ -189,7 +192,12 @@ static void __init reserve_elfcorehdr(void) static phys_addr_t __init max_zone_phys(unsigned int zone_bits) { phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits); - return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM()); + phys_addr_t zone_size = (1ULL << zone_bits); + + if (IS_ENABLED(CONFIG_ZONE_DMA32) && zone_bits == 32 && dma32_zone_size) + zone_size = min(zone_size, dma32_zone_size); + + return min(offset + zone_size, memblock_end_of_DRAM()); } static void __init zone_sizes_init(unsigned long min, unsigned long max) @@ -242,6 +250,22 @@ static int __init early_mem(char *p) } early_param("mem", early_mem); +static int __init setup_dma32_zone(char *p) +{ + unsigned long long size = memparse(p, NULL); + + /* DMA32 zone size should never grater than 4G */ + if (size > SZ_4G) + return -EINVAL; + + pr_notice("Setup dma32 zone size to %llu Mb\n", size >> 20); + dma32_zone_size = size; + + return 0; +} + +early_param("dma32_size", setup_dma32_zone); + static int __init early_init_dt_scan_usablemem(unsigned long node, const char *uname, int depth, void *data) {