From patchwork Thu Sep 17 16:25:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 11782873 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B67E8112E for ; Thu, 17 Sep 2020 16:27:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9ACF8206E6 for ; Thu, 17 Sep 2020 16:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728473AbgIQQ1W (ORCPT ); Thu, 17 Sep 2020 12:27:22 -0400 Received: from mga12.intel.com ([192.55.52.136]:44131 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728489AbgIQQ1K (ORCPT ); Thu, 17 Sep 2020 12:27:10 -0400 IronPort-SDR: /IzCwzGgBhaeJ3CK/BLkMuAN0zm1JoATbT6iQIsZnE+Kq5b3ysG+GagDLsuWJkjaj/REvqB3oI oenZiyIyfs8w== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="139236816" X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="139236816" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:52 -0700 IronPort-SDR: Tqt6xElPVuuu3GiK9gjdIs4YPpuzJ0od+KgP16vUnQ47N60aBz2mQTxLkfJzXETPNRyrHg8Vl1 yLQAjxebtzdQ== X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="332220053" Received: from mbair-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.181.111]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:52 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 01/10] PCI/RCEC: Add RCEC class code and extended capability Date: Thu, 17 Sep 2020 09:25:39 -0700 Message-Id: <20200917162548.2079894-2-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200917162548.2079894-1-sean.v.kelley@intel.com> References: <20200917162548.2079894-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo A PCIe Root Complex Event Collector(RCEC) has the base class 0x08, sub-class 0x07, and programming interface 0x00. Add the class code 0x0807 to identify RCEC devices and add the defines for the RCEC Endpoint Association Extended Capability. See PCI Express Base Specification, version 5.0-1, section "1.3.4 Root Complex Event Collector" and section "7.9.10 Root Complex Event Collector Endpoint Association Extended Capability" Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- include/linux/pci_ids.h | 1 + include/uapi/linux/pci_regs.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 1ab1e24bcbce..d8156a5dbee8 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -81,6 +81,7 @@ #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 #define PCI_CLASS_SYSTEM_SDHCI 0x0805 +#define PCI_CLASS_SYSTEM_RCEC 0x0807 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index f9701410d3b5..f335f65f65d6 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -828,6 +828,13 @@ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ #define PCI_EXT_CAP_PWR_SIZEOF 16 +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_RCIEP_BITMAP 4 /* Associated Bitmap for RCiEPs */ +#define PCI_RCEC_BUSN 8 /* RCEC Associated Bus Numbers */ +#define PCI_RCEC_BUSN_REG_VER 0x02 /* Least capability version that BUSN present */ +#define PCI_RCEC_BUSN_NEXT(x) (((x) >> 8) & 0xff) +#define PCI_RCEC_BUSN_LAST(x) (((x) >> 16) & 0xff) + /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */ #define PCI_VNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_VNDR_HEADER_ID(x) ((x) & 0xffff) From patchwork Thu Sep 17 16:25:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 11783357 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B2C7B59D for ; Thu, 17 Sep 2020 18:52:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A20B7221F1 for ; Thu, 17 Sep 2020 18:52:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726461AbgIQSuf (ORCPT ); Thu, 17 Sep 2020 14:50:35 -0400 Received: from mga12.intel.com ([192.55.52.136]:44131 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728492AbgIQQ0I (ORCPT ); Thu, 17 Sep 2020 12:26:08 -0400 IronPort-SDR: y5i1RZiLtO4fSH6QfJ+9RC1kM9EDDFEKW/otBoIuh7QREl7+/jGGa0hht1YHRRr5OtM+jh6O94 aqtYNk5peWJw== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="139236826" X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="139236826" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:53 -0700 IronPort-SDR: 0k1xPInU6rgCDmEvPvLU2jOB4Xdk5tZ65LZFNud3xGH0QyXj2ICv15p8lY5kw+aXyu/BJiuwoh 08f3zWinWaKA== X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="332220068" Received: from mbair-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.181.111]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:53 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v4 03/10] PCI/RCEC: Cache RCEC capabilities in pci_init_capabilities() Date: Thu, 17 Sep 2020 09:25:41 -0700 Message-Id: <20200917162548.2079894-4-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200917162548.2079894-1-sean.v.kelley@intel.com> References: <20200917162548.2079894-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Extend support for Root Complex Event Collectors by decoding and caching the RCEC Endpoint Association Extended Capabilities when enumerating. Use that cached information for later error source reporting. See PCI Express Base Specification, version 5.0-1, section 7.9.10. Suggested-by: Bjorn Helgaas Co-developed-by: Qiuxu Zhuo Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley --- drivers/pci/pci.h | 18 ++++++++++++++ drivers/pci/pcie/Makefile | 2 +- drivers/pci/pcie/rcec.c | 52 +++++++++++++++++++++++++++++++++++++++ drivers/pci/probe.c | 3 ++- include/linux/pci.h | 4 +++ 5 files changed, 77 insertions(+), 2 deletions(-) create mode 100644 drivers/pci/pcie/rcec.c diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index fa12f7cbc1a0..83670a6425d8 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -449,6 +449,16 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info); void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); #endif /* CONFIG_PCIEAER */ +#ifdef CONFIG_PCIEPORTBUS +/* Cached RCEC Associated Endpoint Extended Capabilities */ +struct rcec_ext { + u8 ver; + u8 nextbusn; + u8 lastbusn; + u32 bitmap; +}; +#endif + #ifdef CONFIG_PCIE_DPC void pci_save_dpc_state(struct pci_dev *dev); void pci_restore_dpc_state(struct pci_dev *dev); @@ -461,6 +471,14 @@ static inline void pci_restore_dpc_state(struct pci_dev *dev) {} static inline void pci_dpc_init(struct pci_dev *pdev) {} #endif +#ifdef CONFIG_PCIEPORTBUS +void pci_rcec_init(struct pci_dev *dev); +void pci_rcec_exit(struct pci_dev *dev); +#else +static inline void pci_rcec_init(struct pci_dev *dev) {} +static inline void pci_rcec_exit(struct pci_dev *dev) {} +#endif + #ifdef CONFIG_PCI_ATS /* Address Translation Service */ void pci_ats_init(struct pci_dev *dev); diff --git a/drivers/pci/pcie/Makefile b/drivers/pci/pcie/Makefile index 68da9280ff11..d9697892fa3e 100644 --- a/drivers/pci/pcie/Makefile +++ b/drivers/pci/pcie/Makefile @@ -2,7 +2,7 @@ # # Makefile for PCI Express features and port driver -pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o +pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o rcec.o obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o diff --git a/drivers/pci/pcie/rcec.c b/drivers/pci/pcie/rcec.c new file mode 100644 index 000000000000..519ae086ff41 --- /dev/null +++ b/drivers/pci/pcie/rcec.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Root Complex Event Collector Support + * + * Authors: + * Sean V Kelley + * Qiuxu Zhuo + * + * Copyright (C) 2020 Intel Corp. + */ + +#include +#include +#include +#include +#include + +#include "../pci.h" + +void pci_rcec_init(struct pci_dev *dev) +{ + u32 rcec, hdr, busn; + + /* Only for Root Complex Event Collectors */ + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) + return; + + dev->rcec_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_RCEC); + if (!dev->rcec_cap) + return; + + dev->rcec_ext = kzalloc(sizeof(*dev->rcec_ext), GFP_KERNEL); + + rcec = dev->rcec_cap; + pci_read_config_dword(dev, rcec + PCI_RCEC_RCIEP_BITMAP, &dev->rcec_ext->bitmap); + + /* Check whether RCEC BUSN register is present */ + pci_read_config_dword(dev, rcec, &hdr); + dev->rcec_ext->ver = PCI_EXT_CAP_VER(hdr); + if (dev->rcec_ext->ver < PCI_RCEC_BUSN_REG_VER) + return; + + pci_read_config_dword(dev, rcec + PCI_RCEC_BUSN, &busn); + dev->rcec_ext->nextbusn = PCI_RCEC_BUSN_NEXT(busn); + dev->rcec_ext->lastbusn = PCI_RCEC_BUSN_LAST(busn); +} + +void pci_rcec_exit(struct pci_dev *dev) +{ + kfree(dev->rcec_ext); + dev->rcec_ext = NULL; +} diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 03d37128a24f..16bc651fecb7 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2201,6 +2201,7 @@ static void pci_configure_device(struct pci_dev *dev) static void pci_release_capabilities(struct pci_dev *dev) { pci_aer_exit(dev); + pci_rcec_exit(dev); pci_vpd_release(dev); pci_iov_release(dev); pci_free_cap_save_buffers(dev); @@ -2400,7 +2401,7 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_ptm_init(dev); /* Precision Time Measurement */ pci_aer_init(dev); /* Advanced Error Reporting */ pci_dpc_init(dev); /* Downstream Port Containment */ - + pci_rcec_init(dev); /* Root Complex Event Collector */ pcie_report_downtraining(dev); if (pci_probe_reset_function(dev) == 0) diff --git a/include/linux/pci.h b/include/linux/pci.h index 835530605c0d..5c5c4eb642b6 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -326,6 +326,10 @@ struct pci_dev { #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */ +#endif +#ifdef CONFIG_PCIEPORTBUS + u16 rcec_cap; /* RCEC capability offset */ + struct rcec_ext *rcec_ext; /* RCEC cached assoc. endpoint extended capabilities */ #endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ From patchwork Thu Sep 17 16:25:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 11782875 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 07E67112E for ; Thu, 17 Sep 2020 16:27:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF34B20795 for ; Thu, 17 Sep 2020 16:27:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728495AbgIQQ10 (ORCPT ); Thu, 17 Sep 2020 12:27:26 -0400 Received: from mga12.intel.com ([192.55.52.136]:44131 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728462AbgIQQ1S (ORCPT ); Thu, 17 Sep 2020 12:27:18 -0400 IronPort-SDR: 8kqIn/5D+96oYI6vecgaLXNRA0slqDESHigs+TG/fe/vgkJ8BV1zpAR0AVxChb3ifeSFJwv2Lh HjtsFNx5FkmA== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="139236831" X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="139236831" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:54 -0700 IronPort-SDR: WawaegHppG7HBPxkZ8sCyMKkz+tOb0BP1EkUOVj8hKYCRcUF2dwAV1mAqGqZRobWKyyoSnKUr6 jhFJevZRuV8w== X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="332220082" Received: from mbair-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.181.111]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:54 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 05/10] PCI/AER: Apply function level reset to RCiEP on fatal error Date: Thu, 17 Sep 2020 09:25:43 -0700 Message-Id: <20200917162548.2079894-6-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200917162548.2079894-1-sean.v.kelley@intel.com> References: <20200917162548.2079894-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo Attempt to do function level reset for an RCiEP associated with an RCEC device on fatal error. Signed-off-by: Qiuxu Zhuo --- drivers/pci/pcie/err.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index e575fa6cee63..5380ecc41506 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -169,6 +169,17 @@ static void pci_bridge_walk(struct pci_dev *bridge, int (*cb)(struct pci_dev *, cb(bridge, userdata); } +static pci_ers_result_t flr_on_rciep(struct pci_dev *dev) +{ + if (!pcie_has_flr(dev)) + return PCI_ERS_RESULT_NONE; + + if (pcie_flr(dev)) + return PCI_ERS_RESULT_DISCONNECT; + + return PCI_ERS_RESULT_RECOVERED; +} + pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_channel_state_t state, pci_ers_result_t (*reset_subordinate_devices)(struct pci_dev *pdev)) @@ -195,15 +206,17 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, if (state == pci_channel_io_frozen) { pci_bridge_walk(bridge, report_frozen_detected, &status); if (type == PCI_EXP_TYPE_RC_END) { - pci_warn(dev, "link reset not possible for RCiEP\n"); - status = PCI_ERS_RESULT_NONE; - goto failed; - } - - status = reset_subordinate_devices(bridge); - if (status != PCI_ERS_RESULT_RECOVERED) { - pci_warn(dev, "subordinate device reset failed\n"); - goto failed; + status = flr_on_rciep(dev); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "function level reset failed\n"); + goto failed; + } + } else { + status = reset_subordinate_devices(bridge); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "subordinate device reset failed\n"); + goto failed; + } } } else { pci_bridge_walk(bridge, report_normal_detected, &status); From patchwork Thu Sep 17 16:25:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 11782867 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 58C4B112E for ; Thu, 17 Sep 2020 16:26:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 43031206E6 for ; Thu, 17 Sep 2020 16:26:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728243AbgIQQ0M (ORCPT ); Thu, 17 Sep 2020 12:26:12 -0400 Received: from mga12.intel.com ([192.55.52.136]:44123 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728289AbgIQQ0G (ORCPT ); Thu, 17 Sep 2020 12:26:06 -0400 IronPort-SDR: /AOfkmkpKzhvQBjjaA0bN0rTqoMj6wPko9jZ2hHa3Upe5ieJnc4kJd8DoQrsUrPRUZPpZI9zEq UOkvhCqfh2PA== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="139236833" X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="139236833" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:55 -0700 IronPort-SDR: TilMI6Mp66XxDmfAUrpgFMT4WUskqJ60h7fLIZa+8col0rQbCKWG+/dz9HzWuzjxyfe6UoFc97 mhE2/6B3ezAg== X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="332220094" Received: from mbair-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.181.111]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:55 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v4 07/10] PCI/RCEC: Add RCiEP's linked RCEC to AER/ERR Date: Thu, 17 Sep 2020 09:25:45 -0700 Message-Id: <20200917162548.2079894-8-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200917162548.2079894-1-sean.v.kelley@intel.com> References: <20200917162548.2079894-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo When attempting error recovery for an RCiEP associated with an RCEC device, there needs to be a way to update the Root Error Status, the Uncorrectable Error Status and the Uncorrectable Error Severity of the parent RCEC. In some non-native cases in which there is no OS visible device associated with the RCiEP, there is nothing to act upon as the firmware is acting before the OS. So add handling for the linked 'rcec' in AER/ERR while taking into account non-native cases. Co-developed-by: Sean V Kelley Signed-off-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo --- drivers/pci/pcie/aer.c | 9 +++++---- drivers/pci/pcie/err.c | 38 ++++++++++++++++++++++++-------------- 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 65dff5f3457a..dccdba60b5d9 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1358,17 +1358,18 @@ static int aer_probe(struct pcie_device *dev) static pci_ers_result_t aer_root_reset(struct pci_dev *dev) { int aer = dev->aer_cap; + int rc = 0; u32 reg32; - int rc; - /* Disable Root's interrupt in response to error messages */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, ®32); reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32); - rc = pci_bus_error_reset(dev); - pci_info(dev, "Root Port link has been reset\n"); + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) { + rc = pci_bus_error_reset(dev); + pci_info(dev, "Root Port link has been reset\n"); + } /* Clear Root Error Status */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, ®32); diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index 5380ecc41506..a61a2518163a 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -149,7 +149,8 @@ static int report_resume(struct pci_dev *dev, void *data) /** * pci_bridge_walk - walk bridges potentially AER affected * @bridge bridge which may be an RCEC with associated RCiEPs, - * an RCiEP associated with an RCEC, or a Port. + * or a Port. + * @dev an RCiEP lacking an associated RCEC. * @cb callback to be called for each device found * @userdata arbitrary pointer to be passed to callback. * @@ -160,13 +161,16 @@ static int report_resume(struct pci_dev *dev, void *data) * If the device provided has no subordinate bus, call the provided * callback on the device itself. */ -static void pci_bridge_walk(struct pci_dev *bridge, int (*cb)(struct pci_dev *, void *), +static void pci_bridge_walk(struct pci_dev *bridge, struct pci_dev *dev, + int (*cb)(struct pci_dev *, void *), void *userdata) { - if (bridge->subordinate) + if (bridge && bridge->subordinate) pci_walk_bus(bridge->subordinate, cb, userdata); - else + else if (bridge) cb(bridge, userdata); + else + cb(dev, userdata); } static pci_ers_result_t flr_on_rciep(struct pci_dev *dev) @@ -196,16 +200,24 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, type = pci_pcie_type(dev); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM || - type == PCI_EXP_TYPE_RC_EC || - type == PCI_EXP_TYPE_RC_END) + type == PCI_EXP_TYPE_RC_EC) bridge = dev; + else if (type == PCI_EXP_TYPE_RC_END) + bridge = dev->rcec; else bridge = pci_upstream_bridge(dev); pci_dbg(dev, "broadcast error_detected message\n"); if (state == pci_channel_io_frozen) { - pci_bridge_walk(bridge, report_frozen_detected, &status); + pci_bridge_walk(bridge, dev, report_frozen_detected, &status); if (type == PCI_EXP_TYPE_RC_END) { + /* + * The callback only clears the Root Error Status + * of the RCEC (see aer.c). + */ + if (bridge) + reset_subordinate_devices(bridge); + status = flr_on_rciep(dev); if (status != PCI_ERS_RESULT_RECOVERED) { pci_warn(dev, "function level reset failed\n"); @@ -219,13 +231,13 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, } } } else { - pci_bridge_walk(bridge, report_normal_detected, &status); + pci_bridge_walk(bridge, dev, report_normal_detected, &status); } if (status == PCI_ERS_RESULT_CAN_RECOVER) { status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast mmio_enabled message\n"); - pci_bridge_walk(bridge, report_mmio_enabled, &status); + pci_bridge_walk(bridge, dev, report_mmio_enabled, &status); } if (status == PCI_ERS_RESULT_NEED_RESET) { @@ -236,18 +248,16 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, */ status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast slot_reset message\n"); - pci_bridge_walk(bridge, report_slot_reset, &status); + pci_bridge_walk(bridge, dev, report_slot_reset, &status); } if (status != PCI_ERS_RESULT_RECOVERED) goto failed; pci_dbg(dev, "broadcast resume message\n"); - pci_bridge_walk(bridge, report_resume, &status); + pci_bridge_walk(bridge, dev, report_resume, &status); - if (type == PCI_EXP_TYPE_ROOT_PORT || - type == PCI_EXP_TYPE_DOWNSTREAM || - type == PCI_EXP_TYPE_RC_EC) { + if (bridge) { if (pcie_aer_is_native(bridge)) pcie_clear_device_status(bridge); pci_aer_clear_nonfatal_status(bridge); From patchwork Thu Sep 17 16:25:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 11783355 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BDBFC6CA for ; Thu, 17 Sep 2020 18:52:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AE404221EE for ; Thu, 17 Sep 2020 18:52:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726466AbgIQSuf (ORCPT ); Thu, 17 Sep 2020 14:50:35 -0400 Received: from mga12.intel.com ([192.55.52.136]:44123 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728319AbgIQQ0I (ORCPT ); Thu, 17 Sep 2020 12:26:08 -0400 IronPort-SDR: 24kYRhgYuhRfLqyohE3rSM8+AZB96+IShqgCvcoYHmbezHzyuKmaDu1JSS2GbWQy69rIuPS2Ad KqFSYafoRDzw== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="139236837" X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="139236837" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:56 -0700 IronPort-SDR: 1eMycD69EG6Z5h8/eRzY3Ne3dDxoX/t/jWNX958WBDT/wwectLmeeL57T28MqnXohJMJ7cr32d MZ8YWIdNV3XA== X-IronPort-AV: E=Sophos;i="5.77,271,1596524400"; d="scan'208";a="332220103" Received: from mbair-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.181.111]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2020 09:25:56 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v4 09/10] PCI/PME: Add pcie_walk_rcec() to RCEC PME handling Date: Thu, 17 Sep 2020 09:25:47 -0700 Message-Id: <20200917162548.2079894-10-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200917162548.2079894-1-sean.v.kelley@intel.com> References: <20200917162548.2079894-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Root Complex Event Collectors(RCEC) appear as peers of Root Ports and also have the PME capability. As with AER, there is a need to be able to walk the RCiEPs associated with their RCEC for purposes of acting upon them with callbacks. So add RCEC support through the use of pcie_walk_rcec() to the current PME service driver and attach the PME service driver to the RCEC device. Co-developed-by: Qiuxu Zhuo Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/pme.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c index 6a32970bb731..87799166c96a 100644 --- a/drivers/pci/pcie/pme.c +++ b/drivers/pci/pcie/pme.c @@ -310,7 +310,10 @@ static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign) static void pcie_pme_mark_devices(struct pci_dev *port) { pcie_pme_can_wakeup(port, NULL); - if (port->subordinate) + + if (pci_pcie_type(port) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(port, pcie_pme_can_wakeup, NULL); + else if (port->subordinate) pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL); } @@ -320,10 +323,15 @@ static void pcie_pme_mark_devices(struct pci_dev *port) */ static int pcie_pme_probe(struct pcie_device *srv) { - struct pci_dev *port; + struct pci_dev *port = srv->port; struct pcie_pme_service_data *data; int ret; + /* Limit to Root Ports or Root Complex Event Collectors */ + if ((pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC) && + (pci_pcie_type(port) != PCI_EXP_TYPE_ROOT_PORT)) + return -ENODEV; + data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; @@ -333,7 +341,6 @@ static int pcie_pme_probe(struct pcie_device *srv) data->srv = srv; set_service_data(srv, data); - port = srv->port; pcie_pme_interrupt_enable(port, false); pcie_clear_root_pme_status(port); @@ -445,7 +452,7 @@ static void pcie_pme_remove(struct pcie_device *srv) static struct pcie_port_service_driver pcie_pme_driver = { .name = "pcie_pme", - .port_type = PCI_EXP_TYPE_ROOT_PORT, + .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_PME, .probe = pcie_pme_probe,