From patchwork Fri Sep 18 08:31:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ikjoon Jang X-Patchwork-Id: 11784315 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B7C4746 for ; Fri, 18 Sep 2020 08:31:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5EC852311C for ; Fri, 18 Sep 2020 08:31:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="ho/WCQgs" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726707AbgIRIbf (ORCPT ); Fri, 18 Sep 2020 04:31:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726705AbgIRIbe (ORCPT ); Fri, 18 Sep 2020 04:31:34 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AB3CC061788 for ; Fri, 18 Sep 2020 01:31:34 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id r19so2633899pls.1 for ; Fri, 18 Sep 2020 01:31:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CvN8pxwgE7chvCn8eA4GpYEwznUZIJ/VvKJ2b3Qxwd4=; b=ho/WCQgsyP2T8AA27LL0ARkfh0DQbo2WgLWH5gjFVNaznwRwo+t+ptG595Pu6YLKGw qhehK+iBJs4G/tcDQjcXcOnFdqIanY7E/JPg24pUtibT4vfys6d71/FmGjVFn0E0Mzgh hpmCCmwd6/MU0P3i5PsfOmM00Dv5mJszaEVeg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CvN8pxwgE7chvCn8eA4GpYEwznUZIJ/VvKJ2b3Qxwd4=; b=YbwKQh5tTSHIoD3MkOfOkByK4uIPdlNZAcSGD0jhBMDm23Q06qrKV3Fo4EPf04lACL AlNc74PVzVcm7dWjkyC5yuDJXYvqJyLYM+eRKRxP5tMpdX6kvTB5B9Emty1ZDafTjAGJ G6ZbXGZc3c3C0QIqfKmq0BiHTVU1UOGP9G2SzWN5m+t45M4wia8up0ya/cngkMV+2jaA Xi9ooUtjbKw7Iq+OXdqEEwY64N1+FoErdqFaO1CMGq09x7V0ndio4PIru5g6e+6eGWiJ hJMIAruSTc8i4cOHQamH1gjv9UVi+deOIo3Y6Fng7u3tOtz0Ow/iskVx4YahM9TiRiB3 yFZQ== X-Gm-Message-State: AOAM530HyhqPqAvWxN2roomT54sTArZu6ljSX/lUKiNXNYus4bZwODpw /XUwPQojgwvtQKFwa/LPxEr40A== X-Google-Smtp-Source: ABdhPJyawkWvCG6/EAZZzyOFtimPgIC4x1PEVJj+jcavaFIrRX3LyKeVJ3w44lldJhWt/SyimTAQ2w== X-Received: by 2002:a17:90a:764d:: with SMTP id s13mr12124753pjl.58.1600417893754; Fri, 18 Sep 2020 01:31:33 -0700 (PDT) Received: from ikjn-p920.tpe.corp.google.com ([2401:fa00:1:10:f693:9fff:fef4:a8fc]) by smtp.gmail.com with ESMTPSA id g206sm2193172pfb.178.2020.09.18.01.31.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 01:31:33 -0700 (PDT) From: Ikjoon Jang To: Rob Herring , Mark Brown , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Cc: Ikjoon Jang , Bayi Cheng , Chuanhong Guo , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/5] dt-bindings: spi: add mt8192-nor compatible string Date: Fri, 18 Sep 2020 16:31:19 +0800 Message-Id: <20200918162834.v2.1.I4cd089ef1fe576535c6b6e4f1778eaab1c4441cf@changeid> X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog In-Reply-To: <20200918083124.3921207-1-ikjn@chromium.org> References: <20200918083124.3921207-1-ikjn@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add compatible string for mt8192 SoC. Signed-off-by: Ikjoon Jang Acked-by: Rob Herring --- (no changes since v1) Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml index 42c9205ac991..55c239446a5b 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml @@ -30,6 +30,7 @@ properties: - mediatek,mt7622-nor - mediatek,mt7623-nor - mediatek,mt7629-nor + - mediatek,mt8192-nor - enum: - mediatek,mt8173-nor - items: From patchwork Fri Sep 18 08:31:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ikjoon Jang X-Patchwork-Id: 11784313 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02B3A59D for ; Fri, 18 Sep 2020 08:31:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CAF4620789 for ; Fri, 18 Sep 2020 08:31:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="gIWNzXXI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726720AbgIRIbh (ORCPT ); Fri, 18 Sep 2020 04:31:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726688AbgIRIbg (ORCPT ); Fri, 18 Sep 2020 04:31:36 -0400 Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A409C061788 for ; Fri, 18 Sep 2020 01:31:36 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id j34so3044852pgi.7 for ; Fri, 18 Sep 2020 01:31:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PtgT8oGdi7tJWYrZylWP5X+Qu5mtWrTjssOMjWBLBio=; b=gIWNzXXI/65W9lRuW4rM4ZuoKImgBcadG9k1ZTZdlozcVR0w6y7VHSw5ovnfxV+y4s me4YUC5KA0N/CovI2zxVtNEXpQ8aXA1C+c8tsuTUo/mPKvhbcVunwTsO8sq35KVqV2wP tRlaD2cHR/DshX6cxwuMkOhzPkx4cdjcbJxpY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PtgT8oGdi7tJWYrZylWP5X+Qu5mtWrTjssOMjWBLBio=; b=sXRcQLBlmTeU6lNrxfAOH/BrWFKU1NUdbWywBKoANADwEdVjXFpdQo8DAu5/r++Bhd pFilfIjBV2JRySCWxvbRPO6X0lreFEw+p2SYn/x2AqEUsf9cCCuRhbv9IclWNDQVvcZy eAq4GyREaUyRoB8KJ9JXRQMxQjHWaxrSpKx5rRNSF6hWUD4QjZ1FNFUSntWAEsOGJG+i yZV38xxNUNIgusBBU/XEmKWwZbuJnhdlYidK7ZkIJHh4NfLyjXoAH70ZgCq4bnPbFgem JId8kISxL0/UOhKFMY09PcLPeuKpLQeKJliC8gmXwTqQzuEf7EKbSKnXoqFtVQ3JFoGt oNKQ== X-Gm-Message-State: AOAM530ww8x8yfY/AL31qK1xLgmLNwmKmLb1nw4nHbpYWvw3i7AKKaro fKE6a2ajOG9NjTPz3n8gBgMZLg== X-Google-Smtp-Source: ABdhPJylLeVr7aTAeXl/TquJqTgllezEHHoyI6zJ5/+F2fB1EMgD/15lCBC8Kt+Lo/SC0WxayecFLQ== X-Received: by 2002:aa7:934e:0:b029:13f:d056:593 with SMTP id 14-20020aa7934e0000b029013fd0560593mr25187131pfn.15.1600417896081; Fri, 18 Sep 2020 01:31:36 -0700 (PDT) Received: from ikjn-p920.tpe.corp.google.com ([2401:fa00:1:10:f693:9fff:fef4:a8fc]) by smtp.gmail.com with ESMTPSA id g206sm2193172pfb.178.2020.09.18.01.31.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 01:31:35 -0700 (PDT) From: Ikjoon Jang To: Rob Herring , Mark Brown , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Cc: Ikjoon Jang , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/5] spi: spi-mtk-nor: fix mishandled logics in checking SPI memory operation Date: Fri, 18 Sep 2020 16:31:20 +0800 Message-Id: <20200918162834.v2.2.I3de2918f09b817cc2ae6d324f1ece62779ecc7cf@changeid> X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog In-Reply-To: <20200918083124.3921207-1-ikjn@chromium.org> References: <20200918083124.3921207-1-ikjn@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Fix a simple bug which can limits its transfer size, and add a simple helper function for code cleanups. Fixes: a59b2c7c56bf ("spi: spi-mtk-nor: support standard spi properties") Signed-off-by: Ikjoon Jang --- (no changes since v1) drivers/spi/spi-mtk-nor.c | 62 ++++++++++++++++++++++++--------------- 1 file changed, 38 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index 6e6ca2b8e6c8..54b2c0fde95b 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -167,52 +167,63 @@ static bool mtk_nor_match_read(const struct spi_mem_op *op) return false; } -static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +static bool need_bounce(void *cpu_addr, unsigned long len) { - size_t len; + return !!(((uintptr_t)cpu_addr) & MTK_NOR_DMA_ALIGN_MASK); +} +static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ if (!op->data.nbytes) return 0; if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { - if ((op->data.dir == SPI_MEM_DATA_IN) && - mtk_nor_match_read(op)) { + switch (op->data.dir) { + case SPI_MEM_DATA_IN: + if (!mtk_nor_match_read(op)) + return -EINVAL; + /* check if it's DMAable */ if ((op->addr.val & MTK_NOR_DMA_ALIGN_MASK) || - (op->data.nbytes < MTK_NOR_DMA_ALIGN)) + (op->data.nbytes < MTK_NOR_DMA_ALIGN)) { op->data.nbytes = 1; - else if (!((ulong)(op->data.buf.in) & - MTK_NOR_DMA_ALIGN_MASK)) + } else { + if (need_bounce(op->data.buf.in, op->data.nbytes) && + (op->data.nbytes > MTK_NOR_BOUNCE_BUF_SIZE)) + op->data.nbytes = MTK_NOR_BOUNCE_BUF_SIZE; op->data.nbytes &= ~MTK_NOR_DMA_ALIGN_MASK; - else if (op->data.nbytes > MTK_NOR_BOUNCE_BUF_SIZE) - op->data.nbytes = MTK_NOR_BOUNCE_BUF_SIZE; - return 0; - } else if (op->data.dir == SPI_MEM_DATA_OUT) { + } + break; + case SPI_MEM_DATA_OUT: if (op->data.nbytes >= MTK_NOR_PP_SIZE) op->data.nbytes = MTK_NOR_PP_SIZE; else op->data.nbytes = 1; - return 0; + break; + default: + break; } + } else { + u8 len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; + + if (len > MTK_NOR_PRG_MAX_SIZE) + return -EINVAL; + if (op->data.nbytes && !(MTK_NOR_PRG_MAX_SIZE - len)) + return -EINVAL; + if (op->data.nbytes > (MTK_NOR_PRG_MAX_SIZE - len)) + op->data.nbytes = MTK_NOR_PRG_MAX_SIZE - len; } - len = MTK_NOR_PRG_MAX_SIZE - op->cmd.nbytes - op->addr.nbytes - - op->dummy.nbytes; - if (op->data.nbytes > len) - op->data.nbytes = len; - return 0; } static bool mtk_nor_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { - size_t len; - if (op->cmd.buswidth != 1) return false; if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { - switch(op->data.dir) { + switch (op->data.dir) { case SPI_MEM_DATA_IN: if (!mtk_nor_match_read(op)) return false; @@ -226,11 +237,14 @@ static bool mtk_nor_supports_op(struct spi_mem *mem, default: break; } + } else { + u8 len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; + + if (len > MTK_NOR_PRG_MAX_SIZE) + return false; + if (op->data.nbytes && !(MTK_NOR_PRG_MAX_SIZE - len)) + return false; } - len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; - if ((len > MTK_NOR_PRG_MAX_SIZE) || - ((op->data.nbytes) && (len == MTK_NOR_PRG_MAX_SIZE))) - return false; return spi_mem_default_supports_op(mem, op); } From patchwork Fri Sep 18 08:31:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ikjoon Jang X-Patchwork-Id: 11784321 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 64D2A746 for ; Fri, 18 Sep 2020 08:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3C69B20789 for ; Fri, 18 Sep 2020 08:31:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="aKWzQy2E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726748AbgIRIbo (ORCPT ); Fri, 18 Sep 2020 04:31:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726736AbgIRIbj (ORCPT ); Fri, 18 Sep 2020 04:31:39 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD5FBC061788 for ; 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Fri, 18 Sep 2020 01:31:38 -0700 (PDT) Received: from ikjn-p920.tpe.corp.google.com ([2401:fa00:1:10:f693:9fff:fef4:a8fc]) by smtp.gmail.com with ESMTPSA id g206sm2193172pfb.178.2020.09.18.01.31.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 01:31:37 -0700 (PDT) From: Ikjoon Jang To: Rob Herring , Mark Brown , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Cc: Ikjoon Jang , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 3/5] spi: spi-mtk-nor: use dma_alloc_coherent() for bounce buffer Date: Fri, 18 Sep 2020 16:31:21 +0800 Message-Id: <20200918162834.v2.3.I06cb65401ab5ad63ea30c4788d26633928d80f38@changeid> X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog In-Reply-To: <20200918083124.3921207-1-ikjn@chromium.org> References: <20200918083124.3921207-1-ikjn@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Use dma_alloc_coherent() for bounce buffer instead of kmalloc. Signed-off-by: Ikjoon Jang --- (no changes since v1) drivers/spi/spi-mtk-nor.c | 60 +++++++++++++++++++++++---------------- 1 file changed, 35 insertions(+), 25 deletions(-) diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index 54b2c0fde95b..e14798a6e7d0 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -96,6 +96,7 @@ struct mtk_nor { struct device *dev; void __iomem *base; u8 *buffer; + dma_addr_t buffer_dma; struct clk *spi_clk; struct clk *ctlr_clk; unsigned int spi_freq; @@ -275,19 +276,16 @@ static void mtk_nor_setup_bus(struct mtk_nor *sp, const struct spi_mem_op *op) mtk_nor_rmw(sp, MTK_NOR_REG_BUSCFG, reg, MTK_NOR_BUS_MODE_MASK); } -static int mtk_nor_read_dma(struct mtk_nor *sp, u32 from, unsigned int length, - u8 *buffer) +static int read_dma(struct mtk_nor *sp, u32 from, unsigned int length, + dma_addr_t dma_addr) { int ret = 0; ulong delay; u32 reg; - dma_addr_t dma_addr; - dma_addr = dma_map_single(sp->dev, buffer, length, DMA_FROM_DEVICE); - if (dma_mapping_error(sp->dev, dma_addr)) { - dev_err(sp->dev, "failed to map dma buffer.\n"); + if (WARN_ON((length & MTK_NOR_DMA_ALIGN_MASK) || + (dma_addr & MTK_NOR_DMA_ALIGN_MASK))) return -EINVAL; - } writel(from, sp->base + MTK_NOR_REG_DMA_FADR); writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR); @@ -312,30 +310,39 @@ static int mtk_nor_read_dma(struct mtk_nor *sp, u32 from, unsigned int length, (delay + 1) * 100); } - dma_unmap_single(sp->dev, dma_addr, length, DMA_FROM_DEVICE); if (ret < 0) dev_err(sp->dev, "dma read timeout.\n"); return ret; } -static int mtk_nor_read_bounce(struct mtk_nor *sp, u32 from, - unsigned int length, u8 *buffer) +static int mtk_nor_read_dma(struct mtk_nor *sp, u32 from, + unsigned int length, u8 *buffer) { - unsigned int rdlen; int ret; + dma_addr_t dma_addr; + bool bounce = need_bounce(buffer, length); - if (length & MTK_NOR_DMA_ALIGN_MASK) - rdlen = (length + MTK_NOR_DMA_ALIGN) & ~MTK_NOR_DMA_ALIGN_MASK; - else - rdlen = length; + if (!bounce) { + dma_addr = dma_map_single(sp->dev, buffer, length, + DMA_FROM_DEVICE); + if (dma_mapping_error(sp->dev, dma_addr)) { + dev_err(sp->dev, "failed to map dma buffer.\n"); + return -EINVAL; + } + } else { + dma_addr = sp->buffer_dma; + } - ret = mtk_nor_read_dma(sp, from, rdlen, sp->buffer); - if (ret) - return ret; + ret = read_dma(sp, from, length, dma_addr); - memcpy(buffer, sp->buffer, length); - return 0; + if (!bounce) + dma_unmap_single(sp->dev, dma_addr, length, + DMA_FROM_DEVICE); + else + memcpy(buffer, sp->buffer, length); + + return ret; } static int mtk_nor_read_pio(struct mtk_nor *sp, const struct spi_mem_op *op) @@ -439,11 +446,6 @@ static int mtk_nor_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) if (op->data.nbytes == 1) { mtk_nor_set_addr(sp, op); return mtk_nor_read_pio(sp, op); - } else if (((ulong)(op->data.buf.in) & - MTK_NOR_DMA_ALIGN_MASK)) { - return mtk_nor_read_bounce(sp, op->addr.val, - op->data.nbytes, - op->data.buf.in); } else { return mtk_nor_read_dma(sp, op->addr.val, op->data.nbytes, @@ -654,6 +656,10 @@ static int mtk_nor_probe(struct platform_device *pdev) sp->dev = &pdev->dev; sp->spi_clk = spi_clk; sp->ctlr_clk = ctlr_clk; + sp->buffer = dma_alloc_coherent(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE, + &sp->buffer_dma, GFP_KERNEL); + if (!sp->buffer) + return -ENOMEM; irq = platform_get_irq_optional(pdev, 0); if (irq < 0) { @@ -674,6 +680,8 @@ static int mtk_nor_probe(struct platform_device *pdev) ret = mtk_nor_init(sp); if (ret < 0) { kfree(ctlr); + dma_free_coherent(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE, + sp->buffer, sp->buffer_dma); return ret; } @@ -692,6 +700,8 @@ static int mtk_nor_remove(struct platform_device *pdev) mtk_nor_disable_clk(sp); + dma_free_coherent(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE, + sp->buffer, sp->buffer_dma); return 0; } From patchwork Fri Sep 18 08:31:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ikjoon Jang X-Patchwork-Id: 11784317 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5191C59D for ; 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Fri, 18 Sep 2020 01:31:40 -0700 (PDT) Received: from ikjn-p920.tpe.corp.google.com ([2401:fa00:1:10:f693:9fff:fef4:a8fc]) by smtp.gmail.com with ESMTPSA id g206sm2193172pfb.178.2020.09.18.01.31.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 01:31:40 -0700 (PDT) From: Ikjoon Jang To: Rob Herring , Mark Brown , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Cc: Ikjoon Jang , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 4/5] spi: spi-mtk-nor: support 36bit dma addressing to mediatek Date: Fri, 18 Sep 2020 16:31:22 +0800 Message-Id: <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog In-Reply-To: <20200918083124.3921207-1-ikjn@chromium.org> References: <20200918083124.3921207-1-ikjn@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This patch enables 36bit dma address support to spi-mtk-nor. Currently 36bit dma addressing is enabled only for mt8192-nor. Signed-off-by: Ikjoon Jang --- (no changes since v1) drivers/spi/spi-mtk-nor.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index e14798a6e7d0..99dd5dca744e 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -78,6 +78,8 @@ #define MTK_NOR_REG_DMA_FADR 0x71c #define MTK_NOR_REG_DMA_DADR 0x720 #define MTK_NOR_REG_DMA_END_DADR 0x724 +#define MTK_NOR_REG_DMA_DADR_HB 0x738 +#define MTK_NOR_REG_DMA_END_DADR_HB 0x73c #define MTK_NOR_PRG_MAX_SIZE 6 // Reading DMA src/dst addresses have to be 16-byte aligned @@ -102,6 +104,7 @@ struct mtk_nor { unsigned int spi_freq; bool wbuf_en; bool has_irq; + bool high_dma; struct completion op_done; }; @@ -291,6 +294,11 @@ static int read_dma(struct mtk_nor *sp, u32 from, unsigned int length, writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR); writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR); + if (sp->high_dma) { + writel(dma_addr >> 32, sp->base + MTK_NOR_REG_DMA_DADR_HB); + writel((dma_addr + length) >> 32, sp->base + MTK_NOR_REG_DMA_END_DADR_HB); + } + if (sp->has_irq) { reinit_completion(&sp->op_done); mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0); @@ -594,7 +602,8 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = { }; static const struct of_device_id mtk_nor_match[] = { - { .compatible = "mediatek,mt8173-nor" }, + { .compatible = "mediatek,mt8192-nor", .data = (void *)36 }, + { .compatible = "mediatek,mt8173-nor", .data = (void *)32 }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mtk_nor_match); @@ -607,6 +616,7 @@ static int mtk_nor_probe(struct platform_device *pdev) u8 *buffer; struct clk *spi_clk, *ctlr_clk; int ret, irq; + unsigned long dma_bits; base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) @@ -623,6 +633,13 @@ static int mtk_nor_probe(struct platform_device *pdev) buffer = devm_kmalloc(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN, GFP_KERNEL); + + dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev); + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) { + dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits); + return -EINVAL; + } + if (!buffer) return -ENOMEM; From patchwork Fri Sep 18 08:31:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ikjoon Jang X-Patchwork-Id: 11784319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A25759D for ; Fri, 18 Sep 2020 08:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 05AB620789 for ; Fri, 18 Sep 2020 08:31:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="HAjR/a3E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726734AbgIRIbo (ORCPT ); Fri, 18 Sep 2020 04:31:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726742AbgIRIbn (ORCPT ); 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Accessing registers are delayed after enabling clocks to deal with unknown state of clocks at probe time, Signed-off-by: Ikjoon Jang --- drivers/spi/spi-mtk-nor.c | 105 +++++++++++++++++++++++++++++--------- 1 file changed, 80 insertions(+), 25 deletions(-) diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index 99dd5dca744e..5dcd575998d9 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -551,22 +552,15 @@ static int mtk_nor_enable_clk(struct mtk_nor *sp) return 0; } -static int mtk_nor_init(struct mtk_nor *sp) +static void mtk_nor_init(struct mtk_nor *sp) { - int ret; - - ret = mtk_nor_enable_clk(sp); - if (ret) - return ret; - - sp->spi_freq = clk_get_rate(sp->spi_clk); + writel(0, sp->base + MTK_NOR_REG_IRQ_EN); + writel(MTK_NOR_IRQ_MASK, sp->base + MTK_NOR_REG_IRQ_STAT); writel(MTK_NOR_ENABLE_SF_CMD, sp->base + MTK_NOR_REG_WP); mtk_nor_rmw(sp, MTK_NOR_REG_CFG2, MTK_NOR_WR_CUSTOM_OP_EN, 0); mtk_nor_rmw(sp, MTK_NOR_REG_CFG3, MTK_NOR_DISABLE_WREN | MTK_NOR_DISABLE_SR_POLL, 0); - - return ret; } static irqreturn_t mtk_nor_irq_handler(int irq, void *data) @@ -630,6 +624,11 @@ static int mtk_nor_probe(struct platform_device *pdev) if (IS_ERR(ctlr_clk)) return PTR_ERR(ctlr_clk); + irq = platform_get_irq_optional(pdev, 0); + + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36))) + dev_warn(&pdev->dev, "failed to set dma mask(36)\n"); + buffer = devm_kmalloc(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN, GFP_KERNEL); @@ -661,6 +660,7 @@ static int mtk_nor_probe(struct platform_device *pdev) ctlr->num_chipselect = 1; ctlr->setup = mtk_nor_setup; ctlr->transfer_one_message = mtk_nor_transfer_one_message; + ctlr->auto_runtime_pm = true; dev_set_drvdata(&pdev->dev, ctlr); @@ -678,12 +678,17 @@ static int mtk_nor_probe(struct platform_device *pdev) if (!sp->buffer) return -ENOMEM; - irq = platform_get_irq_optional(pdev, 0); + ret = mtk_nor_enable_clk(sp); + if (ret < 0) + return ret; + + sp->spi_freq = clk_get_rate(sp->spi_clk); + + mtk_nor_init(sp); + if (irq < 0) { dev_warn(sp->dev, "IRQ not available."); } else { - writel(MTK_NOR_IRQ_MASK, base + MTK_NOR_REG_IRQ_STAT); - writel(0, base + MTK_NOR_REG_IRQ_EN); ret = devm_request_irq(sp->dev, irq, mtk_nor_irq_handler, 0, pdev->name, sp); if (ret < 0) { @@ -694,26 +699,41 @@ static int mtk_nor_probe(struct platform_device *pdev) } } - ret = mtk_nor_init(sp); - if (ret < 0) { - kfree(ctlr); - dma_free_coherent(&pdev->dev, MTK_NOR_BOUNCE_BUF_SIZE, - sp->buffer, sp->buffer_dma); - return ret; - } + pm_runtime_set_autosuspend_delay(&pdev->dev, -1); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + pm_runtime_get_noresume(&pdev->dev); + + ret = devm_spi_register_controller(&pdev->dev, ctlr); + if (ret < 0) + goto err_probe; + + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); dev_info(&pdev->dev, "spi frequency: %d Hz\n", sp->spi_freq); - return devm_spi_register_controller(&pdev->dev, ctlr); + return 0; + +err_probe: + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); + + mtk_nor_disable_clk(sp); + + return ret; } static int mtk_nor_remove(struct platform_device *pdev) { - struct spi_controller *ctlr; - struct mtk_nor *sp; + struct spi_controller *ctlr = dev_get_drvdata(&pdev->dev); + struct mtk_nor *sp = spi_controller_get_devdata(ctlr); - ctlr = dev_get_drvdata(&pdev->dev); - sp = spi_controller_get_devdata(ctlr); + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); mtk_nor_disable_clk(sp); @@ -722,10 +742,45 @@ static int mtk_nor_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused mtk_nor_runtime_suspend(struct device *dev) +{ + struct spi_controller *ctlr = dev_get_drvdata(dev); + struct mtk_nor *sp = spi_controller_get_devdata(ctlr); + + mtk_nor_disable_clk(sp); + + return 0; +} + +static int __maybe_unused mtk_nor_runtime_resume(struct device *dev) +{ + struct spi_controller *ctlr = dev_get_drvdata(dev); + struct mtk_nor *sp = spi_controller_get_devdata(ctlr); + + return mtk_nor_enable_clk(sp); +} + +static int __maybe_unused mtk_nor_suspend(struct device *dev) +{ + return pm_runtime_force_suspend(dev); +} + +static int __maybe_unused mtk_nor_resume(struct device *dev) +{ + return pm_runtime_force_resume(dev); +} + +static const struct dev_pm_ops mtk_nor_pm_ops = { + SET_RUNTIME_PM_OPS(mtk_nor_runtime_suspend, + mtk_nor_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(mtk_nor_suspend, mtk_nor_resume) +}; + static struct platform_driver mtk_nor_driver = { .driver = { .name = DRIVER_NAME, .of_match_table = mtk_nor_match, + .pm = &mtk_nor_pm_ops, }, .probe = mtk_nor_probe, .remove = mtk_nor_remove,