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Date: Fri, 18 Sep 2020 12:34:29 +0200 Message-ID: <20200918103429.4769-1-nadeem@cadence.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 98bac2d4-eaf8-4788-f90d-08d85bbe71f5 X-MS-TrafficTypeDiagnostic: MN2PR07MB7024: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: he7Yd/IMWq1zP7Q9fqyRRYjaNnpF+yoVO37Aj/kHSKBj9lLzKsClZ99Dbs0Od2AhFFZnWzfB9jJavqFAfOzZe+NcddutnQRIlTtSNHM5TNblNTYB879jmkLECmCorAWQhi22fjQusBIntnQ4zHFcTVWmv9p3v0+AfvDmKtGR+lI4jZYDEc9dgBXviEqMd2BTJ3/VGzsKZ0+D3JhFvrtDfJZm60x6pBzlfN8UkJtQUBKg3XfDXaDomuPf8LCkrEXlSlNUukZBXtRhWvUzQ6oY/GqCT8HIDFyIqImYRlbSm5uh2kX019GUPT4shMd2mkJiQ87x0wgmphVUmiAR9WgMTnZUUt4ahYsLhbk8ywoKDT6QspwTlqK/hBguD9Qkf9XbI9Z2VPySvBxc9AT046eFQjBlC5A+cK8DKPw7i46yI3Y= X-Forefront-Antispam-Report: CIP:199.43.4.23;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:rmmaillnx1.cadence.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(376002)(396003)(39860400002)(346002)(136003)(36092001)(46966005)(316002)(42186006)(8936002)(2616005)(70586007)(82310400003)(1076003)(5660300002)(107886003)(26005)(4326008)(83380400001)(6666004)(47076004)(356005)(2906002)(336012)(8676002)(70206006)(186003)(478600001)(426003)(81166007)(86362001)(110136005)(36906005)(82740400003)(36756003)(54906003);DIR:OUT;SFP:1101; X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2020 10:34:38.6074 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 98bac2d4-eaf8-4788-f90d-08d85bbe71f5 X-MS-Exchange-CrossTenant-Id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=d36035c5-6ce6-4662-a3dc-e762e61ae4c9;Ip=[199.43.4.23];Helo=[rmmaillnx1.cadence.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM12FT017.eop-nam12.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR07MB7024 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-18_14:2020-09-16,2020-09-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 malwarescore=0 bulkscore=0 spamscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 clxscore=1011 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009180086 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain bit is set as a quirk to trigger this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 13 +++++++++++++ drivers/pci/controller/cadence/pcie-cadence.h | 6 ++++++ 2 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c index 4550e0d..4cb7f29 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-host.c +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c @@ -83,6 +83,8 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc) struct cdns_pcie *pcie = &rc->pcie; u32 value, ctrl; u32 id; + u32 link_cap = CDNS_PCIE_LINK_CAP_OFFSET; + u8 sls, lnk_ctl; /* * Set the root complex BAR configuration register: @@ -111,6 +113,17 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc) if (rc->device_id != 0xffff) cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id); + /* Quirk to enable autonomous speed change for GEN2 controller */ + /* Reading Supported Link Speed value */ + sls = PCI_EXP_LNKCAP_SLS & + cdns_pcie_rp_readb(pcie, link_cap + PCI_EXP_LNKCAP); + if (sls == PCI_EXP_LNKCAP_SLS_5_0GB) { + /* Since this a Gen2 controller, set Retrain Link(RL) bit */ + lnk_ctl = cdns_pcie_rp_readb(pcie, link_cap + PCI_EXP_LNKCTL); + lnk_ctl |= PCI_EXP_LNKCTL_RL; + cdns_pcie_rp_writeb(pcie, link_cap + PCI_EXP_LNKCTL, lnk_ctl); + } + cdns_pcie_rp_writeb(pcie, PCI_CLASS_REVISION, 0); cdns_pcie_rp_writeb(pcie, PCI_CLASS_PROG, 0); cdns_pcie_rp_writew(pcie, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI); diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index feed1e3..075c263 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -120,6 +120,7 @@ */ #define CDNS_PCIE_RP_BASE 0x00200000 +#define CDNS_PCIE_LINK_CAP_OFFSET 0xC0 /* * Address Translation Registers @@ -413,6 +414,11 @@ static inline void cdns_pcie_rp_writew(struct cdns_pcie *pcie, cdns_pcie_write_sz(addr, 0x2, value); } +static inline u8 cdns_pcie_rp_readb(struct cdns_pcie *pcie, u32 reg) +{ + return readb(pcie->reg_base + CDNS_PCIE_RP_BASE + reg); +} + /* Endpoint Function register access */ static inline void cdns_pcie_ep_fn_writeb(struct cdns_pcie *pcie, u8 fn, u32 reg, u8 value)