From patchwork Mon Sep 21 18:18:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vicente Bergas X-Patchwork-Id: 11791753 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 875976CB for ; Tue, 22 Sep 2020 07:49:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5AF8423A1E for ; Tue, 22 Sep 2020 07:49:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="k8ytlwjs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5AF8423A1E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7AF1F6E82D; Tue, 22 Sep 2020 07:49:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEB1989A5C for ; Mon, 21 Sep 2020 18:18:30 +0000 (UTC) Received: by mail-wm1-x344.google.com with SMTP id e11so522167wme.0 for ; Mon, 21 Sep 2020 11:18:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wN1VQcr5gopN//+YP1c+kyMLVVksKqlHg3J3zrz7FOU=; b=k8ytlwjsFo4BX7JUh7CapBzDGKRouXqIq9lZRGGlkP3m84azSYvitonhDLI+f0lqEx hIUX1oEPHGxhWhptxVKAHTYTJ5ECdL4IZZ89GbFr+XImQxZBn2eedIMpr1Jk1BGSohAm zZnEj8y3JuJO8a4zR5HmoSEq2R9/ygi3Sz884uloe2ckSJEqy2UE6VE7ug8jOn2aVKIT cUYxsW8blV8BPFeIUUFBVG/eebmKS7TOCS4BdFhKdmxOUuhG9m+LpsgaXZXjZwG8yUhz aSzn1x4rbgQUMkTbauI0jscb4TDFn8r6q3xrshq9B+sc6vRZx6xzdkAmZXPUN7ujw/dB N33Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wN1VQcr5gopN//+YP1c+kyMLVVksKqlHg3J3zrz7FOU=; b=r0mV4sHD/deLkSAgKnln4qit/Mffs9qeUB+oBvZe8i9px5HdGW3Z+D7UqYqb81Fyhf 8i4gN+70T8iHgR8HJnhrtyo+XSCyWGSseag//LXh2wS1ekgVSPNloO7Ps0bE8zhnGfh2 6jKg/n60U47RS2uldEutL3qp03PQsQy9flcy5xMtR8GDyFxRkKqbZTlZ0/Dnz432nImD EdAlSm+LfrrtAzDTYRX/ApkRNjgazHCmbDA1f8k/k7fxPQ8VH3CbcjTxkp9HTWPMTWEj /MPtUPu80QfJh90/4Ld0jbo4/9q352siCWz5ekDdmB1m24Bwm2/txlyASbu0jmZj9NIT 0MDA== X-Gm-Message-State: AOAM532uV9CvwGqqAQ9vAj2fiq6GJBpYYGdgfFA8UrG6BRBOmsmlrA4W wMHkw6VSvhnfOeJoyFBMFtE= X-Google-Smtp-Source: ABdhPJwsqIQmUMoz2qqPyu7m3k2+6Iq+CcK5QecIPbZOLTffC9yTCP7aw529i0+eO1s8CZ8xoLOeDA== X-Received: by 2002:a7b:c215:: with SMTP id x21mr607808wmi.138.1600712308906; Mon, 21 Sep 2020 11:18:28 -0700 (PDT) Received: from localhost.localdomain ([170.253.46.69]) by smtp.gmail.com with ESMTPSA id h16sm23523249wre.87.2020.09.21.11.18.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2020 11:18:28 -0700 (PDT) From: Vicente Bergas To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org Subject: [PATCH 1/3] drm: rockchip: hdmi: remove vop_crtc_mode_fixup to fix clock handling Date: Mon, 21 Sep 2020 20:18:01 +0200 Message-Id: <20200921181803.1160-2-vicencb@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200921181803.1160-1-vicencb@gmail.com> References: <20200921181803.1160-1-vicencb@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 22 Sep 2020 07:46:37 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vicente Bergas Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Under certain conditions vop_crtc_mode_fixup rounds the clock 148500000 to 148501000 which leads to the following error: dwhdmi-rockchip ff940000.hdmi: PHY configuration failed (clock 148501000) The issue was found on RK3399 booting with u-boot. U-boot configures the display at 2560x1440 and then linux comes up with a black screen. A workaround was to un-plug and re-plug the HDMI display. Signed-off-by: Vicente Bergas Tested-by: Vicente Bergas --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 45 --------------------- 1 file changed, 45 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c80f7d9fd13f..fe80da652994 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1142,50 +1142,6 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) spin_unlock_irqrestore(&vop->irq_lock, flags); } -static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct vop *vop = to_vop(crtc); - unsigned long rate; - - /* - * Clock craziness. - * - * Key points: - * - * - DRM works in in kHz. - * - Clock framework works in Hz. - * - Rockchip's clock driver picks the clock rate that is the - * same _OR LOWER_ than the one requested. - * - * Action plan: - * - * 1. When DRM gives us a mode, we should add 999 Hz to it. That way - * if the clock we need is 60000001 Hz (~60 MHz) and DRM tells us to - * make 60000 kHz then the clock framework will actually give us - * the right clock. - * - * NOTE: if the PLL (maybe through a divider) could actually make - * a clock rate 999 Hz higher instead of the one we want then this - * could be a problem. Unfortunately there's not much we can do - * since it's baked into DRM to use kHz. It shouldn't matter in - * practice since Rockchip PLLs are controlled by tables and - * even if there is a divider in the middle I wouldn't expect PLL - * rates in the table that are just a few kHz different. - * - * 2. Get the clock framework to round the rate for us to tell us - * what it will actually make. - * - * 3. Store the rounded up rate so that we don't need to worry about - * this in the actual clk_set_rate(). - */ - rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000 + 999); - adjusted_mode->clock = DIV_ROUND_UP(rate, 1000); - - return true; -} - static bool vop_dsp_lut_is_enabled(struct vop *vop) { return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en); @@ -1512,7 +1468,6 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc, } static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { - .mode_fixup = vop_crtc_mode_fixup, .atomic_check = vop_crtc_atomic_check, .atomic_begin = vop_crtc_atomic_begin, .atomic_flush = vop_crtc_atomic_flush, From patchwork Mon Sep 21 18:18:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vicente Bergas X-Patchwork-Id: 11791693 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADE07112C for ; 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Mon, 21 Sep 2020 11:18:30 -0700 (PDT) Received: from localhost.localdomain ([170.253.46.69]) by smtp.gmail.com with ESMTPSA id h16sm23523249wre.87.2020.09.21.11.18.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2020 11:18:29 -0700 (PDT) From: Vicente Bergas To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org Subject: [PATCH 2/3] drm: rockchip: hdmi: allow any clock that is within the range Date: Mon, 21 Sep 2020 20:18:02 +0200 Message-Id: <20200921181803.1160-3-vicencb@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200921181803.1160-1-vicencb@gmail.com> References: <20200921181803.1160-1-vicencb@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 22 Sep 2020 07:46:38 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vicente Bergas Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For a video mode to work it suffices that the available bandwidth is large enough. There is no need to have an exact match. This greatly expands the list of supported monitors. Signed-off-by: Vicente Bergas Tested-by: Vicente Bergas --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 23de359a1dec..87a9198f7494 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -230,7 +230,7 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data, int i; for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { - if (pclk == mpll_cfg[i].mpixelclock) { + if (pclk <= mpll_cfg[i].mpixelclock) { valid = true; break; } From patchwork Mon Sep 21 18:18:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vicente Bergas X-Patchwork-Id: 11791749 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E81686CB for ; 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Mon, 21 Sep 2020 11:18:31 -0700 (PDT) Received: from localhost.localdomain ([170.253.46.69]) by smtp.gmail.com with ESMTPSA id h16sm23523249wre.87.2020.09.21.11.18.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2020 11:18:30 -0700 (PDT) From: Vicente Bergas To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org Subject: [PATCH 3/3] drm: rockchip: hdmi: add higher pixel clock frequencies Date: Mon, 21 Sep 2020 20:18:03 +0200 Message-Id: <20200921181803.1160-4-vicencb@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200921181803.1160-1-vicencb@gmail.com> References: <20200921181803.1160-1-vicencb@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 22 Sep 2020 07:46:38 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vicente Bergas Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In order to support video resolutions beyond FHD more bandwidth is needed. The new entry values have been taken from u-boot: https://gitlab.denx.de/u-boot/u-boot/-/blob/ba2a0cbb053951ed6d36161989d38da724696b4d/drivers/video/rockchip/rk_hdmi.c#L63 Signed-off-by: Vicente Bergas Tested-by: Vicente Bergas --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 87a9198f7494..db4a946f92aa 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -148,6 +148,10 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { { 0x214c, 0x0003}, { 0x4064, 0x0003} }, + }, { + 272000000, { + { 0x0040, 0x0003}, + }, }, { ~0UL, { { 0x00a0, 0x000a }, @@ -173,6 +177,8 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = { 146250000, { 0x0038, 0x0038, 0x0038 }, }, { 148500000, { 0x0000, 0x0038, 0x0038 }, + }, { + 272000000, { 0x0000, }, }, { ~0UL, { 0x0000, 0x0000, 0x0000}, }