From patchwork Thu Sep 24 08:05:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11796501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4F201731 for ; Thu, 24 Sep 2020 08:05:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8AE5C20888 for ; Thu, 24 Sep 2020 08:05:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727238AbgIXIFk (ORCPT ); Thu, 24 Sep 2020 04:05:40 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:11784 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727013AbgIXIFi (ORCPT ); Thu, 24 Sep 2020 04:05:38 -0400 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08O82fco015752; Thu, 24 Sep 2020 04:05:36 -0400 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 33r5p6b79h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Sep 2020 04:05:35 -0400 Received: from SCSQMBX10.ad.analog.com (scsqmbx10.ad.analog.com [10.77.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 08O85YIv049927 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Thu, 24 Sep 2020 04:05:34 -0400 Received: from SCSQMBX10.ad.analog.com (10.77.17.5) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 24 Sep 2020 01:05:32 -0700 Received: from zeus.spd.analog.com (10.66.68.11) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 24 Sep 2020 01:05:32 -0700 Received: from saturn.ad.analog.com ([10.48.65.107]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 08O85Srr000911; Thu, 24 Sep 2020 04:05:30 -0400 From: Alexandru Ardelean To: , , CC: , , , Alexandru Ardelean Subject: [PATCH v3 1/4] iio: adc: ad9467: wrap a axi-adc chip-info into a ad9467_chip_info type Date: Thu, 24 Sep 2020 11:05:15 +0300 Message-ID: <20200924080518.96410-2-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200924080518.96410-1-alexandru.ardelean@analog.com> References: <20200924080518.96410-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 mlxlogscore=849 impostorscore=0 clxscore=1015 suspectscore=0 malwarescore=0 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009240062 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org There are 2 chip constants that can be added to the chip-info part. The default output-mode and the VREF mask. When adding new chips to this driver, these can be easily omitted, because these also need to be updated in 2 switch statements. However, if adding them in the chip-info constants, they are updated in a single place and propagated in both switch statements. Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad9467.c | 62 +++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 33 deletions(-) diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c index f068256cfca9..85f5a014bd2d 100644 --- a/drivers/iio/adc/ad9467.c +++ b/drivers/iio/adc/ad9467.c @@ -88,6 +88,15 @@ enum { ID_AD9467, }; +struct ad9467_chip_info { + struct adi_axi_adc_chip_info axi_adc_info; + unsigned int default_output_mode; + unsigned int vref_mask; +}; + +#define to_ad9467_chip_info(_info) \ + container_of(_info, struct ad9467_chip_info, axi_adc_info) + struct ad9467_state { struct spi_device *spi; struct clk *clk; @@ -186,35 +195,31 @@ static const struct iio_chan_spec ad9467_channels[] = { AD9467_CHAN(0, 0, 16, 'S'), }; -static const struct adi_axi_adc_chip_info ad9467_chip_tbl[] = { +static const struct ad9467_chip_info ad9467_chip_tbl[] = { [ID_AD9467] = { - .id = CHIPID_AD9467, - .max_rate = 250000000UL, - .scale_table = ad9467_scale_table, - .num_scales = ARRAY_SIZE(ad9467_scale_table), - .channels = ad9467_channels, - .num_channels = ARRAY_SIZE(ad9467_channels), + .axi_adc_info = { + .id = CHIPID_AD9467, + .max_rate = 250000000UL, + .scale_table = ad9467_scale_table, + .num_scales = ARRAY_SIZE(ad9467_scale_table), + .channels = ad9467_channels, + .num_channels = ARRAY_SIZE(ad9467_channels), + }, + .default_output_mode = AD9467_DEF_OUTPUT_MODE, + .vref_mask = AD9467_REG_VREF_MASK, }, }; static int ad9467_get_scale(struct adi_axi_adc_conv *conv, int *val, int *val2) { const struct adi_axi_adc_chip_info *info = conv->chip_info; + const struct ad9467_chip_info *info1 = to_ad9467_chip_info(info); struct ad9467_state *st = adi_axi_adc_conv_priv(conv); - unsigned int i, vref_val, vref_mask; + unsigned int i, vref_val; vref_val = ad9467_spi_read(st->spi, AN877_ADC_REG_VREF); - switch (info->id) { - case CHIPID_AD9467: - vref_mask = AD9467_REG_VREF_MASK; - break; - default: - vref_mask = 0xFFFF; - break; - } - - vref_val &= vref_mask; + vref_val &= info1->vref_mask; for (i = 0; i < info->num_scales; i++) { if (vref_val == info->scale_table[i][1]) @@ -316,18 +321,6 @@ static int ad9467_preenable_setup(struct adi_axi_adc_conv *conv) return ad9467_outputmode_set(st->spi, st->output_mode); } -static int ad9467_setup(struct ad9467_state *st, unsigned int chip_id) -{ - switch (chip_id) { - case CHIPID_AD9467: - st->output_mode = AD9467_DEF_OUTPUT_MODE | - AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT; - return 0; - default: - return -ENODEV; - } -} - static void ad9467_clk_disable(void *data) { struct ad9467_state *st = data; @@ -337,7 +330,7 @@ static void ad9467_clk_disable(void *data) static int ad9467_probe(struct spi_device *spi) { - const struct adi_axi_adc_chip_info *info; + const struct ad9467_chip_info *info; struct adi_axi_adc_conv *conv; struct ad9467_state *st; unsigned int id; @@ -386,7 +379,7 @@ static int ad9467_probe(struct spi_device *spi) spi_set_drvdata(spi, st); - conv->chip_info = info; + conv->chip_info = &info->axi_adc_info; id = ad9467_spi_read(spi, AN877_ADC_REG_CHIP_ID); if (id != conv->chip_info->id) { @@ -400,7 +393,10 @@ static int ad9467_probe(struct spi_device *spi) conv->read_raw = ad9467_read_raw; conv->preenable_setup = ad9467_preenable_setup; - return ad9467_setup(st, id); + st->output_mode = info->default_output_mode | + AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT; + + return 0; } static const struct of_device_id ad9467_of_match[] = { From patchwork Thu Sep 24 08:05:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11796505 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BABD81731 for ; Thu, 24 Sep 2020 08:05:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A8DE32311A for ; Thu, 24 Sep 2020 08:05:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727266AbgIXIFq (ORCPT ); Thu, 24 Sep 2020 04:05:46 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:17950 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727255AbgIXIFp (ORCPT ); Thu, 24 Sep 2020 04:05:45 -0400 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08O82fbE015755; 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Thu, 24 Sep 2020 04:05:32 -0400 From: Alexandru Ardelean To: , , CC: , , , Michael Hennerich , Alexandru Ardelean Subject: [PATCH v3 2/4] iio: adc: ad9467: add support for AD9434 high-speed ADC Date: Thu, 24 Sep 2020 11:05:16 +0300 Message-ID: <20200924080518.96410-3-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200924080518.96410-1-alexandru.ardelean@analog.com> References: <20200924080518.96410-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 suspectscore=0 malwarescore=0 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009240062 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Michael Hennerich The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port). The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing. Link: https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf The driver supports the same register set as the AD9467, so the support for this chip is added to the 'ad9467' driver. Signed-off-by: Michael Hennerich Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad9467.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c index 85f5a014bd2d..54a5864bc698 100644 --- a/drivers/iio/adc/ad9467.c +++ b/drivers/iio/adc/ad9467.c @@ -76,6 +76,14 @@ /* AN877_ADC_REG_OUTPUT_DELAY */ #define AN877_ADC_DCO_DELAY_ENABLE 0x80 +/* + * Analog Devices AD9434 12-Bit, 370/500 MSPS ADC + */ + +#define CHIPID_AD9434 0x6A +#define AD9434_DEF_OUTPUT_MODE 0x00 +#define AD9434_REG_VREF_MASK 0xC0 + /* * Analog Devices AD9467 16-Bit, 200/250 MSPS ADC */ @@ -85,6 +93,7 @@ #define AD9467_REG_VREF_MASK 0x0F enum { + ID_AD9434, ID_AD9467, }; @@ -158,6 +167,13 @@ static int ad9467_reg_access(struct adi_axi_adc_conv *conv, unsigned int reg, return 0; } +static const unsigned int ad9434_scale_table[][2] = { + {1600, 0x1C}, {1580, 0x1D}, {1550, 0x1E}, {1520, 0x1F}, {1500, 0x00}, + {1470, 0x01}, {1440, 0x02}, {1420, 0x03}, {1390, 0x04}, {1360, 0x05}, + {1340, 0x06}, {1310, 0x07}, {1280, 0x08}, {1260, 0x09}, {1230, 0x0A}, + {1200, 0x0B}, {1180, 0x0C}, +}; + static const unsigned int ad9467_scale_table[][2] = { {2000, 0}, {2100, 6}, {2200, 7}, {2300, 8}, {2400, 9}, {2500, 10}, @@ -191,11 +207,27 @@ static void __ad9467_get_scale(struct adi_axi_adc_conv *conv, int index, }, \ } +static const struct iio_chan_spec ad9434_channels[] = { + AD9467_CHAN(0, 0, 12, 'S'), +}; + static const struct iio_chan_spec ad9467_channels[] = { AD9467_CHAN(0, 0, 16, 'S'), }; static const struct ad9467_chip_info ad9467_chip_tbl[] = { + [ID_AD9434] = { + .axi_adc_info = { + .id = CHIPID_AD9434, + .max_rate = 500000000UL, + .scale_table = ad9434_scale_table, + .num_scales = ARRAY_SIZE(ad9434_scale_table), + .channels = ad9434_channels, + .num_channels = ARRAY_SIZE(ad9434_channels), + }, + .default_output_mode = AD9434_DEF_OUTPUT_MODE, + .vref_mask = AD9434_REG_VREF_MASK, + }, [ID_AD9467] = { .axi_adc_info = { .id = CHIPID_AD9467, @@ -400,6 +432,7 @@ static int ad9467_probe(struct spi_device *spi) } static const struct of_device_id ad9467_of_match[] = { + { .compatible = "adi,ad9434", .data = &ad9467_chip_tbl[ID_AD9434], }, { .compatible = "adi,ad9467", .data = &ad9467_chip_tbl[ID_AD9467], }, {} }; From patchwork Thu Sep 24 08:05:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11796509 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 21E241731 for ; Thu, 24 Sep 2020 08:05:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 09EB920888 for ; Thu, 24 Sep 2020 08:05:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727255AbgIXIFw (ORCPT ); Thu, 24 Sep 2020 04:05:52 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:22218 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727260AbgIXIFp (ORCPT ); Thu, 24 Sep 2020 04:05:45 -0400 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08O82fcs015752; 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Thu, 24 Sep 2020 04:05:33 -0400 From: Alexandru Ardelean To: , , CC: , , , Michael Hennerich , Alexandru Ardelean Subject: [PATCH v3 3/4] iio: adc: ad9467: add support for AD9265 high-speed ADC Date: Thu, 24 Sep 2020 11:05:17 +0300 Message-ID: <20200924080518.96410-4-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200924080518.96410-1-alexandru.ardelean@analog.com> References: <20200924080518.96410-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 suspectscore=0 malwarescore=0 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009240062 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Michael Hennerich The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range. The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. Link: https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf The driver supports the same register set as the AD9467, so the support for this chip is added to the 'ad9467' driver. Signed-off-by: Michael Hennerich Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad9467.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c index 54a5864bc698..19a45dd43796 100644 --- a/drivers/iio/adc/ad9467.c +++ b/drivers/iio/adc/ad9467.c @@ -76,6 +76,14 @@ /* AN877_ADC_REG_OUTPUT_DELAY */ #define AN877_ADC_DCO_DELAY_ENABLE 0x80 +/* + * Analog Devices AD9265 16-Bit, 125/105/80 MSPS ADC + */ + +#define CHIPID_AD9265 0x64 +#define AD9265_DEF_OUTPUT_MODE 0x40 +#define AD9265_REG_VREF_MASK 0xC0 + /* * Analog Devices AD9434 12-Bit, 370/500 MSPS ADC */ @@ -93,6 +101,7 @@ #define AD9467_REG_VREF_MASK 0x0F enum { + ID_AD9265, ID_AD9434, ID_AD9467, }; @@ -167,6 +176,10 @@ static int ad9467_reg_access(struct adi_axi_adc_conv *conv, unsigned int reg, return 0; } +static const unsigned int ad9265_scale_table[][2] = { + {1250, 0x00}, {1500, 0x40}, {1750, 0x80}, {2000, 0xC0}, +}; + static const unsigned int ad9434_scale_table[][2] = { {1600, 0x1C}, {1580, 0x1D}, {1550, 0x1E}, {1520, 0x1F}, {1500, 0x00}, {1470, 0x01}, {1440, 0x02}, {1420, 0x03}, {1390, 0x04}, {1360, 0x05}, @@ -216,6 +229,18 @@ static const struct iio_chan_spec ad9467_channels[] = { }; static const struct ad9467_chip_info ad9467_chip_tbl[] = { + [ID_AD9265] = { + .axi_adc_info = { + .id = CHIPID_AD9265, + .max_rate = 125000000UL, + .scale_table = ad9265_scale_table, + .num_scales = ARRAY_SIZE(ad9265_scale_table), + .channels = ad9467_channels, + .num_channels = ARRAY_SIZE(ad9467_channels), + }, + .default_output_mode = AD9265_DEF_OUTPUT_MODE, + .vref_mask = AD9265_REG_VREF_MASK, + }, [ID_AD9434] = { .axi_adc_info = { .id = CHIPID_AD9434, @@ -432,6 +457,7 @@ static int ad9467_probe(struct spi_device *spi) } static const struct of_device_id ad9467_of_match[] = { + { .compatible = "adi,ad9265", .data = &ad9467_chip_tbl[ID_AD9265], }, { .compatible = "adi,ad9434", .data = &ad9467_chip_tbl[ID_AD9434], }, { .compatible = "adi,ad9467", .data = &ad9467_chip_tbl[ID_AD9467], }, {} From patchwork Thu Sep 24 08:05:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11796507 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE74F139A for ; Thu, 24 Sep 2020 08:05:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C388420888 for ; Thu, 24 Sep 2020 08:05:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727262AbgIXIFp (ORCPT ); Thu, 24 Sep 2020 04:05:45 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:17058 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727253AbgIXIFo (ORCPT ); Thu, 24 Sep 2020 04:05:44 -0400 Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08O84TfI026770; Thu, 24 Sep 2020 04:05:41 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com with ESMTP id 33r5u9b83c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Sep 2020 04:05:41 -0400 Received: from SCSQMBX11.ad.analog.com (scsqmbx11.ad.analog.com [10.77.17.10]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 08O85d4V017018 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Thu, 24 Sep 2020 04:05:39 -0400 Received: from SCSQCASHYB7.ad.analog.com (10.77.17.133) by SCSQMBX11.ad.analog.com (10.77.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 24 Sep 2020 01:05:37 -0700 Received: from SCSQMBX10.ad.analog.com (10.77.17.5) by SCSQCASHYB7.ad.analog.com (10.77.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 24 Sep 2020 01:05:37 -0700 Received: from zeus.spd.analog.com (10.66.68.11) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 24 Sep 2020 01:05:37 -0700 Received: from saturn.ad.analog.com ([10.48.65.107]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 08O85Sru000911; Thu, 24 Sep 2020 04:05:35 -0400 From: Alexandru Ardelean To: , , CC: , , , Alexandru Ardelean Subject: [PATCH v3 4/4] dt-bindings: iio: ad9467: add entries for for AD9434 & AD9265 ADCs Date: Thu, 24 Sep 2020 11:05:18 +0300 Message-ID: <20200924080518.96410-5-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200924080518.96410-1-alexandru.ardelean@analog.com> References: <20200924080518.96410-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 impostorscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 malwarescore=0 mlxscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009240062 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Add entries for the AD9434 & AD9265 high-speed ADCs which are supported by the 'ad9467' driver. Better describe the family of ADCs similar to AD9467 in the description. Signed-off-by: Alexandru Ardelean --- .../devicetree/bindings/iio/adc/adi,ad9467.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml index c4f57fa6aad1..579dbc63e3fe 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml @@ -4,21 +4,30 @@ $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AD9467 High-Speed ADC +title: Analog Devices AD9467 and similar High-Speed ADCs maintainers: - Michael Hennerich - Alexandru Ardelean description: | - The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital - converter (ADC). + The AD9467 and the parts similar with it, are high-speed analog-to-digital + converters (ADCs), operating in the range of 100 to 500 mega samples + per second (MSPS). Depending on the part, some support higher MSPS and some + lower MSPS, depending on the application each part is intended for. + All the parts support the register map described by Application Note AN-877 + https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf + + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf properties: compatible: enum: + - adi,ad9265 + - adi,ad9434 - adi,ad9467 reg: