From patchwork Thu Sep 24 10:07:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 11796879 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 895A8618 for ; Thu, 24 Sep 2020 10:08:05 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 83A90239A1; Thu, 24 Sep 2020 10:08:05 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8AB6B2396E; Thu, 24 Sep 2020 10:08:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="QDRpYPvV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8AB6B2396E Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alexandre.torgue@st.com Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08OA7aNe030250; Thu, 24 Sep 2020 12:07:58 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : subject : to : cc : message-id : date : mime-version : content-type : content-transfer-encoding; s=STMicroelectronics; bh=Crrvtsqdxu7/5NPNNcpC8mg20lG7qn6OS1lCYHuiUWo=; b=QDRpYPvVVf/YEu81x3RKwj+JOlRhH3BaqKOjZ0HItw5Zmj+ADAQuGoq2oNaayulWKeZC AZKNP/UEqpVhBX9DywZIYyDEaQ/Zo3OoOLXz7QQnBVzJn0AHJbhDPz16k/Tt+AzxxDHK BIFmhRf8o5fQsxDV7gQga4hVYizxgm+tqr2c8uf5TxjhkGkKc+HLhEchaWzqm+6JQWra WhzefYjfgyQQcPG0JeeeTe/tAkj8zi/t7eNe4+cgD1aliBXm6JIzv0DZo/9wdCWO6Iwg 4tsVjkofhRTqfanPtRs/F6p23cXYU1IOObR31hUx1iFvnBFFC+Z6yg8ZFv3odWWpWVUS YA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 33n748d5qn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Sep 2020 12:07:58 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AB8A010002A; Thu, 24 Sep 2020 12:07:57 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7FD5C21BB69; Thu, 24 Sep 2020 12:07:57 +0200 (CEST) Received: from lmecxl0912.lme.st.com (10.75.127.49) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 24 Sep 2020 12:07:56 +0200 From: Alexandre Torgue Subject: [GIT PULL] STM32 DT changes for v5.10 #1 List-Id: To: Arnd Bergmann , Olof Johansson , Kevin Hilman , SoC Team , arm-soc CC: Maxime Coquelin , Marek Vasut , Alexandre TORGUE Message-ID: <7e2a93c9-cf37-bc93-ed6e-d9cb1808b7a3@st.com> Date: Thu, 24 Sep 2020 12:07:53 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 Content-Language: en-US X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG6NODE3.st.com (10.75.127.18) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 Hi Arnd, Olof and Kevin, Please consider this first round of STM32 DT updates for v5.10. Main changes concerns STM32 MPU family and more precisely DH files. Note that 2 boards have been added: "odyssey" based on SOM and DH has a board based on their DHCOM SOM. Regards Alex The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git tags/stm32-dt-for-v5.10-1 for you to fetch changes up to 71593c519f162b5f54bafed085cdddc7a883894d: ARM: dts: stm32: add arm-pmu node on stm32mp15 (2020-09-23 18:37:02 +0200) ---------------------------------------------------------------- STM32 DT updates for v5.10, round 1 Highlights: ---------- MCU part: -Some changes on stm32h743: enable display controler, add SPI resets, use "st,stm32h7-uart" compatible. MPU part: -Add new Odyssey SOM board based on STM32MP157CAC. It embeds 4GB eMMC, 512 MB DDR3 RAM, USB and ETH connectors and a combo wifi/BT (AP6236 chip). -Add FMC2 EBI support on EV1 board. -Add arm-pmu node. -LXA: -Change ethernet phy delays to avoid kernel warnings. -Enable DDR50 eMMC mode. -DH: -Add new DH DRC02 unit board. -Add USB OTG support on PDK2 board. -Use uart8 RTS/CTS on PDK2 board. -Fix display PWM channel on PDK2 board. -Swap phy reset line and touchscreen irq on DHCOM SOM. -Drop QSPI CS2 on DHCOM SOM. -Update SDMMC pin config on AV96. -Enable uart7 RTS/CTS on AV96. ---------------------------------------------------------------- Ahmad Fatoum (1): ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC Alexandre Torgue (1): ARM: dts: stm32: add arm-pmu node on stm32mp15 Christophe Kerello (1): ARM: dts: stm32: add FMC2 EBI support for stm32mp157c Holger Assmann (1): ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delays Marcin Sloniewski (3): dt-bindings: vendor-prefixes: add Seeed Studio dt-bindings: arm: stm32: document Odyssey compatible ARM: dts: stm32: add initial support for stm32mp157-odyssey board Marek Vasut (10): ARM: dts: stm32: Move ethernet PHY into DH SoM DT ARM: dts: stm32: Add DHSOM based DRC02 board ARM: dts: stm32: Fix sdmmc2 pins on AV96 ARM: dts: stm32: Add USB OTG support to DH PDK2 ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmux ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOM ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8 ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOM ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7 ARM: dts: stm32: Fix DH PDK2 display PWM channel Tobias Schramm (3): ARM: dts: stm32: add display controller node to stm32h743 ARM: dts: stm32: add resets property to spi device nodes on stm32h743 ARM: dts: stm32: use stm32h7 usart compatible string for stm32h743 .../devicetree/bindings/arm/stm32/stm32.yaml | 6 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/stm32h743.dtsi | 20 +- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 26 ++ arch/arm/boot/dts/stm32mp151.dtsi | 50 ++-- arch/arm/boot/dts/stm32mp153.dtsi | 6 + arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dts | 35 +++ arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts | 4 +- arch/arm/boot/dts/stm32mp157c-ev1.dts | 16 +- arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts | 3 +- arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi | 276 +++++++++++++++++++++ arch/arm/boot/dts/stm32mp157c-odyssey.dts | 80 ++++++ arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi | 157 ++++++++++++ arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi | 45 +--- arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 42 +++- arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 7 +- 17 files changed, 708 insertions(+), 71 deletions(-) create mode 100644 arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dts create mode 100644 arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi create mode 100644 arch/arm/boot/dts/stm32mp157c-odyssey.dts create mode 100644 arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi