From patchwork Thu Sep 24 10:07:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 11796881 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A58AD92C for ; Thu, 24 Sep 2020 10:08:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7EB33239A1 for ; Thu, 24 Sep 2020 10:08:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hswEqlH0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726899AbgIXKIP (ORCPT ); Thu, 24 Sep 2020 06:08:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726818AbgIXKIO (ORCPT ); Thu, 24 Sep 2020 06:08:14 -0400 Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF9FAC0613CE for ; Thu, 24 Sep 2020 03:08:14 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id d9so1611560pfd.3 for ; Thu, 24 Sep 2020 03:08:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=0V6+MO40T7RQQa2+6CkybLfijKZrU0OL4srRvkZWkcE=; b=hswEqlH0SF+N7++r+h4NGQajib5t5t3x5/C6Kk2Tj4pxhV9CGzAzRAq7OfWU6wMyXk 8mLNUVd2TTXap67aTydcm7DBXKbvwmQ69IwiXjVhQV4SBPySIgrsti2ZI1BnQmUa7/D3 56bypUaIAe6JdJboq1/GXO11b0RVmCaKDTL0GnGQYsiHNk92rAMJHlaORjfUC76Qbu5w R+zclSdxgvUQozwflBqateT7VwVnkSsiAZNvUuF69VB3h29OWdkibCKzafiDCJTot4sr jTZVGNCu3hEkdOCHt1yK3yh+TWKk86I1ZnkOecQOE+OSFRYz0MrMdsNXnfjuV9UxRNhZ wGYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=0V6+MO40T7RQQa2+6CkybLfijKZrU0OL4srRvkZWkcE=; b=Ms0qlWVR39TkjZg+sCCMMY/2/QjQvf5vl6yevqn8lJ4EQYW5uBTfc23zdld+5dr5v4 mAfX3G3116hIXzPU1ewRXipCgAoyF5qC8Mlzn8UTmJFkAZdHrfxE0MycYxhVy4MoffpN 9c0meZTpTRqK0aWaxcuz+Z0UKGpVk8jkQje9gUOTqfke9UJHhXs/31eIh0oLeLfCfYFY UByNdqVRISEW8trpl8UIG+qoV3GP4Hu8ibKfW7yRZVtQeVr4NlGLcR7x26oiekxCvtKP MjeMff5a5mh2nLUm1NrJLDwXxGwXjJUol+XRhoHnWoDmAdDqi79vDb5439ADZ3OembTU NqHQ== X-Gm-Message-State: AOAM531Uuv+A63HSp1jSzMdZh0MVG9VqHa5GiwouNU9aA1ZDfjHX940H BIoVWXLZyUQ8mfdTYya5LT0= X-Google-Smtp-Source: ABdhPJxUyQFfW8OhMT9xEvfvuiP4xVQq6dXcdu+DSKoXDbKPNe5BVOkT79rhhAV1R4sINAAXWfJcDw== X-Received: by 2002:a65:5a0d:: with SMTP id y13mr3398309pgs.131.1600942094469; Thu, 24 Sep 2020 03:08:14 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id p6sm2532716pfn.63.2020.09.24.03.08.09 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Sep 2020 03:08:13 -0700 (PDT) Sender: Huacai Chen From: Huacai Chen To: Thomas Bogendoerfer , Eric Biederman , Dave Young , Baoquan He , Vivek Goyal Cc: linux-mips@vger.kernel.org, kexec@lists.infradead.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V2 1/3] MIPS: Crash kernel should be able to see old memories Date: Thu, 24 Sep 2020 18:07:57 +0800 Message-Id: <1600942079-18652-1-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Kexec-tools use mem=X@Y to pass usable memories to crash kernel, but in commit a94e4f24ec836c8984f83959 ("MIPS: init: Drop boot_mem_map") all BIOS passed memories are removed by early_parse_mem(). I think this is reasonable for a normal kernel but not for a crash kernel, because a crash kernel should be able to see all old memories, even though it is not supposed to use them. Fixes: a94e4f24ec836c8984f83959 ("MIPS: init: Drop boot_mem_map") Signed-off-by: Huacai Chen --- arch/mips/kernel/setup.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4c04a86..e2804a2 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -392,8 +392,10 @@ static int __init early_parse_mem(char *p) */ if (usermem == 0) { usermem = 1; +#ifndef CONFIG_CRASH_DUMP memblock_remove(memblock_start_of_DRAM(), memblock_end_of_DRAM() - memblock_start_of_DRAM()); +#endif } start = 0; size = memparse(p, &p); From patchwork Thu Sep 24 10:07:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 11796885 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D703D92C for ; Thu, 24 Sep 2020 10:08:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B9C47239A1 for ; Thu, 24 Sep 2020 10:08:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FTJlS9AA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726658AbgIXKIx (ORCPT ); Thu, 24 Sep 2020 06:08:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726645AbgIXKIx (ORCPT ); Thu, 24 Sep 2020 06:08:53 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58D97C0613CE for ; Thu, 24 Sep 2020 03:08:53 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id fa1so1444269pjb.0 for ; Thu, 24 Sep 2020 03:08:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=uvJYNtI3Hobw81o476oPUI52UEPmmVfBo/5Mfvs1zmE=; b=FTJlS9AA30Yk9rEl4YQrJIWLFTEgCG5otuRQQDxfLd6Cr9MgULoekakm+/jkUmSgzL jRJiT5mBPXxxdMuDxjCloYiNA6vFwEbTw1u6loNYoV5Z9UuyVHDhKdRm/lHFsP/rrKz8 aDJndvVvLO6sKP/Sg5COnEI1w9HgTv+nqYBIvm6nL9paCLJ0VpzrsrpUdpnW8VuqOV30 OPWJ9xjzxXjOpM/fWQif63eLt97tlS4c0KSRme2eSMW8tOeIJO4PWa2miZhXriaVzdYL fVqZhL3ItzkhuaMH6KHNi+Lr2flAHmeIIrXDv6cdP3neyCrkNeBjuDuoZOgHSQb5Y4j9 Apfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=uvJYNtI3Hobw81o476oPUI52UEPmmVfBo/5Mfvs1zmE=; b=X7bjn/wE8wttKwKzIbd02R3duM4bfJ8q3PAaG2iL7AIPAqj2T60qafXJ/NLUCYiUtM +gkLEtO/qT2Be2aFo9ynJD7qmu99oIACvaPCSU4r3tId2W1SuBz3MGYXSCQz3Is83M3V mXLeDDfxqFNG3v6AHI+HqjKDRnk386F4kMxG1uiJVcggJjdaf86Y82C5lANk7o1t1EOq 7DPDOVpoOwyHg3MW+xWsGkCAoXEWKqHpEKKQNjByE/bCgkl5400qsq5GbQ+M2LJsu64k Z6tpwWDKGWphKdWiRhJmSXumnVul4RBxryGlFjasa6vWmGOysLpQqmvqfAnYjkjJVuJ/ 5hzQ== X-Gm-Message-State: AOAM530JLw5nv5oXvmEhVW2tQkJHK7g9Yk+Gf21BCMbMTam86IvpQKxn mEYQ68ClGXFX9J1BIwxobr0= X-Google-Smtp-Source: ABdhPJzATR4q0OVFoghY2qt5SQqc2HlSLtpQbslZ1jTtUNRGbOZdbfdgGG01lcUhTyAd44cf4im/QA== X-Received: by 2002:a17:90b:1642:: with SMTP id il2mr3169549pjb.93.1600942132920; Thu, 24 Sep 2020 03:08:52 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id p6sm2532716pfn.63.2020.09.24.03.08.48 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Sep 2020 03:08:52 -0700 (PDT) Sender: Huacai Chen From: Huacai Chen To: Thomas Bogendoerfer , Eric Biederman , Dave Young , Baoquan He , Vivek Goyal Cc: linux-mips@vger.kernel.org, kexec@lists.infradead.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V2 2/3] MIPS: Reserve extra memory for crash dump Date: Thu, 24 Sep 2020 18:07:58 +0800 Message-Id: <1600942079-18652-2-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1600942079-18652-1-git-send-email-chenhc@lemote.com> References: <1600942079-18652-1-git-send-email-chenhc@lemote.com> Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Traditionally, MIPS's contiguous low memory can be as less as 256M, so crashkernel=X@Y may be unable to large enough in some cases. Moreover, for the "multi numa node + sparse memory model" case, it is attempt to allocate section_mem_maps on every node. Thus, if the total memory of a node is more than 1GB, we reserve the top 128MB for the crash kernel. Signed-off-by: Huacai Chen --- arch/mips/kernel/setup.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index e2804a2..90d4a2e 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -55,6 +56,10 @@ EXPORT_SYMBOL(cpu_data); struct screen_info screen_info; #endif +#ifdef CONFIG_CRASH_DUMP +static phys_addr_t crashmem_start, crashmem_size; +#endif + /* * Setup information * @@ -404,6 +409,13 @@ static int __init early_parse_mem(char *p) add_memory_region(start, size, BOOT_MEM_RAM); +#ifdef CONFIG_CRASH_DUMP + if (start && size) { + crashmem_start = start; + crashmem_size = size; + } +#endif + return 0; } early_param("mem", early_parse_mem); @@ -642,6 +654,48 @@ static void __init bootcmdline_init(void) bootcmdline_append(builtin_cmdline, COMMAND_LINE_SIZE); } +/* Traditionally, MIPS's contiguous low memory is 256M, so crashkernel=X@Y is + * unable to be large enough in some cases. Thus, if the total memory of a node + * is more than 1GB, we reserve the top 128MB for the crash kernel */ +static void reserve_crashm_region(int node, unsigned long s0, unsigned long e0) +{ +#ifdef CONFIG_KEXEC + if (crashk_res.start == crashk_res.end) + return; + + if ((e0 - s0) <= (SZ_1G >> PAGE_SHIFT)) + return; + + s0 = e0 - (SZ_128M >> PAGE_SHIFT); + + memblock_reserve(PFN_PHYS(s0), (e0 - s0) << PAGE_SHIFT); +#endif +} + +static void reserve_oldmem_region(int node, unsigned long s0, unsigned long e0) +{ +#ifdef CONFIG_CRASH_DUMP + unsigned long s1, e1; + + if (!is_kdump_kernel()) + return; + + if ((e0 - s0) > (SZ_1G >> PAGE_SHIFT)) + e0 = e0 - (SZ_128M >> PAGE_SHIFT); + + /* crashmem_start is crashk_res reserved by primary kernel */ + s1 = PFN_UP(crashmem_start); + e1 = PFN_DOWN(crashmem_start + crashmem_size); + + if (node == 0) { + memblock_reserve(PFN_PHYS(s0), (s1 - s0) << PAGE_SHIFT); + memblock_reserve(PFN_PHYS(e1), (e0 - e1) << PAGE_SHIFT); + } else { + memblock_reserve(PFN_PHYS(s0), (e0 - s0) << PAGE_SHIFT); + } +#endif +} + /* * arch_mem_init - initialize memory management subsystem * @@ -666,6 +720,9 @@ static void __init bootcmdline_init(void) */ static void __init arch_mem_init(char **cmdline_p) { + unsigned int node; + unsigned long start_pfn, end_pfn; + /* call board setup routine */ plat_mem_setup(); memblock_set_bottom_up(true); @@ -711,6 +768,12 @@ static void __init arch_mem_init(char **cmdline_p) if (crashk_res.start != crashk_res.end) memblock_reserve(crashk_res.start, resource_size(&crashk_res)); #endif + for_each_online_node(node) { + get_pfn_range_for_nid(node, &start_pfn, &end_pfn); + reserve_crashm_region(node, start_pfn, end_pfn); + reserve_oldmem_region(node, start_pfn, end_pfn); + } + device_tree_init(); /* From patchwork Thu Sep 24 10:07:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 11796889 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6BF6C92C for ; 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Thu, 24 Sep 2020 03:09:20 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id p6sm2532716pfn.63.2020.09.24.03.09.15 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Sep 2020 03:09:19 -0700 (PDT) Sender: Huacai Chen From: Huacai Chen To: Thomas Bogendoerfer , Eric Biederman , Dave Young , Baoquan He , Vivek Goyal Cc: linux-mips@vger.kernel.org, kexec@lists.infradead.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen , Jinyang He , Youling Tang Subject: [PATCH V2 3/3] MIPS: Loongson64: Add kexec/kdump support Date: Thu, 24 Sep 2020 18:07:59 +0800 Message-Id: <1600942079-18652-3-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1600942079-18652-1-git-send-email-chenhc@lemote.com> References: <1600942079-18652-1-git-send-email-chenhc@lemote.com> Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add kexec/kdump support for Loongson64 by: 1, Provide Loongson-specific kexec functions: loongson_kexec_prepare(), loongson_kexec_shutdown() and loongson_crash_shutdown(); 2, Provide Loongson-specific assembly code in kexec_smp_wait(); To start Loongson64, The boot CPU needs 3 parameters: fw_arg0: the number of arguments in cmdline (i.e., argc). fw_arg1: structure holds cmdline such as "root=/dev/sda1 console=tty" (i.e., argv). fw_arg2: environment (i.e., envp, additional boot parameters from LEFI). Non-boot CPUs do not need one parameter as the IPI mailbox base address. They query their own IPI mailbox to get PC, SP and GP in a loopi, until the boot CPU brings them up. loongson_kexec_prepare(): Setup cmdline for kexec/kdump. The kexec/kdump cmdline comes from kexec's "append" option string. This structure will be parsed in fw_init_cmdline() of arch/mips/fw/lib/cmdline.c. Both image ->control_code_page and the cmdline need to be in a safe memory region (memory allocated by the old kernel may be corrupted by the new kernel). In order to maintain compatibility for the old firmware, the low 2MB is reserverd and safe for Loongson. So let KEXEC_CTRL_CODE and KEXEC_ARGV_ ADDR be here. LEFI parameters may be corrupted at runtime, so backup it at mips_reboot_setup(), and then restore it at loongson_kexec_shutdown() /loongson_crash_shutdown(). loongson_kexec_shutdown(): Wake up all present CPUs and let them go to reboot_code_buffer. Pass the kexec parameters to kexec_args. loongson_crash_shutdown(): Pass the kdump parameters to kexec_args. The assembly part in kexec_smp_wait provide a routine as BIOS does, in order to keep secondary CPUs in a querying loop. The layout of low 2MB memory in our design: 0x80000000, the first MB, the first 64K, Exception vectors 0x80010000, the first MB, the second 64K, STR (suspend) data 0x80020000, the first MB, the third and fourth 64K, UEFI HOB 0x80040000, the first MB, the fifth 64K, RT-Thread for SMC 0x80100000, the second MB, the first 64K, KEXEC code 0x80108000, the second MB, the second 64K, KEXEC data Cc: Eric Biederman Signed-off-by: Huacai Chen Signed-off-by: Jinyang He Signed-off-by: Youling Tang --- arch/mips/kernel/relocate_kernel.S | 27 +++++++++ arch/mips/loongson64/reset.c | 111 +++++++++++++++++++++++++++++++++++++ 2 files changed, 149 insertions(+) diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S index ac87089..91b2932 100644 --- a/arch/mips/kernel/relocate_kernel.S +++ b/arch/mips/kernel/relocate_kernel.S @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -133,6 +133,32 @@ LEAF(kexec_smp_wait) #else sync #endif + +#ifdef CONFIG_CPU_LOONGSON64 + /* s0:prid s1:initfn */ + /* a0:base t1:cpuid t2:node t9:count */ + mfc0 t1, CP0_EBASE + andi t1, MIPS_EBASE_CPUNUM + dins a0, t1, 8, 2 /* insert core id*/ + dext t2, t1, 2, 2 + dins a0, t2, 44, 2 /* insert node id */ + mfc0 s0, CP0_PRID + andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK) + beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f + beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f + b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */ +1: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */ +2: li t9, 0x100 /* wait for init loop */ +3: addiu t9, -1 /* limit mailbox access */ + bnez t9, 3b + ld s1, 0x20(a0) /* get PC via mailbox reg0 */ + beqz s1, 2b + ld sp, 0x28(a0) /* get SP via mailbox reg1 */ + ld gp, 0x30(a0) /* get GP via mailbox reg2 */ + ld a1, 0x38(a0) + jr s1 /* jump to initial PC */ +#endif + j s1 END(kexec_smp_wait) #endif diff --git a/arch/mips/loongson64/reset.c b/arch/mips/loongson64/reset.c index 3bb8a1e..b1e71f37 100644 --- a/arch/mips/loongson64/reset.c +++ b/arch/mips/loongson64/reset.c @@ -6,9 +6,14 @@ * Copyright (C) 2009 Lemote, Inc. * Author: Zhangjin Wu, wuzhangjin@gmail.com */ +#include +#include #include +#include #include +#include +#include #include #include @@ -47,12 +52,120 @@ static void loongson_halt(void) } } +#ifdef CONFIG_KEXEC + +/* 0X80000000~0X80200000 is safe */ +#define MAX_ARGS 64 +#define KEXEC_CTRL_CODE 0xFFFFFFFF80100000UL +#define KEXEC_ARGV_ADDR 0xFFFFFFFF80108000UL +#define KEXEC_ARGV_SIZE COMMAND_LINE_SIZE +#define KEXEC_ENVP_SIZE 4800 + +static int kexec_argc; +static int kdump_argc; +static void *kexec_argv; +static void *kdump_argv; +static void *kexec_envp; + +static int loongson_kexec_prepare(struct kimage *image) +{ + int i, argc = 0; + unsigned int *argv; + char *str, *ptr, *bootloader = "kexec"; + + /* argv at offset 0, argv[] at offset KEXEC_ARGV_SIZE/2 */ + if (image->type == KEXEC_TYPE_DEFAULT) + argv = (unsigned int *)kexec_argv; + else + argv = (unsigned int *)kdump_argv; + + argv[argc++] = (unsigned int)(KEXEC_ARGV_ADDR + KEXEC_ARGV_SIZE/2); + + for (i = 0; i < image->nr_segments; i++) { + if (!strncmp(bootloader, (char *)image->segment[i].buf, + strlen(bootloader))) { + /* + * convert command line string to array + * of parameters (as bootloader does). + */ + int offt; + str = (char *)argv + KEXEC_ARGV_SIZE/2; + memcpy(str, image->segment[i].buf, KEXEC_ARGV_SIZE/2); + ptr = strchr(str, ' '); + + while (ptr && (argc < MAX_ARGS)) { + *ptr = '\0'; + if (ptr[1] != ' ') { + offt = (int)(ptr - str + 1); + argv[argc] = KEXEC_ARGV_ADDR + KEXEC_ARGV_SIZE/2 + offt; + argc++; + } + ptr = strchr(ptr + 1, ' '); + } + break; + } + } + + if (image->type == KEXEC_TYPE_DEFAULT) + kexec_argc = argc; + else + kdump_argc = argc; + + /* kexec/kdump need a safe page to save reboot_code_buffer */ + image->control_code_page = virt_to_page((void *)KEXEC_CTRL_CODE); + + return 0; +} + +static void loongson_kexec_shutdown(void) +{ +#ifdef CONFIG_SMP + int cpu; + + /* All CPUs go to reboot_code_buffer */ + for_each_possible_cpu(cpu) + if (!cpu_online(cpu)) + cpu_device_up(get_cpu_device(cpu)); +#endif + kexec_args[0] = kexec_argc; + kexec_args[1] = fw_arg1; + kexec_args[2] = fw_arg2; + secondary_kexec_args[0] = TO_UNCAC(0x3ff01000); + memcpy((void *)fw_arg1, kexec_argv, KEXEC_ARGV_SIZE); + memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE); +} + +static void loongson_crash_shutdown(struct pt_regs *regs) +{ + default_machine_crash_shutdown(regs); + kexec_args[0] = kdump_argc; + kexec_args[1] = fw_arg1; + kexec_args[2] = fw_arg2; + secondary_kexec_args[0] = TO_UNCAC(0x3ff01000); + memcpy((void *)fw_arg1, kdump_argv, KEXEC_ARGV_SIZE); + memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE); +} + +#endif + static int __init mips_reboot_setup(void) { _machine_restart = loongson_restart; _machine_halt = loongson_halt; pm_power_off = loongson_poweroff; +#ifdef CONFIG_KEXEC + kexec_argv = kmalloc(KEXEC_ARGV_SIZE, GFP_KERNEL); + kdump_argv = kmalloc(KEXEC_ARGV_SIZE, GFP_KERNEL); + kexec_envp = kmalloc(KEXEC_ENVP_SIZE, GFP_KERNEL); + fw_arg1 = KEXEC_ARGV_ADDR; + memcpy(kexec_envp, (void *)fw_arg2, KEXEC_ENVP_SIZE); + + _machine_kexec_prepare = loongson_kexec_prepare; + _machine_kexec_shutdown = loongson_kexec_shutdown; + _machine_crash_shutdown = loongson_crash_shutdown; +#endif + return 0; }