From patchwork Sat Oct 27 09:58:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D40B14E2 for ; Sat, 27 Oct 2018 10:01:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3F80D2BD18 for ; Sat, 27 Oct 2018 10:01:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 310E82BD27; Sat, 27 Oct 2018 10:01:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BAD512BD18 for ; Sat, 27 Oct 2018 10:01:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728448AbeJ0SkZ (ORCPT ); Sat, 27 Oct 2018 14:40:25 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46128 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728337AbeJ0SkZ (ORCPT ); Sat, 27 Oct 2018 14:40:25 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 349935D1EAD16; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:47 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Greg Kroah-Hartman , "Rob Herring" , Mark Rutland , "John Stultz" Subject: [PATCH 01/10] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs Date: Sat, 27 Oct 2018 17:58:11 +0800 Message-ID: <20181027095820.40056-2-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding descriptions to support the dwc3 controller on HiSilicon SoCs and boards like the HiKey960. Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: John Stultz Signed-off-by: Yu Chen --- .../devicetree/bindings/usb/dwc3-hisi.txt | 53 ++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt new file mode 100644 index 000000000000..e715e7b1c324 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt @@ -0,0 +1,53 @@ +HiSilicon DWC3 USB SoC controller + +This file documents the parameters for the dwc3-hisi driver. + +Required properties: +- compatible: should be "hisilicon,hi3660-dwc3" +- clocks: A list of phandle + clock-specifier pairs for the + clocks listed in clock-names +- clock-names: Specify clock names +- resets: list of phandle and reset specifier pairs. + +Sub-nodes: +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the +example below. The DT binding details of dwc3 can be found in: +Documentation/devicetree/bindings/usb/dwc3.txt + +Example: + usb3: hisi_dwc3 { + compatible = "hisilicon,hi3660-dwc3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, + <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; + clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; + assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; + assigned-clock-rates = <229000000>; + resets = <&crg_rst 0x90 8>, + <&crg_rst 0x90 7>, + <&crg_rst 0x90 6>, + <&crg_rst 0x90 5>; + + dwc3: dwc3@ff100000 { + compatible = "snps,dwc3"; + reg = <0x0 0xff100000 0x0 0x100000>; + interrupts = <0 159 4>, <0 161 4>; + phys = <&usb_phy>; + phy-names = "usb3-phy"; + dr_mode = "otg"; + maximum-speed = "super-speed"; + phy_type = "utmi"; + snps,dis-del-phy-power-chg-quirk; + snps,lfps_filter_quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,tx_de_emphasis_quirk; + snps,tx_de_emphasis = <1>; + snps,dis_enblslpm_quirk; + snps,gctl-reset-quirk; + extcon = <&hisi_hikey_usb>; + }; + }; From patchwork Sat Oct 27 09:58:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658319 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3B85E14E2 for ; Sat, 27 Oct 2018 10:00:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 30D082BD18 for ; Sat, 27 Oct 2018 10:00:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 24DAC2BD27; Sat, 27 Oct 2018 10:00:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB2452BD18 for ; Sat, 27 Oct 2018 10:00:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728516AbeJ0Sk1 (ORCPT ); Sat, 27 Oct 2018 14:40:27 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46133 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728430AbeJ0Sk1 (ORCPT ); Sat, 27 Oct 2018 14:40:27 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 40C724C9CA182; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:48 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Rob Herring , Mark Rutland , John Stultz , Binghui Wang Subject: [PATCH 02/10] dt-bindings: phy: Add support for HiSilicon's hi3660 USB PHY Date: Sat, 27 Oct 2018 17:58:12 +0800 Message-ID: <20181027095820.40056-3-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding documentation for supporting the hi3660 usb phy on boards like the HiKey960. Cc: Rob Herring Cc: Mark Rutland Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- .../devicetree/bindings/phy/phy-hi3660-usb3.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt diff --git a/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt b/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt new file mode 100644 index 000000000000..26cab738ac7b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt @@ -0,0 +1,21 @@ +Hisilicon hi3660 usb PHY +----------------------- + +Required properties: +- compatible: should be "hisilicon,hi3660-usb-phy" +- #phy-cells: must be 0 +- hisilicon,pericrg-syscon: phandle of syscon used to control phy. +- hisilicon,pctrl-syscon: phandle of syscon used to control phy. +- hisilicon,usb3-otg-bc-syscon: phandle of syscon used to control phy. +- eye-diagram-param: parameter set for phy +Refer to phy/phy-bindings.txt for the generic PHY binding properties + +Example: + usb_phy: usbphy { + compatible = "hisilicon,hi3660-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,usb3-otg-bc-syscon = <&usb3_otg_bc>; + eye-diagram-param = <0x22466e4>; + }; From patchwork Sat Oct 27 09:58:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658323 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D99201734 for ; Sat, 27 Oct 2018 10:00:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CECCE2BD18 for ; Sat, 27 Oct 2018 10:00:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2BAB2BD27; Sat, 27 Oct 2018 10:00:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6575F2BD18 for ; Sat, 27 Oct 2018 10:00:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728653AbeJ0SlR (ORCPT ); Sat, 27 Oct 2018 14:41:17 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46127 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728436AbeJ0Sk0 (ORCPT ); Sat, 27 Oct 2018 14:40:26 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 267112E704695; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:48 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Rob Herring , Mark Rutland , John Stultz , Binghui Wang Subject: [PATCH 03/10] dt-bindings: misc: Add bindings for HiSilicon usb hub and data role switch functionality on HiKey960 Date: Sat, 27 Oct 2018 17:58:13 +0800 Message-ID: <20181027095820.40056-4-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding documentation to support usb hub and usb data role switch of Hisilicon HiKey&HiKey960 Board. Cc: Rob Herring Cc: Mark Rutland Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- .../bindings/misc/hisilicon-hikey-usb.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/hisilicon-hikey-usb.txt diff --git a/Documentation/devicetree/bindings/misc/hisilicon-hikey-usb.txt b/Documentation/devicetree/bindings/misc/hisilicon-hikey-usb.txt new file mode 100644 index 000000000000..f94e990362c9 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/hisilicon-hikey-usb.txt @@ -0,0 +1,24 @@ +Support usb hub and usb data role switch of Hisilicon HiKey&HiKey960 Board. + +----------------------------- + +Required properties: +- compatible: "hisilicon,gpio_hubv1","hisilicon,hikey960_usb" +- typc_vbus_int_gpio,typec-gpios: gpio to control the vbus of typeC port +- typc_vbus_enable_val: gpio value that enable the vbus of typeC port +- otg_gpio: gpio to switch DP&DM between the hub and typeC port +- hub_vdd33_en_gpio: gpio to enable the power of hub +- pinctrl-0: pinctrl config + +Example +----- + + hisi_hikey_usb: hisi_hikey_usb { + compatible = "hisilicon,hikey960_usb"; + typc_vbus_int_gpio,typec-gpios = <&gpio25 2 0>; + typc_vbus_enable_val = <1>; + otg_gpio = <&gpio25 6 0>; + hub_vdd33_en_gpio = <&gpio5 6 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usbhub5734_pmx_func>; + }; From patchwork Sat Oct 27 09:58:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8526C1734 for ; Sat, 27 Oct 2018 10:00:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76A702BD18 for ; Sat, 27 Oct 2018 10:00:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6AB7A2BD27; Sat, 27 Oct 2018 10:00:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 88C3E2BD18 for ; Sat, 27 Oct 2018 10:00:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728544AbeJ0Sk3 (ORCPT ); Sat, 27 Oct 2018 14:40:29 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46153 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728437AbeJ0Sk3 (ORCPT ); Sat, 27 Oct 2018 14:40:29 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 463EF8D2C21A9; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:49 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Felipe Balbi , Greg Kroah-Hartman , "David S. Miller" , "Mauro Carvalho Chehab" , Andrew Morton , Arnd Bergmann , John Stultz , Binghui Wang Subject: [PATCH 04/10] usb: dwc3: dwc3-hisi: Add code for dwc3 of Hisilicon Soc Platform Date: Sat, 27 Oct 2018 17:58:14 +0800 Message-ID: <20181027095820.40056-5-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This driver handles the poweron and shutdown of dwc3 core on Hisilicon Soc Platform. Cc: Felipe Balbi Cc: Greg Kroah-Hartman Cc: "David S. Miller" Cc: Mauro Carvalho Chehab Cc: Andrew Morton Cc: Arnd Bergmann Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- MAINTAINERS | 8 ++ drivers/usb/dwc3/Kconfig | 8 ++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-hisi.c | 335 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 352 insertions(+) create mode 100644 drivers/usb/dwc3/dwc3-hisi.c diff --git a/MAINTAINERS b/MAINTAINERS index fdb6a298c7e7..e485449f7811 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15288,6 +15288,14 @@ L: linux-usb@vger.kernel.org S: Maintained F: drivers/usb/roles/intel-xhci-usb-role-switch.c +USB IP DRIVER FOR HISILICON KIRIN +M: Yu Chen +M: Binghui Wang +L: linux-usb@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/usb/dwc3-hisi.txt +F: drivers/usb/dwc3/dwc3-hisi.c + USB ISP116X DRIVER M: Olav Kongas L: linux-usb@vger.kernel.org diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 1a0404fda596..09d105a2b53a 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -123,4 +123,12 @@ config USB_DWC3_QCOM for peripheral mode support. Say 'Y' or 'M' if you have one such device. +config USB_DWC3_HISI + tristate "HiSilicon Kirin Platforms" + depends on ((ARCH_HISI && ARM64) || COMPILE_TEST) && OF + default USB_DWC3 + help + Support USB2/3 functionality in HiSilicon Kirin platforms. + Say 'Y' or 'M' if you have one such device. + endif diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 6e3ef6144e5d..15781455e3f0 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -50,3 +50,4 @@ obj-$(CONFIG_USB_DWC3_KEYSTONE) += dwc3-keystone.o obj-$(CONFIG_USB_DWC3_OF_SIMPLE) += dwc3-of-simple.o obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o obj-$(CONFIG_USB_DWC3_QCOM) += dwc3-qcom.o +obj-$(CONFIG_USB_DWC3_HISI) += dwc3-hisi.o diff --git a/drivers/usb/dwc3/dwc3-hisi.c b/drivers/usb/dwc3/dwc3-hisi.c new file mode 100644 index 000000000000..6e9787d420a7 --- /dev/null +++ b/drivers/usb/dwc3/dwc3-hisi.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: GPL-2.0+ +/** + * dwc3-hisi.c - Support for dwc3 platform devices on HiSilicon platforms + * + * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd. + * http://www.huawei.com + * + * Authors: Yu Chen + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 of + * the License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct dwc3_hisi { + struct device *dev; + struct clk **clks; + int num_clocks; + struct reset_control **rstcs; + int num_rstcs; +}; + +struct dwc3_hisi *g_dwc3_hisi; + +static int dwc3_hisi_init_clks(struct dwc3_hisi *dwc3_hisi, + struct device_node *np) +{ + struct device *dev = dwc3_hisi->dev; + int i; + + dwc3_hisi->num_clocks = of_clk_get_parent_count(np); + if (!dwc3_hisi->num_clocks) + return -ENOENT; + + dwc3_hisi->clks = devm_kcalloc(dev, dwc3_hisi->num_clocks, + sizeof(struct clk *), GFP_KERNEL); + if (!dwc3_hisi->clks) + return -ENOMEM; + + for (i = 0; i < dwc3_hisi->num_clocks; i++) { + struct clk *clk; + + clk = of_clk_get(np, i); + if (IS_ERR(clk)) { + while (--i >= 0) + clk_put(dwc3_hisi->clks[i]); + + return PTR_ERR(clk); + } + + dwc3_hisi->clks[i] = clk; + } + + return 0; +} + +static int dwc3_hisi_enable_clks(struct dwc3_hisi *dwc3_hisi) +{ + int i; + int ret; + + for (i = 0; i < dwc3_hisi->num_clocks; i++) { + ret = clk_prepare_enable(dwc3_hisi->clks[i]); + if (ret < 0) { + while (--i >= 0) + clk_disable_unprepare(dwc3_hisi->clks[i]); + + return ret; + } + } + + return 0; +} + +static void dwc3_hisi_disable_clks(struct dwc3_hisi *dwc3_hisi) +{ + int i; + + for (i = 0; i < dwc3_hisi->num_clocks; i++) + clk_disable_unprepare(dwc3_hisi->clks[i]); +} + +static int dwc3_hisi_get_rstcs(struct dwc3_hisi *dwc3_hisi, + struct device_node *np) +{ + struct device *dev = dwc3_hisi->dev; + int i; + + dwc3_hisi->num_rstcs = of_count_phandle_with_args(np, + "resets", "#reset-cells"); + if (!dwc3_hisi->num_rstcs) + return -ENOENT; + + dwc3_hisi->rstcs = devm_kcalloc(dev, dwc3_hisi->num_rstcs, + sizeof(struct reset_control *), GFP_KERNEL); + if (!dwc3_hisi->rstcs) + return -ENOMEM; + + for (i = 0; i < dwc3_hisi->num_rstcs; i++) { + struct reset_control *rstc; + + rstc = of_reset_control_get_shared_by_index(np, i); + if (IS_ERR(rstc)) { + while (--i >= 0) + reset_control_put(dwc3_hisi->rstcs[i]); + return PTR_ERR(rstc); + } + + dwc3_hisi->rstcs[i] = rstc; + } + + return 0; +} + +static int dwc3_hisi_reset_control_assert(struct dwc3_hisi *dwc3_hisi) +{ + int i, ret; + + for (i = dwc3_hisi->num_rstcs - 1; i >= 0 ; i--) { + ret = reset_control_assert(dwc3_hisi->rstcs[i]); + if (ret) { + while (--i >= 0) + reset_control_deassert(dwc3_hisi->rstcs[i]); + return ret; + } + udelay(10); + } + + return 0; +} + +static int dwc3_hisi_reset_control_deassert(struct dwc3_hisi *dwc3_hisi) +{ + int i, ret; + + for (i = 0; i < dwc3_hisi->num_rstcs; i++) { + ret = reset_control_deassert(dwc3_hisi->rstcs[i]); + if (ret) { + while (--i >= 0) + reset_control_assert(dwc3_hisi->rstcs[i]); + return ret; + } + udelay(10); + } + + return 0; +} + +static int dwc3_hisi_probe(struct platform_device *pdev) +{ + struct dwc3_hisi *dwc3_hisi; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + + int ret; + int i; + + dwc3_hisi = devm_kzalloc(dev, sizeof(*dwc3_hisi), GFP_KERNEL); + if (!dwc3_hisi) + return -ENOMEM; + + platform_set_drvdata(pdev, dwc3_hisi); + dwc3_hisi->dev = dev; + + ret = dwc3_hisi_init_clks(dwc3_hisi, np); + if (ret) { + dev_err(dev, "could not get clocks\n"); + return ret; + } + + ret = dwc3_hisi_enable_clks(dwc3_hisi); + if (ret) { + dev_err(dev, "could not enable clocks\n"); + goto err_put_clks; + } + + ret = dwc3_hisi_get_rstcs(dwc3_hisi, np); + if (ret) { + dev_err(dev, "could not get reset controllers\n"); + goto err_disable_clks; + } + ret = dwc3_hisi_reset_control_deassert(dwc3_hisi); + if (ret) { + dev_err(dev, "reset control deassert failed\n"); + goto err_put_rstcs; + } + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_get_sync(dev); + + ret = of_platform_populate(np, NULL, NULL, dev); + if (ret) { + dev_err(dev, "failed to add dwc3 core\n"); + goto err_reset_assert; + } + + dev_err(dev, "finish dwc3 hisi probe\n"); + + g_dwc3_hisi = dwc3_hisi; + return 0; + +err_reset_assert: + ret = dwc3_hisi_reset_control_assert(dwc3_hisi); + if (ret) + dev_err(dev, "reset control assert failed\n"); +err_put_rstcs: + for (i = 0; i < dwc3_hisi->num_rstcs; i++) + reset_control_put(dwc3_hisi->rstcs[i]); +err_disable_clks: + dwc3_hisi_disable_clks(dwc3_hisi); +err_put_clks: + for (i = 0; i < dwc3_hisi->num_clocks; i++) + clk_put(dwc3_hisi->clks[i]); + + return ret; +} + +static int dwc3_hisi_remove(struct platform_device *pdev) +{ + struct dwc3_hisi *dwc3_hisi = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + int i, ret; + + of_platform_depopulate(dev); + + ret = dwc3_hisi_reset_control_assert(dwc3_hisi); + if (ret) { + dev_err(dev, "reset control assert failed\n"); + return ret; + } + + for (i = 0; i < dwc3_hisi->num_clocks; i++) { + clk_disable_unprepare(dwc3_hisi->clks[i]); + clk_put(dwc3_hisi->clks[i]); + } + + pm_runtime_put_sync(dev); + pm_runtime_disable(dev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int dwc3_hisi_suspend(struct device *dev) +{ + struct dwc3_hisi *dwc3_hisi = dev_get_drvdata(dev); + int ret; + + dev_info(dev, "%s\n", __func__); + + ret = dwc3_hisi_reset_control_assert(dwc3_hisi); + if (ret) { + dev_err(dev, "reset control assert failed\n"); + return ret; + } + + dwc3_hisi_disable_clks(dwc3_hisi); + + pinctrl_pm_select_default_state(dev); + + return 0; +} + +static int dwc3_hisi_resume(struct device *dev) +{ + struct dwc3_hisi *dwc3_hisi = dev_get_drvdata(dev); + int ret; + + dev_info(dev, "%s\n", __func__); + pinctrl_pm_select_default_state(dev); + + ret = dwc3_hisi_enable_clks(dwc3_hisi); + if (ret) { + dev_err(dev, "could not enable clocks\n"); + return ret; + } + + ret = dwc3_hisi_reset_control_deassert(dwc3_hisi); + if (ret) { + dev_err(dev, "reset control deassert failed\n"); + return ret; + } + + /* Wait for clock stable */ + msleep(100); + + return 0; +} +#endif /* CONFIG_PM_SLEEP */ + +static SIMPLE_DEV_PM_OPS(dwc3_hisi_dev_pm_ops, + dwc3_hisi_suspend, dwc3_hisi_resume); + +static const struct of_device_id dwc3_hisi_match[] = { + { .compatible = "hisilicon,hi3660-dwc3" }, + { /* sentinel */ }, +}; + +MODULE_DEVICE_TABLE(of, dwc3_hisi_match); + +static struct platform_driver dwc3_hisi_driver = { + .probe = dwc3_hisi_probe, + .remove = dwc3_hisi_remove, + .driver = { + .name = "usb-hisi-dwc3", + .of_match_table = dwc3_hisi_match, + .pm = &dwc3_hisi_dev_pm_ops, + }, +}; + +module_platform_driver(dwc3_hisi_driver); + +MODULE_AUTHOR("Yu Chen "); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("DesignWare USB3 HiSilicon Glue Layer"); From patchwork Sat Oct 27 09:58:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 574C014E2 for ; Sat, 27 Oct 2018 10:00:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E2232BD18 for ; Sat, 27 Oct 2018 10:00:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3EE0E2BD27; Sat, 27 Oct 2018 10:00:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B011F2BD18 for ; Sat, 27 Oct 2018 10:00:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728485AbeJ0Sk0 (ORCPT ); Sat, 27 Oct 2018 14:40:26 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46131 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728434AbeJ0SkZ (ORCPT ); Sat, 27 Oct 2018 14:40:25 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3AAE9A5806C17; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:50 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Felipe Balbi , Greg Kroah-Hartman , John Stultz , "Binghui Wang" Subject: [PATCH 05/10] usb: dwc3: Add two quirks for Hisilicon Kirin Soc Platform Date: Sat, 27 Oct 2018 17:58:15 +0800 Message-ID: <20181027095820.40056-6-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are tow quirks for DesignWare USB3 DRD Core of Hisilicon Kirin Soc. 1)SPLIT_BOUNDARY_DISABLE should be set for Host mode 2)A GCTL soft reset should be executed when switch mode Cc: Felipe Balbi Cc: Greg Kroah-Hartman Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- drivers/usb/dwc3/core.c | 43 +++++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 7 +++++++ drivers/usb/dwc3/gadget.c | 2 +- 3 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index becfbb87f791..68c29e549bfb 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -111,11 +111,25 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) dwc->current_dr_role = mode; } +static void dwc3_gctl_core_soft_reset(struct dwc3 *dwc) +{ + int reg; + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg |= (DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc = work_to_dwc(work); unsigned long flags; int ret; + int reg; if (dwc->dr_mode != USB_DR_MODE_OTG) return; @@ -168,9 +182,18 @@ static void __dwc3_set_mode(struct work_struct *work) phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); phy_calibrate(dwc->usb2_generic_phy); + if (dwc->dis_split_quirk) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); + reg |= DWC3_GUCTL3_SPLITDISABLE; + dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); + } } break; case DWC3_GCTL_PRTCAP_DEVICE: + /* Execute a GCTL Core Soft Reset when switch mode */ + if (dwc->gctl_reset_quirk) + dwc3_gctl_core_soft_reset(dwc); + dwc3_event_buffers_setup(dwc); if (dwc->usb2_phy) @@ -1298,6 +1321,11 @@ static void dwc3_get_properties(struct dwc3 *dwc) dwc->dis_metastability_quirk = device_property_read_bool(dev, "snps,dis_metastability_quirk"); + dwc->dis_split_quirk = device_property_read_bool(dev, + "snps,dis-split-quirk"); + dwc->gctl_reset_quirk = device_property_read_bool(dev, + "snps,gctl-reset-quirk"); + dwc->lpm_nyet_threshold = lpm_nyet_threshold; dwc->tx_de_emphasis = tx_de_emphasis; @@ -1815,10 +1843,25 @@ static int dwc3_resume(struct device *dev) return 0; } + +static void dwc3_complete(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + u32 reg; + + if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && + dwc->dis_split_quirk) { + dev_dbg(dwc->dev, "set DWC3_GUCTL3_SPLITDISABLE\n"); + reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); + reg |= DWC3_GUCTL3_SPLITDISABLE; + dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); + } +} #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) + .complete = dwc3_complete, SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, dwc3_runtime_idle) }; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 5bfb62533e0f..b3cea95f7720 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -135,6 +135,7 @@ #define DWC3_GEVNTCOUNT(n) (0xc40c + ((n) * 0x10)) #define DWC3_GHWPARAMS8 0xc600 +#define DWC3_GUCTL3 0xc60c #define DWC3_GFLADJ 0xc630 /* Device Registers */ @@ -359,6 +360,9 @@ /* Global User Control Register 2 */ #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14) +/* Global User Control Register 3 */ +#define DWC3_GUCTL3_SPLITDISABLE BIT(14) + /* Device Configuration Register */ #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) @@ -1168,6 +1172,9 @@ struct dwc3 { unsigned dis_metastability_quirk:1; + unsigned dis_split_quirk:1; + unsigned gctl_reset_quirk:1; + u16 imod_interval; }; diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 679c12e14522..cd54ad3eaf01 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -269,7 +269,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, { const struct usb_endpoint_descriptor *desc = dep->endpoint.desc; struct dwc3 *dwc = dep->dwc; - u32 timeout = 1000; + u32 timeout = 5000; u32 saved_config = 0; u32 reg; From patchwork Sat Oct 27 09:58:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658313 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7274314E2 for ; Sat, 27 Oct 2018 10:00:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 683D92BD18 for ; Sat, 27 Oct 2018 10:00:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B9992BD27; Sat, 27 Oct 2018 10:00:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 292052BD18 for ; Sat, 27 Oct 2018 10:00:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728590AbeJ0Skd (ORCPT ); Sat, 27 Oct 2018 14:40:33 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46205 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728430AbeJ0Skc (ORCPT ); Sat, 27 Oct 2018 14:40:32 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 4E9AA7001F6FA; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:51 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Kishon Vijay Abraham I , "David S. Miller" , Greg Kroah-Hartman , Mauro Carvalho Chehab , Andrew Morton , "Arnd Bergmann" , Shawn Guo , Pengcheng Li , Jianguo Sun , Masahiro Yamada , Jiancheng Xue , John Stultz , Binghui Wang Subject: [PATCH 06/10] phy: Add usb phy support for hi3660 Soc of Hisilicon Date: Sat, 27 Oct 2018 17:58:16 +0800 Message-ID: <20181027095820.40056-7-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This driver handles usb phy power on and shutdown for hi3660 Soc of Hisilicon. Cc: Kishon Vijay Abraham I Cc: "David S. Miller" Cc: Greg Kroah-Hartman Cc: Mauro Carvalho Chehab Cc: Andrew Morton Cc: Arnd Bergmann Cc: Shawn Guo Cc: Pengcheng Li Cc: Jianguo Sun Cc: Masahiro Yamada Cc: Jiancheng Xue Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- MAINTAINERS | 2 + drivers/phy/hisilicon/Kconfig | 10 ++ drivers/phy/hisilicon/Makefile | 1 + drivers/phy/hisilicon/phy-hi3660-usb3.c | 254 ++++++++++++++++++++++++++++++++ 4 files changed, 267 insertions(+) create mode 100644 drivers/phy/hisilicon/phy-hi3660-usb3.c diff --git a/MAINTAINERS b/MAINTAINERS index e485449f7811..7adf167588ee 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15294,7 +15294,9 @@ M: Binghui Wang L: linux-usb@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/usb/dwc3-hisi.txt +F: Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt F: drivers/usb/dwc3/dwc3-hisi.c +F: drivers/phy/hisilicon/phy-hi3660-usb3.c USB ISP116X DRIVER M: Olav Kongas diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig index b40ee54a1a50..3c142f08987c 100644 --- a/drivers/phy/hisilicon/Kconfig +++ b/drivers/phy/hisilicon/Kconfig @@ -12,6 +12,16 @@ config PHY_HI6220_USB To compile this driver as a module, choose M here. +config PHY_HI3660_USB + tristate "hi3660 USB PHY support" + depends on (ARCH_HISI && ARM64) || COMPILE_TEST + select GENERIC_PHY + select MFD_SYSCON + help + Enable this to support the HISILICON HI3660 USB PHY. + + To compile this driver as a module, choose M here. + config PHY_HISTB_COMBPHY tristate "HiSilicon STB SoCs COMBPHY support" depends on (ARCH_HISI && ARM64) || COMPILE_TEST diff --git a/drivers/phy/hisilicon/Makefile b/drivers/phy/hisilicon/Makefile index f662a4fe18d8..75ba64e2faf8 100644 --- a/drivers/phy/hisilicon/Makefile +++ b/drivers/phy/hisilicon/Makefile @@ -1,4 +1,5 @@ obj-$(CONFIG_PHY_HI6220_USB) += phy-hi6220-usb.o +obj-$(CONFIG_PHY_HI3660_USB) += phy-hi3660-usb3.o obj-$(CONFIG_PHY_HISTB_COMBPHY) += phy-histb-combphy.o obj-$(CONFIG_PHY_HISI_INNO_USB2) += phy-hisi-inno-usb2.o obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o diff --git a/drivers/phy/hisilicon/phy-hi3660-usb3.c b/drivers/phy/hisilicon/phy-hi3660-usb3.c new file mode 100644 index 000000000000..041c542750e2 --- /dev/null +++ b/drivers/phy/hisilicon/phy-hi3660-usb3.c @@ -0,0 +1,254 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Phy provider for USB 3.0 controller on HiSilicon 3660 platform + * + * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd. + * http://www.huawei.com + * + * Authors: Yu Chen + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 of + * the License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define PERI_CRG_CLK_EN4 (0x40) +#define PERI_CRG_CLK_DIS4 (0x44) +#define GT_CLK_USB3OTG_REF BIT(0) +#define GT_ACLK_USB3OTG BIT(1) + +#define PERI_CRG_RSTEN4 (0x90) +#define PERI_CRG_RSTDIS4 (0x94) +#define IP_RST_USB3OTGPHY_POR BIT(3) +#define IP_RST_USB3OTG BIT(5) + +#define PERI_CRG_ISODIS (0x148) +#define USB_REFCLK_ISO_EN BIT(25) + +#define PCTRL_PERI_CTRL3 (0x10) +#define PCTRL_PERI_CTRL3_MSK_START (16) +#define USB_TCXO_EN BIT(1) + +#define PCTRL_PERI_CTRL24 (0x64) +#define SC_CLK_USB3PHY_3MUX1_SEL BIT(25) + +#define USBOTG3_CTRL0 (0x00) +#define SC_USB3PHY_ABB_GT_EN BIT(15) + +#define USBOTG3_CTRL2 (0x08) +#define USBOTG3CTRL2_POWERDOWN_HSP BIT(0) +#define USBOTG3CTRL2_POWERDOWN_SSP BIT(1) + +#define USBOTG3_CTRL3 (0x0C) +#define USBOTG3_CTRL3_VBUSVLDEXT BIT(6) +#define USBOTG3_CTRL3_VBUSVLDEXTSEL BIT(5) + +#define USBOTG3_CTRL4 (0x10) + +#define USBOTG3_CTRL7 (0x1c) +#define REF_SSP_EN BIT(16) + +#define HI3660_USB_DEFAULT_PHY_PARAM (0x1c466e3) + +struct hi3660_priv { + struct device *dev; + struct regmap *peri_crg; + struct regmap *pctrl; + struct regmap *otg_bc; + u32 eye_diagram_param; + + u32 peri_crg_offset; + u32 pctrl_offset; + u32 otg_bc_offset; +}; + +static int hi3660_phy_init(struct phy *phy) +{ + struct hi3660_priv *priv = phy_get_drvdata(phy); + u32 val, mask; + int ret; + + /* usb refclk iso disable */ + ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); + if (ret) + goto out; + + /* enable usb_tcxo_en */ + val = USB_TCXO_EN | (USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START); + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); + if (ret) + goto out; + + /* select usbphy clk from abb */ + mask = SC_CLK_USB3PHY_3MUX1_SEL; + ret = regmap_update_bits(priv->pctrl, PCTRL_PERI_CTRL24, mask, 0); + if (ret) + goto out; + + /* assert phy */ + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); + if (ret) + goto out; + + /* enable phy ref clk */ + val = SC_USB3PHY_ABB_GT_EN; + mask = val; + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val); + if (ret) + goto out; + + val = REF_SSP_EN; + mask = val; + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val); + if (ret) + goto out; + + /* exit from IDDQ mode */ + mask = USBOTG3CTRL2_POWERDOWN_HSP | USBOTG3CTRL2_POWERDOWN_SSP; + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0); + if (ret) + goto out; + + udelay(100); + + /* deassert phy */ + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTDIS4, val); + if (ret) + goto out; + + usleep_range(10000, 15000); + + /* fake vbus valid signal */ + val = USBOTG3_CTRL3_VBUSVLDEXT | USBOTG3_CTRL3_VBUSVLDEXTSEL; + mask = val; + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL3, mask, val); + if (ret) + goto out; + + udelay(100); + + ret = regmap_write(priv->otg_bc, USBOTG3_CTRL4, + priv->eye_diagram_param); + if (ret) + goto out; + + return 0; +out: + dev_err(priv->dev, "failed to init phy ret: %d\n", ret); + return ret; +} + +static int hi3660_phy_exit(struct phy *phy) +{ + struct hi3660_priv *priv = phy_get_drvdata(phy); + u32 val, mask; + int ret; + + /* assert phy */ + val = IP_RST_USB3OTGPHY_POR; + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); + if (ret) + goto out; + + val = SC_CLK_USB3PHY_3MUX1_SEL; + mask = SC_CLK_USB3PHY_3MUX1_SEL; + ret = regmap_update_bits(priv->pctrl, PCTRL_PERI_CTRL24, mask, val); + if (ret) + goto out; + + /* disable usb_tcxo_en */ + val = USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START; + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); + if (ret) + goto out; + + return 0; +out: + dev_err(priv->dev, "failed to exit phy ret: %d\n", ret); + return ret; +} + +static struct phy_ops hi3660_phy_ops = { + .init = hi3660_phy_init, + .exit = hi3660_phy_exit, + .owner = THIS_MODULE, +}; + +static int hi3660_phy_probe(struct platform_device *pdev) +{ + struct phy_provider *phy_provider; + struct device *dev = &pdev->dev; + struct phy *phy; + struct hi3660_priv *priv; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = dev; + priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node, + "hisilicon,pericrg-syscon"); + if (IS_ERR(priv->peri_crg)) { + dev_err(dev, "no hisilicon,pericrg-syscon\n"); + return PTR_ERR(priv->peri_crg); + } + + priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node, + "hisilicon,pctrl-syscon"); + if (IS_ERR(priv->pctrl)) { + dev_err(dev, "no hisilicon,pctrl-syscon\n"); + return PTR_ERR(priv->pctrl); + } + + priv->otg_bc = syscon_regmap_lookup_by_phandle(dev->of_node, + "hisilicon,usb3-otg-bc-syscon"); + if (IS_ERR(priv->otg_bc)) { + dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n"); + return PTR_ERR(priv->otg_bc); + } + + if (of_property_read_u32(dev->of_node, "eye-diagram-param", + &(priv->eye_diagram_param))) + priv->eye_diagram_param = HI3660_USB_DEFAULT_PHY_PARAM; + + phy = devm_phy_create(dev, NULL, &hi3660_phy_ops); + if (IS_ERR(phy)) + return PTR_ERR(phy); + + phy_set_drvdata(phy, priv); + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id hi3660_phy_of_match[] = { + {.compatible = "hisilicon,hi3660-usb-phy",}, + { }, +}; +MODULE_DEVICE_TABLE(of, hi3660_phy_of_match); + +static struct platform_driver hi3660_phy_driver = { + .probe = hi3660_phy_probe, + .driver = { + .name = "hi3660-usb-phy", + .of_match_table = hi3660_phy_of_match, + } +}; +module_platform_driver(hi3660_phy_driver); + +MODULE_AUTHOR("Yu Chen "); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Hilisicon Hi3660 USB3 PHY Driver"); From patchwork Sat Oct 27 09:58:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658315 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 627831734 for ; Sat, 27 Oct 2018 10:00:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 572A12BD18 for ; Sat, 27 Oct 2018 10:00:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B0982BD27; Sat, 27 Oct 2018 10:00:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 61E122BD18 for ; Sat, 27 Oct 2018 10:00:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728571AbeJ0Ska (ORCPT ); Sat, 27 Oct 2018 14:40:30 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46204 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728434AbeJ0Sk3 (ORCPT ); Sat, 27 Oct 2018 14:40:29 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 586D043BDF76D; Sat, 27 Oct 2018 17:59:57 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:52 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Arnd Bergmann , Greg Kroah-Hartman , John Stultz , "Binghui Wang" Subject: [PATCH 07/10] hikey960: Support usb functionality of Hikey960 Date: Sat, 27 Oct 2018 17:58:17 +0800 Message-ID: <20181027095820.40056-8-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This driver handles usb hub power on and typeC port event of HiKey960 board: 1)DP&DM switching between usb hub and typeC port base on typeC port state 2)Control power of usb hub on Hikey960 3)Control vbus of typeC port 4)Handle typeC port event to switch data role Cc: Arnd Bergmann Cc: Greg Kroah-Hartman Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/hisi_hikey_usb.c | 319 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 327 insertions(+) create mode 100644 drivers/misc/hisi_hikey_usb.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3726eacdf65d..8e04fc87b685 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -513,6 +513,13 @@ config MISC_RTSX tristate default MISC_RTSX_PCI || MISC_RTSX_USB +config HISI_HIKEY_USB + tristate "USB functionality of HiSilicon Hikey Platform" + depends on GPIOLIB + default n + help + If you say yes here you get support for usb functionality of HiSilicon Hikey Platform. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index af22bbc3d00c..387dd302815c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -58,3 +58,4 @@ obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-$(CONFIG_MISC_RTSX) += cardreader/ +obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o diff --git a/drivers/misc/hisi_hikey_usb.c b/drivers/misc/hisi_hikey_usb.c new file mode 100644 index 000000000000..4965719c99ae --- /dev/null +++ b/drivers/misc/hisi_hikey_usb.c @@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * hisi_hikey_usb.c + * + * Copyright (c) Hisilicon Tech. Co., Ltd. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DEVICE_DRIVER_NAME "hisi_hikey_usb" + +#define HUB_VBUS_POWER_ON 1 +#define HUB_VBUS_POWER_OFF 0 +#define USB_SWITCH_TO_HUB 1 +#define USB_SWITCH_TO_TYPEC 0 + +#define INVALID_GPIO_VALUE (-1) + +struct hisi_hikey_usb { + int otg_switch_gpio; + int typec_vbus_gpio; + int typec_vbus_enable_val; + int hub_vbus_gpio; + + struct extcon_dev *edev; + struct usb_role_switch *role_sw; +}; + +static const unsigned int usb_extcon_cable[] = { + EXTCON_USB, + EXTCON_USB_HOST, + EXTCON_NONE, +}; + +static void hub_power_ctrl(struct hisi_hikey_usb *hisi_hikey_usb, int value) +{ + int gpio = hisi_hikey_usb->hub_vbus_gpio; + + if (gpio_is_valid(gpio)) + gpio_set_value(gpio, value); +} + +static void usb_switch_ctrl(struct hisi_hikey_usb *hisi_hikey_usb, + int switch_to) +{ + int gpio = hisi_hikey_usb->otg_switch_gpio; + const char *switch_to_str = (switch_to == USB_SWITCH_TO_HUB) ? + "hub" : "typec"; + + if (!gpio_is_valid(gpio)) { + pr_err("%s: otg_switch_gpio is err\n", __func__); + return; + } + + if (gpio_get_value(gpio) == switch_to) { + pr_info("%s: already switch to %s\n", __func__, switch_to_str); + return; + } + + gpio_direction_output(gpio, switch_to); + pr_info("%s: switch to %s\n", __func__, switch_to_str); +} + +static void usb_typec_power_ctrl(struct hisi_hikey_usb *hisi_hikey_usb, + int value) +{ + int gpio = hisi_hikey_usb->typec_vbus_gpio; + + if (!gpio_is_valid(gpio)) { + pr_err("%s: typec power gpio is err\n", __func__); + return; + } + + if (gpio_get_value(gpio) == value) { + pr_info("%s: typec power no change\n", __func__); + return; + } + + gpio_direction_output(gpio, value); + pr_info("%s: set typec vbus gpio to %d\n", __func__, value); +} + +static int extcon_hisi_pd_set_role(struct device *dev, enum usb_role role) +{ + struct hisi_hikey_usb *hisi_hikey_usb = dev_get_drvdata(dev); + + dev_info(dev, "%s:set usb role to %d\n", __func__, role); + switch (role) { + case USB_ROLE_NONE: + usb_switch_ctrl(hisi_hikey_usb, USB_SWITCH_TO_HUB); + usb_typec_power_ctrl(hisi_hikey_usb, + !hisi_hikey_usb->typec_vbus_enable_val); + hub_power_ctrl(hisi_hikey_usb, HUB_VBUS_POWER_ON); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB, false); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB_HOST, + true); + break; + case USB_ROLE_HOST: + usb_switch_ctrl(hisi_hikey_usb, USB_SWITCH_TO_TYPEC); + usb_typec_power_ctrl(hisi_hikey_usb, + hisi_hikey_usb->typec_vbus_enable_val); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB, false); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB_HOST, + true); + break; + case USB_ROLE_DEVICE: + hub_power_ctrl(hisi_hikey_usb, HUB_VBUS_POWER_OFF); + usb_typec_power_ctrl(hisi_hikey_usb, + hisi_hikey_usb->typec_vbus_enable_val); + usb_switch_ctrl(hisi_hikey_usb, USB_SWITCH_TO_TYPEC); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB_HOST, + false); + extcon_set_state_sync(hisi_hikey_usb->edev, EXTCON_USB, true); + break; + } + + return 0; +} + +static enum usb_role extcon_hisi_pd_get_role(struct device *dev) +{ + struct hisi_hikey_usb *hisi_hikey_usb = dev_get_drvdata(dev); + + return usb_role_switch_get_role(hisi_hikey_usb->role_sw); +} + +static const struct usb_role_switch_desc sw_desc = { + .set = extcon_hisi_pd_set_role, + .get = extcon_hisi_pd_get_role, + .allow_userspace_control = true, +}; + +static int hisi_hikey_usb_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *root = dev->of_node; + struct hisi_hikey_usb *hisi_hikey_usb; + int ret; + + hisi_hikey_usb = devm_kzalloc(dev, sizeof(*hisi_hikey_usb), GFP_KERNEL); + if (!hisi_hikey_usb) + return -ENOMEM; + + dev_set_name(dev, "hisi_hikey_usb"); + + hisi_hikey_usb->hub_vbus_gpio = INVALID_GPIO_VALUE; + hisi_hikey_usb->otg_switch_gpio = INVALID_GPIO_VALUE; + hisi_hikey_usb->typec_vbus_gpio = INVALID_GPIO_VALUE; + + hisi_hikey_usb->hub_vbus_gpio = of_get_named_gpio(root, + "hub_vdd33_en_gpio", 0); + if (!gpio_is_valid(hisi_hikey_usb->hub_vbus_gpio)) { + pr_err("%s: hub_vbus_gpio is err\n", __func__); + return hisi_hikey_usb->hub_vbus_gpio; + } + + ret = gpio_request(hisi_hikey_usb->hub_vbus_gpio, "hub_vbus_int_gpio"); + if (ret) { + pr_err("%s: request hub_vbus_gpio err\n", __func__); + hisi_hikey_usb->hub_vbus_gpio = INVALID_GPIO_VALUE; + return ret; + } + + ret = gpio_direction_output(hisi_hikey_usb->hub_vbus_gpio, + HUB_VBUS_POWER_ON); + if (ret) { + pr_err("%s: power on hub vbus err\n", __func__); + goto free_gpio1; + } + + hisi_hikey_usb->typec_vbus_gpio = of_get_named_gpio(root, + "typc_vbus_int_gpio,typec-gpios", 0); + if (!gpio_is_valid(hisi_hikey_usb->typec_vbus_gpio)) { + pr_err("%s: typec_vbus_gpio is err\n", __func__); + ret = hisi_hikey_usb->typec_vbus_gpio; + goto free_gpio1; + } + + ret = gpio_request(hisi_hikey_usb->typec_vbus_gpio, + "typc_vbus_int_gpio"); + if (ret) { + pr_err("%s: request typec_vbus_gpio err\n", __func__); + hisi_hikey_usb->typec_vbus_gpio = INVALID_GPIO_VALUE; + goto free_gpio1; + } + + ret = of_property_read_u32(root, "typc_vbus_enable_val", + &hisi_hikey_usb->typec_vbus_enable_val); + if (ret) { + pr_err("%s: typc_vbus_enable_val can't get\n", __func__); + goto free_gpio2; + } + + hisi_hikey_usb->typec_vbus_enable_val = + !!hisi_hikey_usb->typec_vbus_enable_val; + + ret = gpio_direction_output(hisi_hikey_usb->typec_vbus_gpio, + hisi_hikey_usb->typec_vbus_enable_val); + if (ret) { + pr_err("%s: power on typec vbus err", __func__); + goto free_gpio2; + } + + if (of_device_is_compatible(root, "hisilicon,hikey960_usb")) { + hisi_hikey_usb->otg_switch_gpio = of_get_named_gpio(root, + "otg_gpio", 0); + if (!gpio_is_valid(hisi_hikey_usb->otg_switch_gpio)) { + pr_info("%s: otg_switch_gpio is err\n", __func__); + goto free_gpio2; + } + + ret = gpio_request(hisi_hikey_usb->otg_switch_gpio, + "otg_switch_gpio"); + if (ret) { + hisi_hikey_usb->otg_switch_gpio = INVALID_GPIO_VALUE; + pr_err("%s: request typec_vbus_gpio err\n", __func__); + goto free_gpio2; + } + } + + hisi_hikey_usb->edev = devm_extcon_dev_allocate(dev, usb_extcon_cable); + if (IS_ERR(hisi_hikey_usb->edev)) { + dev_err(dev, "failed to allocate extcon device\n"); + goto free_gpio2; + } + + ret = devm_extcon_dev_register(dev, hisi_hikey_usb->edev); + if (ret < 0) { + dev_err(dev, "failed to register extcon device\n"); + goto free_gpio2; + } + extcon_set_state(hisi_hikey_usb->edev, EXTCON_USB_HOST, true); + + hisi_hikey_usb->role_sw = usb_role_switch_register(dev, &sw_desc); + if (IS_ERR(hisi_hikey_usb->role_sw)) + goto free_gpio2; + + platform_set_drvdata(pdev, hisi_hikey_usb); + + return 0; + +free_gpio2: + if (gpio_is_valid(hisi_hikey_usb->typec_vbus_gpio)) { + gpio_free(hisi_hikey_usb->typec_vbus_gpio); + hisi_hikey_usb->typec_vbus_gpio = INVALID_GPIO_VALUE; + } + +free_gpio1: + if (gpio_is_valid(hisi_hikey_usb->hub_vbus_gpio)) { + gpio_free(hisi_hikey_usb->hub_vbus_gpio); + hisi_hikey_usb->hub_vbus_gpio = INVALID_GPIO_VALUE; + } + + return ret; +} + +static int hisi_hikey_usb_remove(struct platform_device *pdev) +{ + struct hisi_hikey_usb *hisi_hikey_usb = platform_get_drvdata(pdev); + + if (gpio_is_valid(hisi_hikey_usb->otg_switch_gpio)) { + gpio_free(hisi_hikey_usb->otg_switch_gpio); + hisi_hikey_usb->otg_switch_gpio = INVALID_GPIO_VALUE; + } + + if (gpio_is_valid(hisi_hikey_usb->typec_vbus_gpio)) { + gpio_free(hisi_hikey_usb->typec_vbus_gpio); + hisi_hikey_usb->typec_vbus_gpio = INVALID_GPIO_VALUE; + } + + if (gpio_is_valid(hisi_hikey_usb->hub_vbus_gpio)) { + gpio_free(hisi_hikey_usb->hub_vbus_gpio); + hisi_hikey_usb->hub_vbus_gpio = INVALID_GPIO_VALUE; + } + + usb_role_switch_unregister(hisi_hikey_usb->role_sw); + + return 0; +} + +static const struct of_device_id id_table_hisi_hikey_usb[] = { + {.compatible = "hisilicon,gpio_hubv1"}, + {.compatible = "hisilicon,hikey960_usb"}, + {} +}; + +static struct platform_driver hisi_hikey_usb_driver = { + .probe = hisi_hikey_usb_probe, + .remove = hisi_hikey_usb_remove, + .driver = { + .name = DEVICE_DRIVER_NAME, + .of_match_table = of_match_ptr(id_table_hisi_hikey_usb), + + }, +}; + +module_platform_driver(hisi_hikey_usb_driver); + +MODULE_AUTHOR("Yu Chen "); +MODULE_DESCRIPTION("Driver Support for USB functionality of Hikey"); +MODULE_LICENSE("GPL v2"); From patchwork Sat Oct 27 09:58:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 20B331734 for ; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 148AE2BD18 for ; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 070B32BD27; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA55F2BD18 for ; Sat, 27 Oct 2018 10:00:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728636AbeJ0Skh (ORCPT ); Sat, 27 Oct 2018 14:40:37 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14125 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728434AbeJ0Skg (ORCPT ); Sat, 27 Oct 2018 14:40:36 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id AC87C2307E4AD; Sat, 27 Oct 2018 18:00:04 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:52 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Heikki Krogerus , Greg Kroah-Hartman , Lucas Tsai , shufan_lee , John Stultz , Binghui Wang Subject: [PATCH 08/10] usb: typec: Add support for usb role switch in rt1711h driver Date: Sat, 27 Oct 2018 17:58:18 +0800 Message-ID: <20181027095820.40056-9-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add struct device_connection to rt1711h driver to support find "usb-role-switch" in tcpm_register_port. Cc: Heikki Krogerus Cc: Greg Kroah-Hartman Cc: Lucas Tsai Cc: shufan_lee Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- drivers/usb/typec/tcpm/tcpci_rt1711h.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/usb/typec/tcpm/tcpci_rt1711h.c b/drivers/usb/typec/tcpm/tcpci_rt1711h.c index 017389021b96..5f8b952612fe 100644 --- a/drivers/usb/typec/tcpm/tcpci_rt1711h.c +++ b/drivers/usb/typec/tcpm/tcpci_rt1711h.c @@ -39,6 +39,7 @@ struct rt1711h_chip { struct tcpci_data data; struct tcpci *tcpci; struct device *dev; + struct device_connection dev_conn; }; static int rt1711h_read16(struct rt1711h_chip *chip, unsigned int reg, u16 *val) @@ -237,6 +238,7 @@ static int rt1711h_probe(struct i2c_client *client, { int ret; struct rt1711h_chip *chip; + const char *dev_conn_end; ret = rt1711h_check_revision(client); if (ret < 0) { @@ -254,6 +256,7 @@ static int rt1711h_probe(struct i2c_client *client, return PTR_ERR(chip->data.regmap); chip->dev = &client->dev; + dev_set_name(chip->dev, "rt1711h"); i2c_set_clientdata(client, chip); ret = rt1711h_sw_reset(chip); @@ -264,6 +267,15 @@ static int rt1711h_probe(struct i2c_client *client, if (ret < 0) return ret; + ret = device_property_read_string(chip->dev, "dev-conn-end", + &dev_conn_end); + if (!ret) { + chip->dev_conn.endpoint[0] = "rt1711h"; + chip->dev_conn.endpoint[1] = dev_conn_end; + chip->dev_conn.id = "usb-role-switch"; + device_connection_add(&chip->dev_conn); + } + chip->data.init = rt1711h_init; chip->data.set_vconn = rt1711h_set_vconn; chip->data.start_drp_toggling = rt1711h_start_drp_toggling; @@ -279,6 +291,9 @@ static int rt1711h_remove(struct i2c_client *client) struct rt1711h_chip *chip = i2c_get_clientdata(client); tcpci_unregister_port(chip->tcpci); + if (chip->dev_conn.id) + device_connection_remove(&chip->dev_conn); + return 0; } From patchwork Sat Oct 27 09:58:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B10D414E2 for ; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A77B92BD18 for ; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9BA0C2BD27; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3BA2B2BD18 for ; Sat, 27 Oct 2018 10:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728623AbeJ0Skf (ORCPT ); Sat, 27 Oct 2018 14:40:35 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14126 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728584AbeJ0Ske (ORCPT ); Sat, 27 Oct 2018 14:40:34 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id B339B5A68B91F; Sat, 27 Oct 2018 18:00:04 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:53 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Felipe Balbi , Greg Kroah-Hartman , John Stultz , "Binghui Wang" Subject: [PATCH 09/10] usb: gadget: Add configfs attribuite for controling match_existing_only Date: Sat, 27 Oct 2018 17:58:19 +0800 Message-ID: <20181027095820.40056-10-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the "match_existing_only" of usb_gadget_driver in configfs is set to one which is not flexible. Dwc3 udc will be removed when usb core switch to host mode. This causes failure of writing name of dwc3 udc to configfs's UDC attribuite. To fix this we need to add a way to change the config of "match_existing_only". This patch adds a configfs attribuite for controling match_existing_only which allow user to config "match_existing_only". Cc: Felipe Balbi Cc: Greg Kroah-Hartman Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- drivers/usb/gadget/configfs.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c index 025129942894..c82b7bc98dea 100644 --- a/drivers/usb/gadget/configfs.c +++ b/drivers/usb/gadget/configfs.c @@ -291,6 +291,36 @@ static ssize_t gadget_dev_desc_UDC_store(struct config_item *item, return ret; } +static ssize_t gadget_driver_match_existing_only_store(struct config_item *item, + const char *page, size_t len) +{ + struct usb_gadget_driver *gadget_driver = + &(to_gadget_info(item)->composite.gadget_driver); + bool match_existing_only; + int ret; + + ret = kstrtobool(page, &match_existing_only); + if (ret) + return ret; + + if (match_existing_only) + gadget_driver->match_existing_only = 1; + else + gadget_driver->match_existing_only = 0; + + return len; +} + +static ssize_t gadget_driver_match_existing_only_show(struct config_item *item, + char *page) +{ + struct usb_gadget_driver *gadget_driver = + &(to_gadget_info(item)->composite.gadget_driver); + bool match_existing_only = !!gadget_driver->match_existing_only; + + return sprintf(page, "%s\n", match_existing_only ? "true" : "false"); +} + CONFIGFS_ATTR(gadget_dev_desc_, bDeviceClass); CONFIGFS_ATTR(gadget_dev_desc_, bDeviceSubClass); CONFIGFS_ATTR(gadget_dev_desc_, bDeviceProtocol); @@ -300,6 +330,7 @@ CONFIGFS_ATTR(gadget_dev_desc_, idProduct); CONFIGFS_ATTR(gadget_dev_desc_, bcdDevice); CONFIGFS_ATTR(gadget_dev_desc_, bcdUSB); CONFIGFS_ATTR(gadget_dev_desc_, UDC); +CONFIGFS_ATTR(gadget_, driver_match_existing_only); static struct configfs_attribute *gadget_root_attrs[] = { &gadget_dev_desc_attr_bDeviceClass, @@ -311,6 +342,7 @@ static struct configfs_attribute *gadget_root_attrs[] = { &gadget_dev_desc_attr_bcdDevice, &gadget_dev_desc_attr_bcdUSB, &gadget_dev_desc_attr_UDC, + &gadget_attr_driver_match_existing_only, NULL, }; From patchwork Sat Oct 27 09:58:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 10658309 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 919FB1734 for ; Sat, 27 Oct 2018 10:00:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86C942BD18 for ; Sat, 27 Oct 2018 10:00:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7ADEA2BD27; Sat, 27 Oct 2018 10:00:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB9B82BD18 for ; Sat, 27 Oct 2018 10:00:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728603AbeJ0Ske (ORCPT ); Sat, 27 Oct 2018 14:40:34 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14124 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728585AbeJ0Skd (ORCPT ); Sat, 27 Oct 2018 14:40:33 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A296DFCE990F4; Sat, 27 Oct 2018 18:00:04 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 17:59:54 +0800 From: Yu Chen To: , , CC: , , Yu Chen , Wei Xu , Rob Herring , Mark Rutland , , John Stultz , Binghui Wang Subject: [PATCH 10/10] dts: hi3660: Add support for usb on Hikey960 Date: Sat, 27 Oct 2018 17:58:20 +0800 Message-ID: <20181027095820.40056-11-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20181027095820.40056-1-chenyu56@huawei.com> References: <20181027095820.40056-1-chenyu56@huawei.com> MIME-Version: 1.0 X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for usb on Hikey960. Cc: Wei Xu Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: John Stultz Cc: Binghui Wang Signed-off-by: Yu Chen --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 35 +++++++++++++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 52 +++++++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index c98bcbc8dfba..49b6965a96c8 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -13,6 +13,7 @@ #include #include #include +#include / { model = "HiKey960"; @@ -196,6 +197,17 @@ method = "smc"; }; }; + + hisi_hikey_usb: hisi_hikey_usb { + compatible = "hisilicon,hikey960_usb"; + typc_vbus_int_gpio,typec-gpios = <&gpio25 2 0>; + typc_vbus_enable_val = <1>; + otg_gpio = <&gpio25 6 0>; + hub_vdd33_en_gpio = <&gpio5 6 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usbhub5734_pmx_func>; + }; + }; /* @@ -526,6 +538,29 @@ &i2c1 { status = "okay"; + rt1711h: rt1711h@4e { + compatible = "richtek,rt1711h"; + reg = <0x4e>; + status = "ok"; + interrupt-parent = <&gpio27>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_cfg_func>; + dev-conn-end = "hisi_hikey_usb-role-switch"; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <10000000>; + }; + }; + adv7533: adv7533@39 { status = "ok"; compatible = "adi,adv7533"; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index f432b0a88c65..d0af1cd4db80 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1122,5 +1122,57 @@ }; }; }; + + usb3_otg_bc: usb3_otg_bc@ff200000 { + compatible = "syscon"; + reg = <0x0 0xff200000 0x0 0x1000>; + }; + + usb_phy: usbphy { + compatible = "hisilicon,hi3660-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,usb3-otg-bc-syscon = <&usb3_otg_bc>; + eye-diagram-param = <0x22466e4>; + }; + + usb3: hisi_dwc3 { + compatible = "hisilicon,hi3660-dwc3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, + <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; + clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; + + assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; + assigned-clock-rates = <229000000>; + resets = <&crg_rst 0x90 8>, + <&crg_rst 0x90 7>, + <&crg_rst 0x90 6>, + <&crg_rst 0x90 5>; + + dwc3@ff100000 { + compatible = "snps,dwc3"; + reg = <0x0 0xff100000 0x0 0x100000>; + interrupts = <0 159 4>, <0 161 4>; + phys = <&usb_phy>; + phy-names = "usb3-phy"; + dr_mode = "otg"; + maximum-speed = "super-speed"; + phy_type = "utmi"; + snps,dis-del-phy-power-chg-quirk; + snps,lfps_filter_quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,tx_de_emphasis_quirk; + snps,tx_de_emphasis = <1>; + snps,dis_enblslpm_quirk; + snps,gctl-reset-quirk; + extcon = <&hisi_hikey_usb>; + }; + }; }; };